@c Copyright 2002, 2004 Free Software Foundation, Inc.@c This is part of the GAS manual.@c For copying conditions, see the file as.texinfo.@ifset GENERIC@page@node MSP430-Dependent@chapter MSP 430 Dependent Features@end ifset@ifclear GENERIC@node Machine Dependencies@chapter MSP 430 Dependent Features@end ifclear@cindex MSP 430 support@cindex 430 support@menu* MSP430 Options:: Options* MSP430 Syntax:: Syntax* MSP430 Floating Point:: Floating Point* MSP430 Directives:: MSP 430 Machine Directives* MSP430 Opcodes:: Opcodes* MSP430 Profiling Capability:: Profiling Capability@end menu@node MSP430 Options@section Options@cindex MSP 430 options (none)@cindex options for MSP430 (none)@table @code@item -mselect the mpu arch. Currently has no effect.@item -mPenables polymorph instructions handler.@item -mQenables relaxation at assembly time. DANGEROUS!@end table@node MSP430 Syntax@section Syntax@menu* MSP430-Macros:: Macros* MSP430-Chars:: Special Characters* MSP430-Regs:: Register Names* MSP430-Ext:: Assembler Extensions@end menu@node MSP430-Macros@subsection Macros@cindex Macros, MSP 430@cindex MSP 430 macrosThe macro syntax used on the MSP 430 is like that described in the MSP430 Family Assembler Specification. Normal @code{@value{AS}}macros should still work.Additional built-in macros are:@table @code@item llo(exp)Extracts least significant word from 32-bit expression 'exp'.@item lhi(exp)Extracts most significant word from 32-bit expression 'exp'.@item hlo(exp)Extracts 3rd word from 64-bit expression 'exp'.@item hhi(exp)Extracts 4rd word from 64-bit expression 'exp'.@end tableThey normally being used as an immediate source operand.@smallexamplemov #llo(1), r10 ; == mov #1, r10mov #lhi(1), r10 ; == mov #0, r10@end smallexample@node MSP430-Chars@subsection Special Characters@cindex line comment character, MSP 430@cindex MSP 430 line comment character@samp{;} is the line comment character.@cindex identifiers, MSP 430@cindex MSP 430 identifiersThe character @samp{$} in jump instructions indicates current location andimplemented only for TI syntax compatibility.@node MSP430-Regs@subsection Register Names@cindex MSP 430 register names@cindex register names, MSP 430General-purpose registers are represented by predefined symbols of theform @samp{r@var{N}} (for global registers), where @var{N} representsa number between @code{0} and @code{15}. The leadingletters may be in either upper or lower case; for example, @samp{r13}and @samp{R7} are both valid register names.@cindex special purpose registers, MSP 430Register names @samp{PC}, @samp{SP} and @samp{SR} cannot be used as register namesand will be treated as variables. Use @samp{r0}, @samp{r1}, and @samp{r2} instead.@node MSP430-Ext@subsection Assembler Extensions@cindex MSP430 Assembler Extensions@table @code@item @@rNAs destination operand being treated as @samp{0(rn)}@item 0(rN)As source operand being treated as @samp{@@rn}@item jCOND +NSkips next N bytes followed by jump instruction and equivalent to@samp{jCOND $+N+2}@end tableAlso, there are some instructions, which cannot be found in other assemblers.These are branch instructions, which has different opcodes upon jump distance.They all got PC relative addressing mode.@table @code@item beq labelA polymorph instruction which is @samp{jeq label} in case if jump distancewithin allowed range for cpu's jump instruction. If not, this unrolls intoa sequence of@smallexamplejne $+6br label@end smallexample@item bne labelA polymorph instruction which is @samp{jne label} or @samp{jeq +4; br label}@item blt labelA polymorph instruction which is @samp{jl label} or @samp{jge +4; br label}@item bltn labelA polymorph instruction which is @samp{jn label} or @samp{jn +2; jmp +4; br label}@item bltu labelA polymorph instruction which is @samp{jlo label} or @samp{jhs +2; br label}@item bge labelA polymorph instruction which is @samp{jge label} or @samp{jl +4; br label}@item bgeu labelA polymorph instruction which is @samp{jhs label} or @samp{jlo +4; br label}@item bgt labelA polymorph instruction which is @samp{jeq +2; jge label} or @samp{jeq +6; jl +4; br label}@item bgtu labelA polymorph instruction which is @samp{jeq +2; jhs label} or @samp{jeq +6; jlo +4; br label}@item bleu labelA polymorph instruction which is @samp{jeq label; jlo label} or @samp{jeq +2; jhs +4; br label}@item ble labelA polymorph instruction which is @samp{jeq label; jl label} or @samp{jeq +2; jge +4; br label}@item jump labelA polymorph instruction which is @samp{jmp label} or @samp{br label}@end table@node MSP430 Floating Point@section Floating Point@cindex floating point, MSP 430 (@sc{ieee})@cindex MSP 430 floating point (@sc{ieee})The MSP 430 family uses @sc{ieee} 32-bit floating-point numbers.@node MSP430 Directives@section MSP 430 Machine Directives@cindex machine directives, MSP 430@cindex MSP 430 machine directives@table @code@cindex @code{file} directive, MSP 430@item .fileThis directive is ignored; it is accepted for compatibility with otherMSP 430 assemblers.@quotation@emph{Warning:} in other versions of the @sc{gnu} assembler, @code{.file} isused for the directive called @code{.app-file} in the MSP 430 support.@end quotation@cindex @code{line} directive, MSP 430@item .lineThis directive is ignored; it is accepted for compatibility with otherMSP 430 assemblers.@cindex @code{sect} directive, MSP 430@item .archCurrently this directive is ignored; it is accepted for compatibility with otherMSP 430 assemblers.@cindex @code{profiler} directive, MSP 430@item .profilerThis directive instructs assembler to add new profile entry to the object file.@end table@node MSP430 Opcodes@section Opcodes@cindex MSP 430 opcodes@cindex opcodes for MSP 430@code{@value{AS}} implements all the standard MSP 430 opcodes. Noadditional pseudo-instructions are needed on this family.For information on the 430 machine instruction set, see @cite{MSP430User's Manual, document slau049d}, Texas Instrument, Inc.@node MSP430 Profiling Capability@section Profiling Capability@cindex MSP 430 profiling capability@cindex profiling capability for MSP 430It is a performance hit to use gcc's profiling approach for this tiny target.Even more -- jtag hardware facility does not perform any profiling functions.However we've got gdb's built-in simulator where we can do anything.We define new section @samp{.profiler} which holds all profiling information.We define new pseudo operation @samp{.profiler} which will instruct assembler toadd new profile entry to the object file. Profile should take place at thepresent address.Pseudo operation format:@samp{.profiler flags,function_to_profile [, cycle_corrector, extra]}where:@table @code@table @code@samp{flags} is a combination of the following characters:@item sfunction entry@item xfunction exit@item ifunction is in init section@item ffunction is in fini section@item llibrary call@item clibc standard call@item dstack value demand@item Iinterrupt service routine@item Pprologue start@item pprologue end@item Eepilogue start@item eepilogue end@item jlong jump / sjlj unwind@item aan arbitrary code fragment@item textra parameter saved (a constant value like frame size)@end table@item function_to_profilea function address@item cycle_correctora value which should be added to the cycle counter, zero if omitted.@item extraany extra parameter, zero if omitted.@end tableFor example:@smallexample.global fxx.type fxx,@@functionfxx:.LFrameOffset_fxx=0x08.profiler "scdP", fxx ; function entry.; we also demand stack value to be savedpush r11push r10push r9push r8.profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point; (this is a prologue end); note, that spare var filled with; the farme sizemov r15,r8....profiler cdE,fxx ; check stackpop r8pop r9pop r10pop r11.profiler xcde,fxx,3 ; exit adds 3 to the cycle counterret ; cause 'ret' insn takes 3 cycles@end smallexample