@c Copyright 2005@c Free Software Foundation, Inc.@c This is part of the GAS manual.@c For copying conditions, see the file as.texinfo.@ifset GENERIC@page@node M32C-Dependent@chapter M32C Dependent Features@end ifset@ifclear GENERIC@node Machine Dependencies@chapter M32C Dependent Features@end ifclear@cindex M32C support@code{@value{AS}} can assemble code for several different members ofthe Renesas M32C family. Normally the default is to assemble code forthe M16C microprocessor. The @code{-m32c} option may be used tochange the default to the M32C microprocessor.@menu* M32C-Opts:: M32C Options* M32C-Modifiers:: Symbolic Operand Modifiers@end menu@node M32C-Opts@section M32C Options@cindex options, M32C@cindex M32C optionsThe Renesas M32C version of @code{@value{AS}} has twomachine-dependent options:@table @code@item -m32c@cindex @samp{-m32c} option, M32C@cindex architecture options, M32C@cindex M32C architecture optionAssemble M32C instructions.@item -m16c@cindex @samp{-m16c} option, M16C@cindex architecture options, M16C@cindex M16C architecture optionAssemble M16C instructions (default).@end table@node M32C-Modifiers@section Symbolic Operand Modifiers@cindex M32C modifiers@cindex syntax, M32CThe assembler supports several modifiers when using symbol addressesin M32C instruction operands. The general syntax is the following:@smallexample%modifier(symbol)@end smallexample@table @code@cindex symbol modifiers@item %dsp8@itemx %dsp16These modifiers override the assembler's assumptions about how big asymbol's address is. Normally, when it sees an operand like@samp{sym[a0]} it assumes @samp{sym} may require the widestdisplacement field (16 bits for @samp{-m16c}, 24 bits for@samp{-m32c}). These modifiers tell it to assume the address will fitin an 8 or 16 bit (respectively) unsigned displacement. Note that, ofcourse, if it doesn't actually fit you will get linker errors. Example:@smallexamplemov.w %dsp8(sym)[a0],r1mov.b #0,%dsp8(sym)[a0]@end smallexample@item %hi8This modifier allows you to load bits 16 through 23 of a 24 bitaddress into an 8 bit register. This is useful with, for example, theM16C @samp{smovf} instruction, which expects a 20 bit address in@samp{r1h} and @samp{a0}. Example:@smallexamplemov.b #%hi8(sym),r1hmov.w #%lo16(sym),a0smovf.b@end smallexample@item %lo16Likewise, this modifier allows you to load bits 0 through 15 of a 24bit address into a 16 bit register.@item %hi16This modifier allows you to load bits 16 through 31 of a 32 bitaddress into a 16 bit register. While the M32C family only has 24bits of address space, it does support addresses in pairs of 16 bitregisters (like @samp{a1a0} for the @samp{lde} instruction). Thismodifier is for loading the upper half in such cases. Example:@smallexamplemov.w #%hi16(sym),a1mov.w #%lo16(sym),a0@dots{}lde.w [a1a0],r1@end smallexample@end table