import binutils 2.26.1
Diff
binutils/md5.sum | 516 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
binutils/bfd/ChangeLog | 539 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
binutils/bfd/archive.c | 2 +-
binutils/bfd/coff-alpha.c | 2 +-
binutils/bfd/coff-i386.c | 60 ++++++++++++++++++++++++++++++------------------------------
binutils/bfd/coff-x86_64.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++---------------------------------
binutils/bfd/coffcode.h | 2 ++
binutils/bfd/cofflink.c | 6 ++++++
binutils/bfd/configure | 20 ++++++++++----------
binutils/bfd/development.sh | 2 +-
binutils/bfd/dwarf2.c | 4 +++-
binutils/bfd/elf-bfd.h | 8 +++++---
binutils/bfd/elf-strtab.c | 41 +++++++++++++++++++++++++++++++++++------
binutils/bfd/elf32-arm.c | 101 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------
binutils/bfd/elf32-avr.c | 36 +++++++++++++++++++++++++++++++-----
binutils/bfd/elf32-hppa.c | 9 +++++++++
binutils/bfd/elf32-i386.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/bfd/elf32-ppc.c | 1 +
binutils/bfd/elf64-hppa.c | 18 +++++++++++++-----
binutils/bfd/elf64-ppc.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++---------------------------------
binutils/bfd/elf64-x86-64.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------
binutils/bfd/elflink.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------
binutils/bfd/elfnn-aarch64.c | 25 +++++++++++++++++++------
binutils/bfd/version.h | 2 +-
binutils/bfd/version.m4 | 2 +-
binutils/binutils/ChangeLog | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++------
binutils/binutils/Makefile.am | 1 +
binutils/binutils/Makefile.in | 1 +
binutils/binutils/configure | 20 ++++++++++----------
binutils/binutils/objcopy.c | 1 +
binutils/binutils/objdump.c | 3 ++-
binutils/elfcpp/ChangeLog | 4 ++--
binutils/gas/ChangeLog | 213 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/NEWS | 9 +++++++--
binutils/gas/config.in | 3 +++
binutils/gas/configure | 60 +++++++++++++++++++++++++++++++++++++++++++++++-------------
binutils/gas/configure.ac | 31 ++++++++++++++++++++++++++++++-
binutils/gas/write.c | 1 -
binutils/gold/ChangeLog | 132 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------
binutils/gold/icf.cc | 115 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------
binutils/gprof/ChangeLog | 8 ++++++++
binutils/gprof/configure | 20 ++++++++++----------
binutils/include/ChangeLog | 230 ++++----------------------------------------------------------------------------
binutils/ld/ChangeLog | 559 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/configure | 22 +++++++++++-----------
binutils/ld/configure.ac | 2 +-
binutils/ld/ld.1 | 14 ++++++++++----
binutils/ld/ld.info | 565 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--
binutils/ld/ld.texinfo | 12 +++++++++---
binutils/ld/lexsup.c | 11 +++++------
binutils/opcodes/ChangeLog | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
binutils/opcodes/configure | 20 ++++++++++----------
binutils/opcodes/i386-dis.c | 4 ++--
binutils/opcodes/ppc-opc.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------
binutils/binutils/doc/addr2line.1 | 2 +-
binutils/binutils/doc/ar.1 | 2 +-
binutils/binutils/doc/binutils.info | 2 +-
binutils/binutils/doc/binutils.texi | 2 +-
binutils/binutils/doc/cxxfilt.man | 2 +-
binutils/binutils/doc/dlltool.1 | 2 +-
binutils/binutils/doc/nlmconv.1 | 2 +-
binutils/binutils/doc/nm.1 | 2 +-
binutils/binutils/doc/objcopy.1 | 4 ++--
binutils/binutils/doc/objdump.1 | 2 +-
binutils/binutils/doc/ranlib.1 | 2 +-
binutils/binutils/doc/readelf.1 | 2 +-
binutils/binutils/doc/size.1 | 2 +-
binutils/binutils/doc/strings.1 | 2 +-
binutils/binutils/doc/strip.1 | 2 +-
binutils/binutils/doc/windmc.1 | 2 +-
binutils/binutils/doc/windres.1 | 2 +-
binutils/binutils/testsuite/ChangeLog | 8 ++++----
binutils/gas/config/tc-arc.c | 1 +
binutils/gas/config/tc-i386.c | 36 ++++++++++++++++++++++++++++++++----
binutils/gas/config/tc-mips.c | 42 ++++++++++++++++++++++++++++++++++--------
binutils/gas/doc/as.1 | 15 ++++++++++++++-
binutils/gas/doc/as.info | 772 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
binutils/gas/doc/c-i386.texi | 12 ++++++++++++
binutils/gas/testsuite/ChangeLog | 19 ++++++++++++-------
binutils/include/aout/ChangeLog | 4 ++++
binutils/include/elf/ChangeLog | 126 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/include/gdb/ChangeLog | 10 +++++++---
binutils/include/opcode/ChangeLog | 135 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/emultempl/elf32.em | 33 ++++++++++++++++++++-------------
binutils/ld/emultempl/mmo.em | 30 ++++++++++++++++++------------
binutils/ld/emultempl/pe.em | 30 ++++++++++++++++++------------
binutils/ld/emultempl/pep.em | 30 ++++++++++++++++++------------
binutils/ld/testsuite/ChangeLog | 15 +++++++--------
binutils/binutils/testsuite/binutils-all/ar.exp | 40 ++++++++++++++++++++++++++++++++++++++++
binutils/binutils/testsuite/binutils-all/compress.exp | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/binutils/testsuite/binutils-all/empty | 0
binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp | 3 ++-
binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d | 21 ++++++++++++++++++++-
binutils/ld/testsuite/ld-aarch64/farcall-b-section.d | 34 ++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-aarch64/farcall-b-section.s | 20 ++++++++++++++++++++
binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d | 21 ++++++++++++++++++++-
binutils/ld/testsuite/ld-aarch64/farcall-bl-section.d | 34 ++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-aarch64/farcall-bl-section.s | 20 ++++++++++++++++++++
binutils/ld/testsuite/ld-aarch64/farcall-section.d | 5 -----
binutils/ld/testsuite/ld-aarch64/farcall-section.s | 19 -------------------
binutils/ld/testsuite/ld-arm/arm-elf.exp | 6 +++++-
binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d | 91 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------
binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s | 3 +++
binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s | 27 +++++++++++++++++++++++++++
binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s | 1 +
binutils/ld/testsuite/ld-avr/avr-prop-5.d | 10 ++++++++++
binutils/ld/testsuite/ld-avr/avr-prop-5.s | 7 +++++++
binutils/ld/testsuite/ld-avr/avr-prop-6.d | 14 ++++++++++++++
binutils/ld/testsuite/ld-avr/avr-prop-6.s | 9 +++++++++
binutils/ld/testsuite/ld-elf/compressed1b.d | 3 ++-
binutils/ld/testsuite/ld-elf/compressed1c.d | 2 +-
binutils/ld/testsuite/ld-elf/gabiend.rt | 2 +-
binutils/ld/testsuite/ld-elf/gabinormal.rt | 2 +-
binutils/ld/testsuite/ld-elf/indirect.exp | 24 +++++++++++++++++++++++-
binutils/ld/testsuite/ld-elf/pr19539.d | 9 +++++++++
binutils/ld/testsuite/ld-elf/pr19539.s | 2 ++
binutils/ld/testsuite/ld-elf/pr19539.t | 1 +
binutils/ld/testsuite/ld-elf/pr19553.map | 5 +++++
binutils/ld/testsuite/ld-elf/pr19553a.c | 8 ++++++++
binutils/ld/testsuite/ld-elf/pr19553b.c | 8 ++++++++
binutils/ld/testsuite/ld-elf/pr19553b.out | 1 +
binutils/ld/testsuite/ld-elf/pr19553c.c | 9 +++++++++
binutils/ld/testsuite/ld-elf/pr19553c.out | 1 +
binutils/ld/testsuite/ld-elf/pr19553d.c | 8 ++++++++
binutils/ld/testsuite/ld-elf/pr19553d.out | 1 +
binutils/ld/testsuite/ld-elf/pr19579a.c | 15 +++++++++++++++
binutils/ld/testsuite/ld-elf/pr19579b.c | 14 ++++++++++++++
binutils/ld/testsuite/ld-elf/pr19698.d | 10 ++++++++++
binutils/ld/testsuite/ld-elf/pr19698.s | 5 +++++
binutils/ld/testsuite/ld-elf/pr19698.t | 11 +++++++++++
binutils/ld/testsuite/ld-elf/shared.exp | 24 ++++++++++++++++++++++++
binutils/ld/testsuite/ld-elfvsb/elfvsb.exp | 4 +++-
binutils/ld/testsuite/ld-i386/branch1.d | 2 +-
binutils/ld/testsuite/ld-i386/call1.d | 2 +-
binutils/ld/testsuite/ld-i386/call2.d | 2 +-
binutils/ld/testsuite/ld-i386/call3a.d | 2 +-
binutils/ld/testsuite/ld-i386/call3b.d | 2 +-
binutils/ld/testsuite/ld-i386/call3c.d | 2 +-
binutils/ld/testsuite/ld-i386/call3d.d | 2 +-
binutils/ld/testsuite/ld-i386/call3e.d | 2 +-
binutils/ld/testsuite/ld-i386/call3f.d | 2 +-
binutils/ld/testsuite/ld-i386/call3g.d | 2 +-
binutils/ld/testsuite/ld-i386/call3h.d | 2 +-
binutils/ld/testsuite/ld-i386/got1.dd | 2 ++
binutils/ld/testsuite/ld-i386/got1a.S | 11 ++++++++++-
binutils/ld/testsuite/ld-i386/got1d.S | 1 -
binutils/ld/testsuite/ld-i386/i386.exp | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/ifunc-1a.c | 8 ++++++++
binutils/ld/testsuite/ld-i386/ifunc-1b.S | 42 ++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/ifunc-1c.S | 26 ++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/ifunc-1d.S | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/jmp1.d | 2 +-
binutils/ld/testsuite/ld-i386/jmp2.d | 2 +-
binutils/ld/testsuite/ld-i386/lea1c.d | 2 +-
binutils/ld/testsuite/ld-i386/libno-plt-1b.dd | 19 +++++++++++++++++++
binutils/ld/testsuite/ld-i386/libno-plt-1b.rd | 8 ++++++++
binutils/ld/testsuite/ld-i386/load1.d | 2 +-
binutils/ld/testsuite/ld-i386/load2.d | 2 +-
binutils/ld/testsuite/ld-i386/load3.d | 2 +-
binutils/ld/testsuite/ld-i386/load4a.d | 2 +-
binutils/ld/testsuite/ld-i386/load5a.d | 2 +-
binutils/ld/testsuite/ld-i386/mov2b.d | 2 +-
binutils/ld/testsuite/ld-i386/mov3.d | 2 +-
binutils/ld/testsuite/ld-i386/no-plt-1a.dd | 43 +++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1a.rd | 10 ++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1b.dd | 31 +++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1b.rd | 16 ++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1c.dd | 31 +++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1c.rd | 14 ++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1d.dd | 43 +++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1d.rd | 7 +++++++
binutils/ld/testsuite/ld-i386/no-plt-1e.dd | 43 +++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1e.rd | 10 ++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1f.dd | 31 +++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1f.rd | 16 ++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1g.dd | 31 +++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1g.rd | 14 ++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1h.dd | 34 ++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1h.rd | 10 ++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1i.dd | 33 +++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1i.rd | 12 ++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1j.dd | 34 ++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-1j.rd | 7 +++++++
binutils/ld/testsuite/ld-i386/no-plt-check1a.S | 39 +++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-check1b.S | 28 ++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-extern1a.S | 26 ++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-extern1b.S | 16 ++++++++++++++++
binutils/ld/testsuite/ld-i386/no-plt-func1.c | 5 +++++
binutils/ld/testsuite/ld-i386/no-plt-main1.c | 8 ++++++++
binutils/ld/testsuite/ld-i386/no-plt.exp | 290 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/pass.out | 1 +
binutils/ld/testsuite/ld-i386/pr19615.d | 13 +++++++++++++
binutils/ld/testsuite/ld-i386/pr19615.s | 13 +++++++++++++
binutils/ld/testsuite/ld-i386/pr19827-nacl.rd | 5 +++++
binutils/ld/testsuite/ld-i386/pr19827.rd | 5 +++++
binutils/ld/testsuite/ld-i386/pr19827a.S | 8 ++++++++
binutils/ld/testsuite/ld-i386/pr19827b.S | 2 ++
binutils/ld/testsuite/ld-i386/pr20117.d | 12 ++++++++++++
binutils/ld/testsuite/ld-i386/pr20117.s | 7 +++++++
binutils/ld/testsuite/ld-i386/pr20244-1.s | 17 +++++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-1a.d | 26 ++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-1b.d | 11 +++++++++++
binutils/ld/testsuite/ld-i386/pr20244-1c.d | 4 ++++
binutils/ld/testsuite/ld-i386/pr20244-2.s | 17 +++++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-2a.d | 43 +++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-2b.d | 11 +++++++++++
binutils/ld/testsuite/ld-i386/pr20244-2c.d | 10 ++++++++++
binutils/ld/testsuite/ld-i386/pr20244-2d.d | 4 ++++
binutils/ld/testsuite/ld-i386/pr20244-3a.c | 8 ++++++++
binutils/ld/testsuite/ld-i386/pr20244-3b.S | 30 ++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-3c.S | 15 +++++++++++++++
binutils/ld/testsuite/ld-i386/pr20244-3d.S | 44 ++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d | 2 +-
binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d | 2 +-
binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d | 2 +-
binutils/ld/testsuite/ld-plugin/lto.exp | 13 ++++++++++++-
binutils/ld/testsuite/ld-powerpc/powerpc.exp | 10 ++++++++++
binutils/ld/testsuite/ld-powerpc/tlsdll.s | 19 +++++++++++++++++++
binutils/ld/testsuite/ld-powerpc/tlsdll.ver | 7 +++++++
binutils/ld/testsuite/ld-powerpc/tlsdll_32.s | 18 ++++++++++++++++++
binutils/ld/testsuite/ld-powerpc/tlsopt5.d | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-powerpc/tlsopt5.s | 5 +++++
binutils/ld/testsuite/ld-powerpc/tlsopt5_32.d | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-powerpc/tlsopt5_32.s | 4 ++++
binutils/ld/testsuite/ld-x86-64/call1a.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1b.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1c.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1d.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1e.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1f.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1g.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1h.d | 2 +-
binutils/ld/testsuite/ld-x86-64/call1i.d | 2 +-
binutils/ld/testsuite/ld-x86-64/libno-plt-1b.dd | 15 +++++++++++++++
binutils/ld/testsuite/ld-x86-64/libno-plt-1b.rd | 8 ++++++++
binutils/ld/testsuite/ld-x86-64/load1a.d | 2 +-
binutils/ld/testsuite/ld-x86-64/load1b.d | 2 +-
binutils/ld/testsuite/ld-x86-64/no-plt-1a.dd | 32 ++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1a.rd | 10 ++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1b.dd | 24 ++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1b.rd | 16 ++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1c.dd | 24 ++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1c.rd | 14 ++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1d.dd | 33 +++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1d.rd | 7 +++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1e.dd | 32 ++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1e.rd | 10 ++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1f.dd | 24 ++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1f.rd | 16 ++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1g.dd | 24 ++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-1g.rd | 14 ++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-check1.S | 25 +++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-extern1.S | 15 +++++++++++++++
binutils/ld/testsuite/ld-x86-64/no-plt-func1.c | 5 +++++
binutils/ld/testsuite/ld-x86-64/no-plt-main1.c | 8 ++++++++
binutils/ld/testsuite/ld-x86-64/no-plt.exp | 201 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/ld/testsuite/ld-x86-64/pass.out | 1 +
binutils/ld/testsuite/ld-x86-64/pr18591.d | 12 ++++++++++++
binutils/ld/testsuite/ld-x86-64/pr18591.s | 8 ++++++++
binutils/ld/testsuite/ld-x86-64/pr19615.d | 13 +++++++++++++
binutils/ld/testsuite/ld-x86-64/pr19615.s | 13 +++++++++++++
binutils/ld/testsuite/ld-x86-64/pr19827-nacl.rd | 5 +++++
binutils/ld/testsuite/ld-x86-64/pr19827.rd | 5 +++++
binutils/ld/testsuite/ld-x86-64/pr19827a.S | 8 ++++++++
binutils/ld/testsuite/ld-x86-64/pr19827b.S | 2 ++
binutils/ld/testsuite/ld-x86-64/pr20093-1.d | 11 +++++++++++
binutils/ld/testsuite/ld-x86-64/pr20093-1.s | 11 +++++++++++
binutils/ld/testsuite/ld-x86-64/pr20093-2.d | 11 +++++++++++
binutils/ld/testsuite/ld-x86-64/pr20093-2.s | 9 +++++++++
binutils/ld/testsuite/ld-x86-64/x86-64.exp | 99 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------
binutils/gas/testsuite/gas/i386/disp32.d | 10 ++++++----
binutils/gas/testsuite/gas/i386/disp32.s | 4 ++++
binutils/gas/testsuite/gas/i386/got-no-relax.d | 31 +++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/i386/got.d | 1 +
binutils/gas/testsuite/gas/i386/i386.exp | 2 ++
binutils/gas/testsuite/gas/i386/localpic.d | 1 +
binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d | 1 +
binutils/gas/testsuite/gas/i386/reloc32.d | 1 +
binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d | 2 ++
binutils/gas/testsuite/gas/i386/x86-64-avx512f.d | 2 ++
binutils/gas/testsuite/gas/i386/x86-64-avx512f.s | 2 ++
binutils/gas/testsuite/gas/i386/x86-64-disp32.d | 10 ++++++----
binutils/gas/testsuite/gas/i386/x86-64-disp32.s | 3 +++
binutils/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d | 27 +++++++++++++++++++++++++++
binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d | 1 +
binutils/gas/testsuite/gas/i386/x86-64-localpic.d | 1 +
binutils/gas/testsuite/gas/mips/isa-override-1.d | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/isa-override-1.s | 31 +++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/micromips@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips.exp | 3 +++
binutils/gas/testsuite/gas/mips/mips1@isa-override-1.d | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips1@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips1@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips2@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips2@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips32@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips32@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32r2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32r3@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32r5@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips32r6@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips64r2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/mips64r3@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips64r5@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/mips64r6@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.d | 6 ++++++
binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.l | 2 ++
binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.l | 5 +++++
binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/octeon@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/r3000@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/r3000@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/r3000@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/r3900@isa-override-1.d | 5 +++++
binutils/gas/testsuite/gas/mips/r3900@isa-override-2.l | 4 ++++
binutils/gas/testsuite/gas/mips/r3900@isa-override-2.s | 18 ++++++++++++++++++
binutils/gas/testsuite/gas/mips/r5900@isa-override-1.d | 28 ++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/mips/r5900@isa-override-1.s | 23 +++++++++++++++++++++++
binutils/gas/testsuite/gas/ppc/altivec3.d | 1 +
binutils/gas/testsuite/gas/ppc/altivec3.s | 1 +
binutils/gas/testsuite/gas/ppc/e6500.d | 17 +++++++++++++++++
binutils/gas/testsuite/gas/ppc/e6500.s | 16 ++++++++++++++++
binutils/gas/testsuite/gas/ppc/power4.d | 11 ++++++++++-
binutils/gas/testsuite/gas/ppc/power4.s | 8 ++++++++
binutils/gas/testsuite/gas/ppc/power8.d | 32 ++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/ppc/power8.s | 32 ++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/ppc/power9.d | 35 +++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/ppc/power9.s | 35 +++++++++++++++++++++++++++++++++++
binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d | 1 +
binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 1 +
343 files changed, 7634 insertions(+), 2027 deletions(-)
@@ -26,7 +26,7 @@
90f07219c78f6fbe833f6a8d97241f12 bfd/aout64.c
dfd680952f562949fa8d794e805d3a88 bfd/aoutf1.h
452d573c99bb53a0fdc389974c30fe00 bfd/aoutx.h
f3d4e35d6f307b393e040b6eddd99c6d bfd/archive.c
7512be5babf8bf47c06751aec8f98a40 bfd/archive.c
7d7ab6c35eddfede93f6483db959cb39 bfd/archive64.c
856fa1fd1de1b78388efed90c5d4e406 bfd/archures.c
e4d15b25830892d20636bfca36e9d2d3 bfd/armnetbsd.c
@@ -41,7 +41,7 @@
30526348fd4f10cd8d1b294bca57f469 bfd/cache.c
149f2204ab9e082a2beb72dd6c04800d bfd/cf-i386lynx.c
568149baff1f9da8708a8a88c339adbd bfd/cf-sparclynx.c
9f78d96c43fb97f3c907c051d1394e43 bfd/ChangeLog
b07777046545f77fa63aa23c0744c85e bfd/ChangeLog
6474afde93f8e964e3d6dddffde3c41e bfd/ChangeLog-0001
48097790cbee8800147ba96a6dd07fc8 bfd/ChangeLog-0203
7d710529ca3fafb2bb57132df24957e3 bfd/ChangeLog-2004
@@ -60,7 +60,7 @@
ce363ffcdb2993ee84530554d0fb5a78 bfd/ChangeLog-9697
e63f6d01a376008a89e252c7b5cc1f6f bfd/ChangeLog-9899
2fe0e176436ab0d02d3c7935a6d3a66f bfd/cisco-core.c
78d34149208ff9ae34a174c9543f4a3a bfd/coff-alpha.c
f7e195b61128da8aafa8cdd8fd6cbf70 bfd/coff-alpha.c
6e0d8c53fc1e04f5345366b92ab9d804 bfd/coff-apollo.c
d79a5e816069e36bdfcd0873e41c6709 bfd/coff-arm.c
39e58cf7295ab4a56d9d8068b1bf0060 bfd/coff-aux.c
@@ -69,7 +69,7 @@
e8d05731a4478f362040f06713539674 bfd/coff-go32.c
ad06b2d8cb037bf4e2929d37067e5b3d bfd/coff-h8300.c
898a644b23a64839557ed04222f5b7b5 bfd/coff-h8500.c
971605ba0e6bf11a30e06feb8816da6f bfd/coff-i386.c
8a46389d366c3025426a4b03f6f8a93b bfd/coff-i386.c
aa95f9a368ab99dfc240812fca87b2db bfd/coff-i860.c
edda05e90bd876ccc203101f75bc0094 bfd/coff-i960.c
b2840cda9b56efffa90c3b4d40c9dfed bfd/coff-ia64.c
@@ -90,18 +90,18 @@
8a151b59e4fd8aa52fd76c93c4446625 bfd/coff-u68k.c
57f383b317a5840bb53d06d81ada8305 bfd/coff-w65.c
528e1da6ec7281aaed658344427f80cb bfd/coff-we32k.c
c358d958eeace3b01505de5f5a77869f bfd/coff-x86_64.c
d14998adcb7c1b964218bdec27110fa2 bfd/coff-x86_64.c
0b0869a068c766e51b4cf76d3e1e9398 bfd/coff-z80.c
e0a8d31280c4b392ef408b925197e980 bfd/coff-z8k.c
ba1edf4207bcb70084dd1364f998fd06 bfd/coff64-rs6000.c
93a92e68af3be1002f88ffa8b6c64185 bfd/coffcode.h
9f6a92785846a7b2d2fbc81fa14893c2 bfd/coffcode.h
59db348c8150307cd3d170a0c7b0db80 bfd/coffgen.c
53e0abe4adeaeefba981315b5c318fe6 bfd/cofflink.c
959cd45d9aa8364183f612abd5e13ef7 bfd/cofflink.c
80a1105b21ac56843e3440af2e88e298 bfd/coffswap.h
5e46070804158249faa239479c9835a1 bfd/compress.c
90ddcd055b26773cf8a1b668f9486cd1 bfd/config.bfd
45397e77d40a7a78658b196b6a486571 bfd/config.in
7db353c02e9c1ae35c38cbcaec362dbe bfd/configure
20fba26fcb3dca838f6a19ec9d6ce82c bfd/configure
70a8fcdb04d327cf6966837981fad165 bfd/configure.ac
87c233c6d57be786f95051802e4058a1 bfd/configure.com
c45eafe894c2c751938df9be1218860d bfd/configure.host
@@ -195,7 +195,7 @@
1c6e3e8c279bc5edbaa9d876b9dde41b bfd/cpu-z8k.c
8373bde8fa77a2939a85c16983a71910 bfd/demo64.c
dad496c68df8395b3cdb8e3187c37eb1 bfd/dep-in.sed
013a8959efd21d7448ba3dc29ef5babb bfd/development.sh
c2f83b76fba44d9b69cff84060e26868 bfd/development.sh
6a15b20bd56486434939c9db8e631728 bfd/doc/aoutx.texi
6f32bdfe0063cdb0c3aa73cceee3a1e1 bfd/doc/archive.texi
5cdadd0f131c05c50710c0f43fdffd58 bfd/doc/archures.texi
@@ -234,12 +234,12 @@
2b2af4fc0532d1286cd9293d8bda2f1d bfd/doc/syms.texi
2983e046b4641fb5cea6645b7c729e44 bfd/doc/targets.texi
52eeceea7d6afb4956faaaed3fb61ddf bfd/dwarf1.c
416cdb629419049fc37781d4be644a92 bfd/dwarf2.c
e3f61d8f330a90f60f64f20ecc89582e bfd/dwarf2.c
b1480d96d9ce9e5a8d85388bba90fd44 bfd/ecoff.c
c86d50c694ed7dd7e7c29fc5cb9bd469 bfd/ecofflink.c
fb0a60df94affe77c9469deef15b0e37 bfd/ecoffswap.h
186082e2982c0b45bc76c5b14aff0a50 bfd/elf-attrs.c
ebe7055d68e6616cad306dbb937f1a4e bfd/elf-bfd.h
467f75babc465f713a657aafb0f3ec92 bfd/elf-bfd.h
cb5391ab0874e0feb980fda65c7c7651 bfd/elf-eh-frame.c
ba731c6c6310d8f1735744526f85652a bfd/elf-hppa.h
c2c49cc6e971fdbb1826fe39b0d3653c bfd/elf-ifunc.c
@@ -249,14 +249,14 @@
cc7378f7be9df4889ce909abe61e8ba0 bfd/elf-nacl.c
c8eee41e3ba7a4807e87ba94d8d6517f bfd/elf-nacl.h
37162252a9fba8e37b186fe746c0fc59 bfd/elf-s390-common.c
d9125b8b9ea20be2b07955ef07f91a82 bfd/elf-strtab.c
721a26523b3f14f348c14721f80dcd7a bfd/elf-strtab.c
713f4b9b64be81889830029230ca84cd bfd/elf-vxworks.c
ec62dd6d1596fd6907545989b64c0ae3 bfd/elf-vxworks.h
6f23daed0984ac75836fa2238cecd344 bfd/elf.c
a06621f2e9e19b3a0c870c89d9981e40 bfd/elf32-am33lin.c
9348001db1cabaaf1bf8caa696c71888 bfd/elf32-arc.c
e156159d520cdd30cc7e4cb31533ddaf bfd/elf32-arm.c
43fd825cc51e95a273d8ac7dd1bd0287 bfd/elf32-avr.c
31b349d3a49080dccab7fedb17e7babc bfd/elf32-arm.c
8474285481f7d39c30695ac2a9b841d7 bfd/elf32-avr.c
4825b5543e9da82f4e67de1b2756a907 bfd/elf32-avr.h
272a3804fc0c2a10487fe10e1ece8b51 bfd/elf32-bfin.c
8c427ec63c32c40265c179d37af0df9b bfd/elf32-cr16.c
@@ -272,10 +272,10 @@
bfaf14e5ebb510563972e3677c41c6f4 bfd/elf32-ft32.c
4384a857565e33e249a6653e5bf4b31e bfd/elf32-gen.c
0e03f6b7ab90159d20bdc39a4f5e6dc7 bfd/elf32-h8300.c
d23cc913d157939801e0adf02ff571a7 bfd/elf32-hppa.c
49c5a06bb4978bd14b37fe6e88b7824e bfd/elf32-hppa.c
47aaef1745bba1b121b9d9a6418264f1 bfd/elf32-hppa.h
dddca64203a7a4cf47fba2bbe3568c55 bfd/elf32-i370.c
f76f3cab877e2a15f9fb48221dfb0479 bfd/elf32-i386.c
8f6a88fa98d9e204d3d539479497b2c3 bfd/elf32-i386.c
0f9b257edaa4d639c98bed4f3d7d1f8e bfd/elf32-i860.c
a181a4ceb9b279444ddbef4dda8e70fb bfd/elf32-i960.c
6288a09e8489b69b43bc03a6bb3e07cd bfd/elf32-ip2k.c
@@ -304,7 +304,7 @@
773a7434bb0d20a3e86d5684ece98bbf bfd/elf32-nios2.h
2396b8df691093984d864a1ee2a7f22f bfd/elf32-or1k.c
13b49ec86a60f7d301469611a1cbd769 bfd/elf32-pj.c
3598d646689c8ded0f90a488077ab50f bfd/elf32-ppc.c
65b623a3d2e6286d21446d1edabe9d2f bfd/elf32-ppc.c
1c47a2ac0e088e8b4fa7a1665ea82d7c bfd/elf32-ppc.h
fa2cd87f9263ee6611f2b6886cbecd8f bfd/elf32-rl78.c
9219bec6e5a10626c4e53cb3d81f8bf6 bfd/elf32-rx.c
@@ -339,25 +339,25 @@
c844ec58a10bb4cc230b3f05f7657d55 bfd/elf32.c
f9ad1e61d3a311291bda48cb9525c28b bfd/elf64-alpha.c
39560502f881f15a564da0b51fff9474 bfd/elf64-gen.c
f5d202632eeab6cc840fbb95fba0c4d2 bfd/elf64-hppa.c
cdebc4120c9538b5f5a16a5d4281bedf bfd/elf64-hppa.c
e301bdd246cdf7352ee89dbf73ea052c bfd/elf64-hppa.h
735dbeed6b53ec56f1d38c95d64c8572 bfd/elf64-ia64-vms.c
64f6bec36e44883df8ceae0157bb7a4e bfd/elf64-mips.c
63d5fb845312c59bb18f366624cfef17 bfd/elf64-mmix.c
d73078ad31d9d4463b8626ca6a7b29b7 bfd/elf64-ppc.c
1302b91438d9203ac4331b36bb960886 bfd/elf64-ppc.c
b99de008f441e769ed1ea74c48bc8c65 bfd/elf64-ppc.h
ea54bf44fa24a18be72088487f5c67b0 bfd/elf64-s390.c
ab757b52d04d271883af7520ed60567a bfd/elf64-sh64.c
947e7a938a8f7a15dbcdfaf2f8be1b08 bfd/elf64-sparc.c
f561858a2d9c9fa47ec6fc5da58195dd bfd/elf64-tilegx.c
7f8dd8061ac1d17d70fe4cf34cb127eb bfd/elf64-tilegx.h
554eed9e22e4482b584a8e0547842ee7 bfd/elf64-x86-64.c
6d8a31b49b57ae4295b95163c0377b10 bfd/elf64-x86-64.c
4b8318d1c5a15f1e11907bbf8028fd8f bfd/elf64.c
3618e275469dcaee6dbefe953f459ded bfd/elfcode.h
314ec50b8378d69f7fc5b39978ce4fdb bfd/elfcore.h
be53bfc70e071c7b7cdbed54c069ec90 bfd/elflink.c
5788044f9f4e674f2c7b3b6108bf83ae bfd/elflink.c
ada3c489f714b527eb9af21f4f1e39de bfd/elfn32-mips.c
eef0d623c67c3df35c77e0fc973195c4 bfd/elfnn-aarch64.c
2e589a0da854dd0f290f3a719a427c42 bfd/elfnn-aarch64.c
ed0439e121772c7277f519e9bf988b7f bfd/elfnn-ia64.c
40f5de3e5203e68c8d4edcec0e1fa2e7 bfd/elfxx-aarch64.c
7061d89aeed5ed2952f3696f81b27275 bfd/elfxx-aarch64.h
@@ -566,8 +566,8 @@
d379f86e2b08ffd6d7bceca24851adbd bfd/vaxnetbsd.c
8e86bd0a8bf7c16fe497da069c0b755c bfd/verilog.c
93144dbaaca7fbf982c23e9ec9b15c5f bfd/versados.c
5994b616ef4e640f7dbbdc07ea7ec55c bfd/version.h
1e33bd7b12e51c6c0e57a7cc48db7dfd bfd/version.m4
1694a1c1f58d6690c4538d9b4cd46ec2 bfd/version.h
72898b14b9576848142dce32f7392dfd bfd/version.m4
3b84d50356ebc92c4141f997928b1b1c bfd/vms-alpha.c
f9230e3b9c433e0ed8b5c5ef78e4f72d bfd/vms-lib.c
1428ad33a371a43e734c79a45fdc95df bfd/vms-misc.c
@@ -598,7 +598,7 @@
4c1bddc17c73563fb2c6967ce9e57a49 binutils/bucomm.c
189b992a4993eb8133ef8abbede8832c binutils/bucomm.h
e3cbfaab6366fc417fa9f42e38edabf8 binutils/budbg.h
c3c081d73b6757e9d84603c867286627 binutils/ChangeLog
312d66abea0d458fe1d5e65cc0a70fd1 binutils/ChangeLog
cd19eaa8aa273aa4d61d7349e18c3389 binutils/ChangeLog-0001
4dd4f6db448208624501492aaaa8ab38 binutils/ChangeLog-0203
9f7cd70e402801d73a0ca89c1d3f3c54 binutils/ChangeLog-2004
@@ -618,7 +618,7 @@
7f57a486c2ca7340fce5cd7c5fba31e6 binutils/coffgrok.c
329899694a09357aa82dffe3585e0f06 binutils/coffgrok.h
edd276aa817b0183982111da2166558f binutils/config.in
336c87dc82ffda41baec56849e941bc4 binutils/configure
872695fea1e5b8c682cedc8fd9f3eebf binutils/configure
d765c98b524c43d1cbf241b9af7e22a4 binutils/configure.ac
89b0b888b7e87c3abd5c7fb5e69fa889 binutils/configure.com
aa23adf7835ef9ed65d5b92052b9b168 binutils/configure.tgt
@@ -634,27 +634,27 @@
a73f6b06b319deb0cfc476cd3ba0a200 binutils/dlltool.c
e4d5451af3c65fafb5b3c188128cbd7d binutils/dlltool.h
502472caa79321b7c9ca33aabc84f081 binutils/dllwrap.c
e767196e2fd31d05eb44cef847e7e26c binutils/doc/addr2line.1
4fe2d24185fbc678f0c98681fa8d06e2 binutils/doc/ar.1
b0826007cf3fa0604a5cd205b5e68b0a binutils/doc/binutils.info
9d739608da232287a40e65ca8a593539 binutils/doc/binutils.texi
e8be534227d51d0aa0e8ffed3a07028d binutils/doc/cxxfilt.man
7db58baf430c41cd6f997da22d9aef8f binutils/doc/dlltool.1
4dde5ffcae9185d6f19b0174771ef9a7 binutils/doc/elfedit.1
98fb35d9b160f0d32d6c17da2389ea8a binutils/doc/addr2line.1
d41801af8bc580964edbedee39dd76fe binutils/doc/ar.1
fbece462978abdf1160353c2f28a6161 binutils/doc/binutils.info
86a2ec5ae86c8d9bfa23c19b2b069d85 binutils/doc/binutils.texi
498c487babaac5a24d7d3596e6b6e787 binutils/doc/cxxfilt.man
9f2cef0e5fd202f6dcc3246fd4ea7470 binutils/doc/dlltool.1
5f890f69496a640d4d3c3eb4799e0833 binutils/doc/elfedit.1
072910d553f79906db69fa7c0e956bba binutils/doc/fdl.texi
1a0cfc46628c7f270788d0456a9946e1 binutils/doc/Makefile.am
95e7f062c6ab9ee818d2863bbce577fa binutils/doc/Makefile.in
7aaf8ee0b2b4620bfe3dc874f27e1f52 binutils/doc/nlmconv.1
fb141891838551215be6790b8387d655 binutils/doc/nm.1
a7476b04d44a2c0088efafbfcb47642a binutils/doc/objcopy.1
3a93cbb0cadb4794a084286c66d9a6a1 binutils/doc/objdump.1
227f0020dbd47c50bd2d8a5f74d38bf5 binutils/doc/ranlib.1
b55eab7d5a56809329c3f78181b435a8 binutils/doc/readelf.1
a3b8bb9dfa66b461df4efaa9d85249f2 binutils/doc/size.1
0646224e747c49616b21ce74ed46a70f binutils/doc/strings.1
3b6347eadbdc20834b5213c6a56e84b7 binutils/doc/strip.1
53613f20a7c5250b37e0e7efcb685f92 binutils/doc/windmc.1
0daad75ccf6a5585afc9b9808c87b991 binutils/doc/windres.1
27bbf192408360eb7ff4cd97e2e2c2c9 binutils/doc/nlmconv.1
aec76c28d8e0a1cc83483b1833045559 binutils/doc/nm.1
852653fb1abc0a58d357555f860d36c6 binutils/doc/objcopy.1
e2f8db3bab4ff0b10d7a8c9a259dd6f1 binutils/doc/objdump.1
8f655823f845a2f06550f925e7516a25 binutils/doc/ranlib.1
43a59bb240576d4800af231d1a0cacf3 binutils/doc/readelf.1
110f12414b63e8876356ee3576a65ac5 binutils/doc/size.1
79d1b518fe9352836f395e3d39c6e3f0 binutils/doc/strings.1
48fd1efcccdaf76f39be93d6986c347c binutils/doc/strip.1
4a5d2996ec058f33072dc95c6a039fc6 binutils/doc/windmc.1
eadb5743cb31389288bf6996f27eb55e binutils/doc/windres.1
f83bed1d233e5fae3d3874e06d8d4d86 binutils/dwarf-mode.el
91e15aaf7ba959d83501bd875fafe299 binutils/dwarf.c
99846eacc0eb7c4386467f953d520759 binutils/dwarf.h
@@ -669,8 +669,8 @@
19820b8102de54867f3b11d5a1bb9e0c binutils/is-ranlib.c
fadf0149510e4e5343c6aa1e788a1244 binutils/is-strip.c
2db50becce5996bb2c073045a86b6bc1 binutils/MAINTAINERS
3ca7e266cb6a97f411841b5b94d24949 binutils/Makefile.am
d486b4228c62810e1cb0852c94581037 binutils/Makefile.in
cc01ec8a6fa4db18767483010383711d binutils/Makefile.am
e60cfc861ad1fdc72cd90682a74673cd binutils/Makefile.in
a2e15b203ce79c82dd0d72f43f74faae binutils/makefile.vms
7e9fe52c27c1f61f99a8bce5606108b4 binutils/maybe-ranlib.c
91e4055a97b03ad59b3800808dc7e12d binutils/maybe-strip.c
@@ -687,8 +687,8 @@
9e043319cd3e8ebdecb0f17e280093d8 binutils/nm.c
acb27011b5559d35c20803219a3b2d4f binutils/not-ranlib.c
f6166c40bf03726220fac2cfe899c07c binutils/not-strip.c
619fd71c45d0415ace8a362187d6c83a binutils/objcopy.c
b9f574fc9a550ab668219d7aca38f4d1 binutils/objdump.c
3757b7d04ca573d73b964e3c88c26e28 binutils/objcopy.c
5fd90ad55c315cc704c45f0d08313f46 binutils/objdump.c
6c4e71270bd6308aceaac0c943edef92 binutils/objdump.h
fdab45a578a1b5da1fd1fce8e889c273 binutils/od-elf32_avr.c
9d83db2fcaf2df71025db2ef81f3e7f6 binutils/od-macho.c
@@ -776,7 +776,7 @@
3955dbe519edecbbe095df39e275b977 binutils/testsuite/binutils-all/add-symbol.d
24eb345e58fdf80d67e58d68e5bf387a binutils/testsuite/binutils-all/alias-2.def
aa7cb333b47f17c932b8e0a902de43ba binutils/testsuite/binutils-all/alias.def
614fbb38e3b5dd3fdb55dea60216e125 binutils/testsuite/binutils-all/ar.exp
fe7336b3cb44aac07aee6fb9605264aa binutils/testsuite/binutils-all/ar.exp
0deaff130aa105e6ce4c81000b320f6c binutils/testsuite/binutils-all/arm/objdump.exp
43beb1a606d1911f807c8247d324e1b1 binutils/testsuite/binutils-all/arm/rvct_symbol.s
e4d6bc1d9f91e3dd9fc1bdc748097b83 binutils/testsuite/binutils-all/arm/simple.s
@@ -784,7 +784,7 @@
09f9a775d510397e6635a41669309483 binutils/testsuite/binutils-all/bfin/objdump.exp
0deee19f6dd6cb7ada1e41b03202e52c binutils/testsuite/binutils-all/bfin/unknown-mode.s
34d0ab842ffa4318e8cbe2bba4c565dd binutils/testsuite/binutils-all/bintest.s
1c67414411628c2e2a41b39db1eac356 binutils/testsuite/binutils-all/compress.exp
b88335390266fde4e72199e100744054 binutils/testsuite/binutils-all/compress.exp
46f213c0bf7293623c7c95c1ae72c5cc binutils/testsuite/binutils-all/copy-1.d
7818c4638e7c83453b51ea5f50b17d62 binutils/testsuite/binutils-all/copy-1.s
ab57c3ecd68aee03109e529a8e566753 binutils/testsuite/binutils-all/copy-2.d
@@ -815,6 +815,7 @@
ba1e1fa26126181fa3c061a7fae2f411 binutils/testsuite/binutils-all/elfedit-4.d
4f2f0c25bba029f0f44c619bf06a40a5 binutils/testsuite/binutils-all/elfedit-5.d
cb84a287dbc09fc0e624218be7c25607 binutils/testsuite/binutils-all/elfedit.exp
d41d8cd98f00b204e9800998ecf8427e binutils/testsuite/binutils-all/empty
d41d8cd98f00b204e9800998ecf8427e binutils/testsuite/binutils-all/empty-file
bb4a5bfbe0b4ad2e68e63a1765e34a2a binutils/testsuite/binutils-all/empty.s
4a5e353c23801ad5d7f1705efc5f42ed binutils/testsuite/binutils-all/exclude-1.s
@@ -990,7 +991,7 @@
bcd1dd464bf3b655fcdbd47a8bc69791 binutils/testsuite/binutils-all/x86-64/compressed-1c.d
d0356c42ab17b6aff6465eaeeeaa4957 binutils/testsuite/binutils-all/x86-64/x86-64.exp
65f22f4233864793807427df9acc22c0 binutils/testsuite/binutils-all/z.s
996dacce6f36d693609e584d81c04aed binutils/testsuite/ChangeLog
cbc134338342456a97e94e5db8d5a454 binutils/testsuite/ChangeLog
de5c1ea13b9c755566331e8cb382b2d1 binutils/testsuite/ChangeLog-0411
bf0ea0640752ce55976e88633c107ad4 binutils/testsuite/ChangeLog-9303
6b0937139cbee88d21b95b2bdc67a40f binutils/testsuite/config/default.exp
@@ -1155,7 +1156,7 @@
8b59f0d0a2dcdced14765c514fbad719 depcomp
251318b68d2653904bb14a998d8cfae6 elfcpp/aarch64.h
4a92391e0eba8968e6c8450b4772f66a elfcpp/arm.h
ef32fdd052e2afabd4e6e2d9e083d3b3 elfcpp/ChangeLog
82d5de826a9e05433df14c5a6dbc574f elfcpp/ChangeLog
2cfa05768c4e3a65f8ef021a9e78e376 elfcpp/dwarf.h
f51455185edce01a495ea40b34ebb1e7 elfcpp/elfcpp.h
84309d8c836dcfeff7d65f57cb96d0e9 elfcpp/elfcpp_file.h
@@ -1189,7 +1190,7 @@
1d13dd6b994ed174f1a65bc2c0b6939b gas/bit_fix.h
4da728b3d448fd2235d6423de0676a17 gas/cgen.c
a336cad5b483ae20b298a858ceeb082e gas/cgen.h
036d97046b43803bfc355a5dbddf4dd5 gas/ChangeLog
07fd3b014285a1710ff513e26dc7daba gas/ChangeLog
0d061093e74e74909ca9642f6d461c63 gas/ChangeLog-0001
39da59e7e8e3c3bce29730ab9337f21e gas/ChangeLog-0203
d2da9287ff389ddf7925fae5e8ce27a3 gas/ChangeLog-2004
@@ -1254,7 +1255,7 @@
e152fe6e56f8e0fb8b4b3c96194e478e gas/config/tc-aarch64.h
ee60392f6ec9042d74189beaf163c793 gas/config/tc-alpha.c
007c02ecb9d98e4508e240af48b5bbed gas/config/tc-alpha.h
03669c48227d9624a3cf5d16492ce811 gas/config/tc-arc.c
d93818b694c47e7fb24784fec7f8477c gas/config/tc-arc.c
8a7c595efc9dbb84ec5e0c846009f2a3 gas/config/tc-arc.h
ecbe57c71a4e18e2c948fe43fe64fa28 gas/config/tc-arm.c
e5021d738b3dc73cf5339130b393dbf7 gas/config/tc-arm.h
@@ -1291,7 +1292,7 @@
acf049a97fa10646782a1db4548d7998 gas/config/tc-i370.c
d1c7019c344ba7c926db178c1fbcb613 gas/config/tc-i370.h
470c7fc8b94e17d193aeb8d9493ec365 gas/config/tc-i386-intel.c
23158bc3c69944c11b053f7c37ab85ca gas/config/tc-i386.c
2d00fd5d51cda1b37ff7fa3cd482e12e gas/config/tc-i386.c
ae2554143decc07fb33f94f06e924849 gas/config/tc-i386.h
16e3610474a710ac473f9862d80e2b38 gas/config/tc-i860.c
6b19b6f9d8ef78249fa4c76fa986b4a0 gas/config/tc-i860.h
@@ -1322,7 +1323,7 @@
13f9330a6c76377b040acdd05b070566 gas/config/tc-metag.h
e1833cf5f84808044da632e2d01f5a13 gas/config/tc-microblaze.c
f88d3be41905cc5e21beba4afc4a29f8 gas/config/tc-microblaze.h
97b0669c60ece7826a0c279a2c1f9d7c gas/config/tc-mips.c
9be17fe8f0d77d6a867e16fb6be2e228 gas/config/tc-mips.c
fdb38f802f2fc2dfeaab726fbcee8762 gas/config/tc-mips.h
404ad4941c20ab0225bc34f019f07b47 gas/config/tc-mmix.c
d6ee9195875bf9cf4db5aafad4075952 gas/config/tc-mmix.h
@@ -1447,9 +1448,9 @@
8138a255c1570a0981cc8ecd70b5ff4b gas/config/xtensa-istack.h
4e763ff05d89a7c153e680815718c494 gas/config/xtensa-relax.c
915703ef003fee0010da44538d96edfb gas/config/xtensa-relax.h
3058ca2466a1acfad5b162c01084eebf gas/config.in
8085bf3c22ba220ee4ee34e2b1278aa8 gas/configure
3f1a4c47502c68515a8017b233fda4ee gas/configure.ac
1cf41cc9e873a36284c726113f3e3079 gas/config.in
f3e956f0e7cf6bcaae3373b52e1b02b8 gas/configure
b38fa60f75f7016d98f5a01cd3a4a807 gas/configure.ac
539db704cbf59459e1bf22280dbdae21 gas/configure.com
6f839f8cc8ee870561074c4040f369b9 gas/configure.tgt
96c9bf4b632366f37a61d648a48c2a01 gas/CONTRIBUTORS
@@ -1458,8 +1459,8 @@
36285069bae7f4dca379829241710bd4 gas/dep-in.sed
d01e8a0b23b63cdb29409f3ce18b3037 gas/depend.c
0a6b4c0efb5e9743a8b1c0b3e20d2683 gas/doc/all.texi
1b39acd3b2d0832865fddba053fe067d gas/doc/as.1
01f6ef64d6c18db0b9cd276ee07c5ede gas/doc/as.info
29380d73aca9ec7ead00d9c0566a78b8 gas/doc/as.1
26e7273e421bcae87f4aea475ae2dd93 gas/doc/as.info
aecb717c051dc84288ef677c41c41e1c gas/doc/as.texinfo
0a6b4c0efb5e9743a8b1c0b3e20d2683 gas/doc/asconfig.texi
c55844a6d5504668d759e1aa16e4121b gas/doc/c-aarch64.texi
@@ -1476,7 +1477,7 @@
a4a75b23f988dcab918db13a42bc9351 gas/doc/c-h8300.texi
02f4c14643e574ea198c51b1eec4ad4f gas/doc/c-hppa.texi
7ae7e47e9eb18681d639cbf4b0ebde1d gas/doc/c-i370.texi
ba9ea706eae1d79514cd7d838f4d1e23 gas/doc/c-i386.texi
0ee2743adc7e50817e981414c55ab79b gas/doc/c-i386.texi
6a0885dfa2c2bc590269e4c35f5bf55d gas/doc/c-i860.texi
e2de37951d1afbc029d32c7ec10193ef gas/doc/c-i960.texi
b6c0edddcfcbd9a884eba2132c2c4a92 gas/doc/c-ia64.texi
@@ -1566,7 +1567,7 @@
be86a992257a2930ab846f4690cf1cbe gas/Makefile.in
649434e5a7de21073e24895e505dc003 gas/makefile.vms
cd2baf56aeee273b5970dfb01f153fc3 gas/messages.c
29ab9a2d44e9ee6720246ccb287077d2 gas/NEWS
56aa0acb27a13342d48975f2451916a2 gas/NEWS
f264aa385881e47987e74ce834a7bc14 gas/obj.h
adeda5c2fe15e0b6fcd9c10da810e0f8 gas/output-file.c
0ef68f9dbd6f53e517d0026ba03b946a gas/output-file.h
@@ -1611,7 +1612,7 @@
7e9770daa2d940407d197366b6ae98be gas/symbols.c
de4bfddfe2ea35f70d60022abc1e4db8 gas/symbols.h
85cf9918b3bbc8fdb5ee47eb2f59c7cf gas/tc.h
16524a7af83cb0226dfd2c115cb6c334 gas/testsuite/ChangeLog
0b9015022758b29b242bb0bdf1fadade gas/testsuite/ChangeLog
14fc7b3609d295401d73a8ed4b4d45fa gas/testsuite/ChangeLog-2004
63be8f223de1fb2204bbcea923f61fc0 gas/testsuite/ChangeLog-2005
62131108df2db595f5ed0f2daf6d3c3f gas/testsuite/ChangeLog-2006
@@ -4180,8 +4181,8 @@
f5eae70842a215bcac877e124765f9b8 gas/testsuite/gas/i386/disp-intel.d
a31dea706d02991a25bb3fa43e910339 gas/testsuite/gas/i386/disp.d
2edcd8110d38767edd6cbddbd90cdc3b gas/testsuite/gas/i386/disp.s
2c4ae25a8cf0c90ba826c54757cfa270 gas/testsuite/gas/i386/disp32.d
89cf1664ea56348177b78ee790716009 gas/testsuite/gas/i386/disp32.s
9be16ae9bd6edb4a43109796affddf5d gas/testsuite/gas/i386/disp32.d
326947b6cde49623b81c0f828c429720 gas/testsuite/gas/i386/disp32.s
189be01fb122304d37ce73bc98f846c0 gas/testsuite/gas/i386/divide.d
33c0d04dc841d220224f80125d856600 gas/testsuite/gas/i386/divide.s
6227b1a4f5ab44c64dea85cc84003d44 gas/testsuite/gas/i386/dw2-compress-1.d
@@ -4226,7 +4227,8 @@
81a2842104b82fd33309bf1e53ef590f gas/testsuite/gas/i386/fsgs.s
8080d881efa149202b251d632f28cb7c gas/testsuite/gas/i386/general.l
1db75486be70699071b9a6564e5f843a gas/testsuite/gas/i386/general.s
dcc6836a905806d8f40447ace5ffe597 gas/testsuite/gas/i386/got.d
812f5b52ace4d2f7ad82a77d1f4b813a gas/testsuite/gas/i386/got-no-relax.d
305bae4634272958ef2c0eb73713a7b6 gas/testsuite/gas/i386/got.d
5525a78800247e53171caaa6db9b45c6 gas/testsuite/gas/i386/got.s
f6f171e3ed5e8b2fb2a22b376eb49f3f gas/testsuite/gas/i386/gotpc.d
b518d2eb2658745af0bf58cbd295eec9 gas/testsuite/gas/i386/gotpc.s
@@ -4237,7 +4239,7 @@
513556f26a0aedd8f86611a105d215a1 gas/testsuite/gas/i386/hlebad.s
8509b64e7bfcf26aa8639b3c21aefb64 gas/testsuite/gas/i386/i386-intel.d
c42f10e9f4ecdddcbd48ea204dec710b gas/testsuite/gas/i386/i386.d
33340267d6dae886d9617b2abf4668b0 gas/testsuite/gas/i386/i386.exp
8ff61c2f51b829835d471f7363d1072c gas/testsuite/gas/i386/i386.exp
8eb567b76b592760d5316213b76a6d85 gas/testsuite/gas/i386/i386.s
fa313b52e3dad04bbf2e19471e4e62dc gas/testsuite/gas/i386/iamcu-1.d
318a8c8175d455b189e2b2379fb408d0 gas/testsuite/gas/i386/iamcu-1.s
@@ -4334,13 +4336,13 @@
74a1273930b2fb5a7e35fc06f0d6ded9 gas/testsuite/gas/i386/ilp32/x86-64-fma.d
4a8752c77dea49095e2ec253901d5b41 gas/testsuite/gas/i386/ilp32/x86-64-fma4.d
bae71559c8ddcd78dcdaec3d6c2d58f0 gas/testsuite/gas/i386/ilp32/x86-64-gidt.d
0ad6f52a2a87c00f88fe4e65507b66fc gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d
f119280b3290ec3d1536725d87c2bfcd gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d
014193fbdf50f4329bf3ed93939da480 gas/testsuite/gas/i386/ilp32/x86-64-ifunc.d
2b6b30a70c44b1f6d7b43422cd8a3bdb gas/testsuite/gas/i386/ilp32/x86-64-intel64.d
936620a646d933b03cc0147b2cba197d gas/testsuite/gas/i386/ilp32/x86-64-io-intel.d
7c42815fc7ee869e680ce040ad84a806 gas/testsuite/gas/i386/ilp32/x86-64-io-suffix.d
ab54e31e7d3cc6ae308d25d2f6660952 gas/testsuite/gas/i386/ilp32/x86-64-io.d
0c548da23fee3a737649f927a85a7a9c gas/testsuite/gas/i386/ilp32/x86-64-localpic.d
5931f21c6ee89a8d405fddcaf192958a gas/testsuite/gas/i386/ilp32/x86-64-localpic.d
40ede28427b82ae3e4658a49ff8cbeab gas/testsuite/gas/i386/ilp32/x86-64-mem-intel.d
9e634631cd34df405fd8be627b1b88d8 gas/testsuite/gas/i386/ilp32/x86-64-mem.d
703fabc67572478eb6db8a13bd74e916 gas/testsuite/gas/i386/ilp32/x86-64-movbe-intel.d
@@ -4472,7 +4474,7 @@
ecaf63b5fb174b39641263c157f857fa gas/testsuite/gas/i386/list-2.s
52c75ea4e411d04c5971c3e8dec8f013 gas/testsuite/gas/i386/list-3.l
7466e291420e797a803e9201ef88c039 gas/testsuite/gas/i386/list-3.s
e858f0dda226bcfcfa08070af9ed5530 gas/testsuite/gas/i386/localpic.d
17ac2efac6993bf77816210e2716be2d gas/testsuite/gas/i386/localpic.d
4e09ecab41571383910000edd7515775 gas/testsuite/gas/i386/localpic.s
74720fc7bc721c83eae64f2dc2ba94aa gas/testsuite/gas/i386/lock-1-intel.d
fdb142aa76fad022fa423552cde40462 gas/testsuite/gas/i386/lock-1.d
@@ -4488,7 +4490,7 @@
5fe4ae6c810ca1e91f8c8bc7630de456 gas/testsuite/gas/i386/mem.d
5926795552df7942d593482625c9c50b gas/testsuite/gas/i386/mem.s
d004208db701b4e9c43957689eb71dab gas/testsuite/gas/i386/mixed-mode-reloc.s
6627b6a2216384a45dd3ce980f42fdec gas/testsuite/gas/i386/mixed-mode-reloc32.d
65fc8f848188ea62a031de4a8d58cc10 gas/testsuite/gas/i386/mixed-mode-reloc32.d
1a9a6d6fe88eae5e8078601c11309e0d gas/testsuite/gas/i386/mixed-mode-reloc64.d
d566afc7ce85d649e11306e09c745945 gas/testsuite/gas/i386/modrm.l
1d1696a1b6db5c16aa2463cdd8b6a045 gas/testsuite/gas/i386/modrm.s
@@ -4594,7 +4596,7 @@
af8b77b677b0bd3471e7ca21a60c445a gas/testsuite/gas/i386/relax.s
cd3c7378640156c530cbd28aa6ee9e02 gas/testsuite/gas/i386/reloc.d
785e2743dba0137e0235c3a40f7ed72b gas/testsuite/gas/i386/reloc.s
6faa76753093f5895caf20c2b3db22f4 gas/testsuite/gas/i386/reloc32.d
382a51fac074e4cb820104c07d2c2e5d gas/testsuite/gas/i386/reloc32.d
939621de3976cefba8bd3d1dc25add90 gas/testsuite/gas/i386/reloc32.l
95e39f08b7e597015e6aa6d3198a359d gas/testsuite/gas/i386/reloc32.s
e986c6f69f9df6cc1ce0ecab8d02d83f gas/testsuite/gas/i386/reloc64.d
@@ -4805,7 +4807,7 @@
eafb195ed46984f0a470c97dfeff9e12 gas/testsuite/gas/i386/x86-64-avx512er-rcigrz.d
b4b316ebc29731256c45a176127f1702 gas/testsuite/gas/i386/x86-64-avx512er.d
e3a37b129b6d2b39bf51ce9817c9d2bc gas/testsuite/gas/i386/x86-64-avx512er.s
eca0cd092e7aaccddd1329679b279a15 gas/testsuite/gas/i386/x86-64-avx512f-intel.d
bc15dd86ce6ec533adc7fb3257cbe23b gas/testsuite/gas/i386/x86-64-avx512f-intel.d
9e3b832a539785b346e31c32f60e620a gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
78c5ac7de333d4bbae186fb70e6ad4cd gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
1391c64b4041a0de58a3823084e8f5de gas/testsuite/gas/i386/x86-64-avx512f-opts-intel.d
@@ -4820,8 +4822,8 @@
9e05798de894a55694fc348a0b19c287 gas/testsuite/gas/i386/x86-64-avx512f-rcigru.d
7f80a41f32c4db4c71ffc2b6420b7660 gas/testsuite/gas/i386/x86-64-avx512f-rcigrz-intel.d
eab82109da44b6db29387bb3d32d1c2f gas/testsuite/gas/i386/x86-64-avx512f-rcigrz.d
1410cdf603b3ce9490451989c3fcd482 gas/testsuite/gas/i386/x86-64-avx512f.d
ce1f113ced4a25429c472fed23378144 gas/testsuite/gas/i386/x86-64-avx512f.s
d085b260b0ff7450e5f5a56e0223bb5f gas/testsuite/gas/i386/x86-64-avx512f.d
0e4f9c341cf76c46bc4181664fd1ecb2 gas/testsuite/gas/i386/x86-64-avx512f.s
1631f9b65a631800801ac4fdec6fc924 gas/testsuite/gas/i386/x86-64-avx512f_vl-intel.d
6fbc7fff434653e0b8ab934cda97871b gas/testsuite/gas/i386/x86-64-avx512f_vl-opts-intel.d
979f295d26c6c467d40f6247c48b2d2f gas/testsuite/gas/i386/x86-64-avx512f_vl-opts.d
@@ -4885,8 +4887,8 @@
1032228937b3c89c054aaa3d57409641 gas/testsuite/gas/i386/x86-64-disp-intel.d
1770f507d85c5d10503e2387e31a86de gas/testsuite/gas/i386/x86-64-disp.d
b80fd8ed96178c27c38fd768587671dc gas/testsuite/gas/i386/x86-64-disp.s
014bc358507a6c197f48a29611f50681 gas/testsuite/gas/i386/x86-64-disp32.d
8f16c8d3bf799ef129667a065177d2a7 gas/testsuite/gas/i386/x86-64-disp32.s
cfb92dcd304aa8aca8fdfd9e192e5694 gas/testsuite/gas/i386/x86-64-disp32.d
704121fc4383cc25e9d5ef4b45a3fb15 gas/testsuite/gas/i386/x86-64-disp32.s
7ea4308b329685e530be74addaac7c94 gas/testsuite/gas/i386/x86-64-drx-suffix.d
601a338970ce4ec3f3105cd754da7d70 gas/testsuite/gas/i386/x86-64-drx.d
3a07eba6a88df41e1026628ed70fc0f7 gas/testsuite/gas/i386/x86-64-drx.s
@@ -4925,7 +4927,8 @@
514a99c306d6be131106fffaad17a286 gas/testsuite/gas/i386/x86-64-fxsave.s
f3980dbba32c8b1971090a7171fc74cf gas/testsuite/gas/i386/x86-64-gidt.d
a7520374ab1003bb34da98f1092259f4 gas/testsuite/gas/i386/x86-64-gidt.s
308b651e92a5ddf04918f0ce63669782 gas/testsuite/gas/i386/x86-64-gotpcrel.d
6c2b75e2332f47fec0d840342b8a40ec gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
e4fff07021b7dca2a3cce74564f3e6b7 gas/testsuite/gas/i386/x86-64-gotpcrel.d
3b9cca84c07612c84654114b283b70fe gas/testsuite/gas/i386/x86-64-gotpcrel.s
f5a790bb28580529816a6c699b60bd78 gas/testsuite/gas/i386/x86-64-hle-intel.d
2ec2e9c84812ea43d985b8a0ace68944 gas/testsuite/gas/i386/x86-64-hle.d
@@ -4962,7 +4965,7 @@
b41fdb1ead1f865980afbb60003170e5 gas/testsuite/gas/i386/x86-64-io.s
62f8f6567ea4d22edf3782413a37a34c gas/testsuite/gas/i386/x86-64-jump.d
5d6b835e9283907a3eb3cbe7158ed97c gas/testsuite/gas/i386/x86-64-jump.s
db38801121dd5a80f650a34429efb583 gas/testsuite/gas/i386/x86-64-localpic.d
f489bbe7f097f0a44c472e4dd794268b gas/testsuite/gas/i386/x86-64-localpic.d
72d3840189715b3135f0c0f813173f51 gas/testsuite/gas/i386/x86-64-localpic.s
bb6a0e9ffcc1b7b608131bb2c950cdbb gas/testsuite/gas/i386/x86-64-lock-1-intel.d
f5c2950078d64dec53bdcc74469819ee gas/testsuite/gas/i386/x86-64-lock-1.d
@@ -6144,6 +6147,10 @@
75704852136f9d0d9888c8899cca307e gas/testsuite/gas/mips/illegal.s
1f6aeeea2b1c171ef1f347306328ea2d gas/testsuite/gas/mips/insn-opts.d
157194613aebe4cf1ce7d93b6c34abaa gas/testsuite/gas/mips/insn-opts.s
98b128e157da4525960b5d15c71885c4 gas/testsuite/gas/mips/isa-override-1.d
17bb98e2f9b131d6879be6bfbdb2ca03 gas/testsuite/gas/mips/isa-override-1.s
3b53f53eb69898ecaf2eb316fcebd23a gas/testsuite/gas/mips/isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/isa-override-2.s
b47234477b017d8640d0a583d17b44cb gas/testsuite/gas/mips/itbl
3be9cfa967f82e0b4325b152baf0f23a gas/testsuite/gas/mips/itbl.s
45f0c80b7327d4d02804ed71299fdc2b gas/testsuite/gas/mips/jal-mask-1.s
@@ -6377,6 +6384,7 @@
205a6d0b08e666474306b84deddf3413 gas/testsuite/gas/mips/micromips@hilo-diff-el-n32.d
fd3171bfdf5dc393ab28f13fd3d3a819 gas/testsuite/gas/mips/micromips@hilo-diff-el-n64.d
3aef5cb687a3969ffa114243e471a789 gas/testsuite/gas/mips/micromips@hilo-diff-el.d
067755f2412192462b8bfbebfb8d7f86 gas/testsuite/gas/mips/micromips@isa-override-1.d
3e6195b177a70ae0bc181d911a09b03c gas/testsuite/gas/mips/micromips@jal-mask-11.d
e98a1cc4672ad58c154dde8a4622a55d gas/testsuite/gas/mips/micromips@jal-mask-12.d
ae39ffcb13472ac744b2ef316cd7be8f gas/testsuite/gas/mips/micromips@jal-svr4pic-noreorder.d
@@ -6469,7 +6477,7 @@
cce840b0285e8acb86caa07b81590dfb gas/testsuite/gas/mips/mips-macro-ill-nofp.s
deb1c801ef639ed932140d2dba02b95b gas/testsuite/gas/mips/mips-macro-ill-sfp.l
066c4e7b6705e4be69dee6e1a61e6aa7 gas/testsuite/gas/mips/mips-macro-ill-sfp.s
ea3e336bcfd99be929177d8c782ff690 gas/testsuite/gas/mips/mips.exp
950a796ee9efdee3aec135bde25de82b gas/testsuite/gas/mips/mips.exp
ecd528ef55fcd4bf25735c42a267b196 gas/testsuite/gas/mips/mips1-fp.d
853dd7e0a531e1db7f1466305a34eacb gas/testsuite/gas/mips/mips1-fp.l
71870b79356e4b8f1d5fbc649f0991ec gas/testsuite/gas/mips/mips1-fp.s
@@ -6522,6 +6530,9 @@
214b27ce6c50ab9b455cb925a9745678 gas/testsuite/gas/mips/mips16e.s
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips1@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips1@ecoff@sd.d
e9810fecb6a3084bfcff78c1ab1024ce gas/testsuite/gas/mips/mips1@isa-override-1.d
3649aa3cd2888cbb623c9afc7188bf09 gas/testsuite/gas/mips/mips1@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips1@isa-override-2.s
823c8780c34e6454d4f01ae4e3ea6b6a gas/testsuite/gas/mips/mips1@jal-svr4pic-noreorder.d
2d77e7b8cb5805b8bfe19abd8653770c gas/testsuite/gas/mips/mips1@jal-svr4pic.d
1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/mips1@l_d-forward.d
@@ -6534,6 +6545,9 @@
ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips2@ecoff@ld.d
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips2@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips2@ecoff@sd.d
7baa0354d7306d9e6eb2a136b6520d4f gas/testsuite/gas/mips/mips2@isa-override-1.d
564dd0a6f54cecdd7fdc00d35051584e gas/testsuite/gas/mips/mips2@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips2@isa-override-2.s
3ac8c01b5ac399868c084635f6d51e96 gas/testsuite/gas/mips/mips32-cp2.d
7cc55a669e39543bfc17a8523c8e6ae0 gas/testsuite/gas/mips/mips32-cp2.s
f17b99c50b7ac4f49295f6fb3a21c17d gas/testsuite/gas/mips/mips32-dsp.d
@@ -6555,6 +6569,9 @@
ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips32@ecoff@ld.d
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips32@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips32@ecoff@sd.d
6c48c74d1b4fd81f31483c363f2162b4 gas/testsuite/gas/mips/mips32@isa-override-1.d
8d814c743e67da1ea7fa6e2df3d00caf gas/testsuite/gas/mips/mips32@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips32@isa-override-2.s
be0eb533ebc0379d9c0babb2185c5f07 gas/testsuite/gas/mips/mips32r2-cp2.d
43f63601c20612d60d43155640818766 gas/testsuite/gas/mips/mips32r2-cp2.s
e3a8b21bb26ed5d1b4704477725bb733 gas/testsuite/gas/mips/mips32r2-fp32.d
@@ -6574,6 +6591,18 @@
ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/mips32r2@ecoff@ld.d
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/mips32r2@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/mips32r2@ecoff@sd.d
63dfde19a522bc8b7eabe25a63495c96 gas/testsuite/gas/mips/mips32r2@isa-override-1.d
8237b5f25a1bc41a8c0e51f73451985c gas/testsuite/gas/mips/mips32r2@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips32r2@isa-override-2.s
7f8f37eea9d93541b049411c6257bd7f gas/testsuite/gas/mips/mips32r3@isa-override-1.d
49e8351ad12dc51c39a9ce512766ea41 gas/testsuite/gas/mips/mips32r3@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips32r3@isa-override-2.s
7f8f37eea9d93541b049411c6257bd7f gas/testsuite/gas/mips/mips32r5@isa-override-1.d
fd643af720b9798d658abe77e565c04e gas/testsuite/gas/mips/mips32r5@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips32r5@isa-override-2.s
7f8f37eea9d93541b049411c6257bd7f gas/testsuite/gas/mips/mips32r6@isa-override-1.d
dfc6eaf53b32500b173d1030a9cb4d1b gas/testsuite/gas/mips/mips32r6@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/mips32r6@isa-override-2.s
9ccc3aa4ff6b2df17149fd1b5f23b389 gas/testsuite/gas/mips/mips4-branch-likely.d
663815c07b7dc27f751e08e542959898 gas/testsuite/gas/mips/mips4-branch-likely.l
4b23881c6c4acda288472e518f42f70c gas/testsuite/gas/mips/mips4-branch-likely.s
@@ -6607,6 +6636,10 @@
813b1f7f0ece03c4c2566ee2e85529b0 gas/testsuite/gas/mips/mips64r2-ill.s
93bdf08a776611466cca4c3304b8384d gas/testsuite/gas/mips/mips64r2.d
bb49ade11c2fd90af659940cd085b04c gas/testsuite/gas/mips/mips64r2.s
95c6182482840227842b18903f426215 gas/testsuite/gas/mips/mips64r2@isa-override-1.d
d504a9e1e6fdba8e19071d642ebc0ce3 gas/testsuite/gas/mips/mips64r3@isa-override-1.d
d504a9e1e6fdba8e19071d642ebc0ce3 gas/testsuite/gas/mips/mips64r5@isa-override-1.d
d504a9e1e6fdba8e19071d642ebc0ce3 gas/testsuite/gas/mips/mips64r6@isa-override-1.d
10420f4a6cfd9386b1147576f35df026 gas/testsuite/gas/mips/mipsel16-e.d
a4cfc02749065440d658caccd7f6feba gas/testsuite/gas/mips/mipsel16-f.d
8f807c082437d3588960a20872739cc4 gas/testsuite/gas/mips/mipsr6@24k-branch-delay-1.d
@@ -6746,6 +6779,11 @@
7e8ab00c12a2517da37413c624e3bf69 gas/testsuite/gas/mips/octeon2.s
814421bb0c131ca3d2252e5bb537f07c gas/testsuite/gas/mips/octeon3.d
2cab5575fdb8e60a6e3dfe4e67a7551f gas/testsuite/gas/mips/octeon3.s
afd15bad22f8efa702b61670c3418ee1 gas/testsuite/gas/mips/octeon3@isa-override-1.d
80d3c6229af5692b8640dfa8fdef3aed gas/testsuite/gas/mips/octeon3@isa-override-1.l
5dcead0e13f34e682a6ccdfc30406fd6 gas/testsuite/gas/mips/octeon3@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/octeon3@isa-override-2.s
d504a9e1e6fdba8e19071d642ebc0ce3 gas/testsuite/gas/mips/octeon@isa-override-1.d
b01faab0afc57debbb4b0fb3e5ec1e3c gas/testsuite/gas/mips/octeon@mips32r2-sync.d
5761aa099e32b2fb86dce98a61bf78fc gas/testsuite/gas/mips/odd-float.d
95ed2d0da0ad874beed09ec727b4e16b gas/testsuite/gas/mips/odd-float.s
@@ -6767,6 +6805,9 @@
b981910e16055769981d610b35544eec gas/testsuite/gas/mips/pref.d
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/r3000@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/r3000@ecoff@sd.d
013eff4b625d321950cb7285fd5e314e gas/testsuite/gas/mips/r3000@isa-override-1.d
3649aa3cd2888cbb623c9afc7188bf09 gas/testsuite/gas/mips/r3000@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/r3000@isa-override-2.s
4ca43985c965ed9a9f0ce0ccf74b939f gas/testsuite/gas/mips/r3000@jal-svr4pic-noreorder.d
b513db2b66766dc702d2e90438349615 gas/testsuite/gas/mips/r3000@jal-svr4pic.d
1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/r3000@l_d-forward.d
@@ -6779,6 +6820,9 @@
ec50b9a1794608609e529cfdd4e5b558 gas/testsuite/gas/mips/r3900@ecoff@ld.d
e1e66a37e6e87b3e986eda3ad5b562a4 gas/testsuite/gas/mips/r3900@ecoff@sd-forward.d
4bcf3140b90db3a0858a565055acc4e8 gas/testsuite/gas/mips/r3900@ecoff@sd.d
013eff4b625d321950cb7285fd5e314e gas/testsuite/gas/mips/r3900@isa-override-1.d
1d66dd3599782163b36ff01d49ef8e1e gas/testsuite/gas/mips/r3900@isa-override-2.l
b30d1491a5d7794e7436ab625bcfe6e7 gas/testsuite/gas/mips/r3900@isa-override-2.s
1cb61742f13c0bec9dfde377d4980f2c gas/testsuite/gas/mips/r3900@l_d-forward.d
99c2ff79deb5b659bfa390975f2e8393 gas/testsuite/gas/mips/r3900@l_d.d
44b26dcb0f152b51a4bd37acfd78a133 gas/testsuite/gas/mips/r3900@s_d-forward.d
@@ -6799,6 +6843,8 @@
e898bc1f6df1a33211ee280af9406db5 gas/testsuite/gas/mips/r5900-vu0.s
58f8ab5e75b807902261a4adc09be933 gas/testsuite/gas/mips/r5900.d
358fcf4b68472993c01577692426ca70 gas/testsuite/gas/mips/r5900.s
343ed383df90aaea545b041bc8a350f3 gas/testsuite/gas/mips/r5900@isa-override-1.d
bf62a59cb387eccca61f0c68a4d39b88 gas/testsuite/gas/mips/r5900@isa-override-1.s
cca5f6f7fa85dfcae2f7657d7a8953b8 gas/testsuite/gas/mips/r6-64-n32.d
0daca1ac9f8cee585f0aeca05d660f7b gas/testsuite/gas/mips/r6-64-n64.d
53503a3e423aff09d88b1d9de2b53b00 gas/testsuite/gas/mips/r6-64-removed.l
@@ -7672,8 +7718,8 @@
e8401e493c9b7d28d214fff4dbfc8b60 gas/testsuite/gas/ppc/altivec.s
9ab2eb5a24ead016b4990cf21173a5e2 gas/testsuite/gas/ppc/altivec2.d
fc307e3f16a7452f8ae78f7f076f0f6b gas/testsuite/gas/ppc/altivec2.s
467f3db97b132f9caa7ce1ecc3a969ce gas/testsuite/gas/ppc/altivec3.d
f076ca348af58db6c1c613e5dd7f1fdd gas/testsuite/gas/ppc/altivec3.s
94bf7e7e25487e3831d28e857a4eae92 gas/testsuite/gas/ppc/altivec3.d
28664cd25f2c76688bf150c9823261e5 gas/testsuite/gas/ppc/altivec3.s
1ba8fbbed3c4e9237919b0410da989ae gas/testsuite/gas/ppc/altivec_and_spe.d
25f7266b7d2018e3d6ada872b8781bec gas/testsuite/gas/ppc/altivec_and_spe.s
a4f8e829f2bbb753b664451a0431cb97 gas/testsuite/gas/ppc/altivec_xcoff.d
@@ -7706,8 +7752,8 @@
9a8c8131d1ed55f1cd6b12d65d85cbd6 gas/testsuite/gas/ppc/e500mc64_nop.s
080c25802390b93a937c4ae51e987ef8 gas/testsuite/gas/ppc/e5500_nop.d
5f620ed105babe239107fc41ad0d8a23 gas/testsuite/gas/ppc/e5500_nop.s
d3f53fff4f7c570021491b49ab148540 gas/testsuite/gas/ppc/e6500.d
87d9410da421f3d28b4f77e98b1a1819 gas/testsuite/gas/ppc/e6500.s
cf2d2afd98bf53fce44f82ea7bb6a3ae gas/testsuite/gas/ppc/e6500.d
313f5d9613a204036abe7728f4e0a81f gas/testsuite/gas/ppc/e6500.s
6b6ae59b02126346f587dee99ce91aff gas/testsuite/gas/ppc/e6500_nop.d
61faf5b217455918b14b543f1d6d642f gas/testsuite/gas/ppc/e6500_nop.s
05271d9cdd13ebcebd7662d04285d5af gas/testsuite/gas/ppc/generate.sh
@@ -7715,18 +7761,18 @@
96ffb92680f06d60c9e88e76cc87ce3a gas/testsuite/gas/ppc/htm.s
e28e6e26070c12f3bfaeb13ce5675805 gas/testsuite/gas/ppc/machine.d
ff408fd5be06ddf91987583d7e49c157 gas/testsuite/gas/ppc/machine.s
95b2830bf9a8994e65efa5798f179cb6 gas/testsuite/gas/ppc/power4.d
035f819d73fdfb377b32617041382663 gas/testsuite/gas/ppc/power4.s
0b60a6e3fc4b6e11b3f5aa2bb887adea gas/testsuite/gas/ppc/power4.d
3cd1bdcebfa5fd8add0e1fdd32106623 gas/testsuite/gas/ppc/power4.s
59eefe371047c86245b32d74b6d415b2 gas/testsuite/gas/ppc/power4_32.d
8586b8880a3b51d9144b813c20a3b5a5 gas/testsuite/gas/ppc/power4_32.s
ed12ef8ffe70539471f63d02be4de271 gas/testsuite/gas/ppc/power6.d
833480592e5f0d95f79a7a02c267425a gas/testsuite/gas/ppc/power6.s
8a1b60fd5a1edbec9e399c7c6dbdbf03 gas/testsuite/gas/ppc/power7.d
5ad9be7f8dfb14e3364f158aca1842f0 gas/testsuite/gas/ppc/power7.s
a34adc669861e902c85716e6f7520a5c gas/testsuite/gas/ppc/power8.d
00b8daebae077ef53c483bb556160043 gas/testsuite/gas/ppc/power8.s
5afb8e27be1606872d89f23def7d82e7 gas/testsuite/gas/ppc/power9.d
857e89c0d60a584707b71e37db394042 gas/testsuite/gas/ppc/power9.s
dd53caf507896f4b191184f7d6795cd3 gas/testsuite/gas/ppc/power8.d
d6409eaa2648e50160c4ef5f4077f9f5 gas/testsuite/gas/ppc/power8.s
dcdc42f210de4b83183875ca9fc7f621 gas/testsuite/gas/ppc/power9.d
0c1d8cb23b1791130fe4524d4e003532 gas/testsuite/gas/ppc/power9.s
5ca7ee1d610c89c18735d6b1140187ea gas/testsuite/gas/ppc/ppc.exp
63ce88434d7ceaf53a3ff02a72eb4d62 gas/testsuite/gas/ppc/ppc750ps.d
a2229dad823c2fff839662835b3f1440 gas/testsuite/gas/ppc/ppc750ps.s
@@ -8975,7 +9021,7 @@
30764ced5c424e3c2c384059cbe2a227 gas/testsuite/lib/dounssym
293eac75ea99defbb0b95e67779ce46c gas/testsuite/lib/gas-defs.exp
25c57a78a5df75e17e2f11985f3ca8ad gas/testsuite/lib/gas-dg.exp
2af9d096cf06336e72580946cddf5dee gas/write.c
0542250c4424b931577ac37a04fccab7 gas/write.c
04fdd2384e9ce8ab72f6f191c7fcf13c gas/write.h
bd0ec949f35efb900f1c510bae4d0fd7 gold/aarch64-reloc-property.cc
75315902000b27e89cc81c215996c82d gold/aarch64-reloc-property.h
@@ -8992,7 +9038,7 @@
2beae9dd2983e4fe1c6fcc7254f59a88 gold/attributes.h
67afa9acf02922f6aff1c2353378bb7e gold/binary.cc
f0e310a94510204f99e01632e3b30eb3 gold/binary.h
bf1d10a85d28e3ba0d2ef4f4d28be820 gold/ChangeLog
e21dfa980a05d03959f66c03ffe3929f gold/ChangeLog
c56f99837046e339a6fe964a076e5bae gold/common.cc
beaaed2455a9b96798fa2c0028ae23b1 gold/common.h
e1352f2b7688d4915ccbc4cd4dafa4a2 gold/compressed_output.cc
@@ -9037,7 +9083,7 @@
5fb8eb4cbeb5ddf7f9564584113fe0ac gold/gold.cc
a0a1648c1acd86977f532e0f2f20ad8b gold/gold.h
f6cbc794b7c176742586e305c235b53b gold/i386.cc
d28c683f05fc12831df6fae1d3520d84 gold/icf.cc
c9091bc00c3636f693e750424b5601ba gold/icf.cc
75912083fed69f08840c129446e67dca gold/icf.h
f9acf10598f00332b9c831b27f4686d1 gold/incremental-dump.cc
23473d845dbb636711769349c3dc74a4 gold/incremental.cc
@@ -9537,7 +9583,7 @@
856f4f46880775b38ad3476ecea3fe50 gprof/cg_dfn.h
c800334fd9aea08bf563fab84823107d gprof/cg_print.c
40c2cd1799a9d37d3e650400ca1b0e9f gprof/cg_print.h
169ac0b30c71da81f21cf9684a304fe0 gprof/ChangeLog
9fec79a385689d6770acc2111a4b6a0c gprof/ChangeLog
d149d32bac72dc2dc9b0a9651fe79fc2 gprof/ChangeLog-2004
7194210d043fb295952589cd0d654c08 gprof/ChangeLog-2005
764eb6920c4791760476927b164773a6 gprof/ChangeLog-2006
@@ -9551,7 +9597,7 @@
9efa55e70c086e90c23ae7421e232bd6 gprof/ChangeLog-2014
7d36670d64d7d95b8a9394f0025afcb1 gprof/ChangeLog-9203
745ff1b458c66a2bdcc3d275761355c9 gprof/config.texi
88cd1b877cf8d239efbf98cf622b2df7 gprof/configure
2be001e3ccb1d57cb1257dc33668215b gprof/configure
9ab588ff7ea4845b3414dca0abcca360 gprof/configure.ac
02c27fb1788784b6dbc9813cce0a7165 gprof/corefile.c
07c538bea57f0b3ca78d294f66702d37 gprof/corefile.h
@@ -9652,7 +9698,7 @@
a78ede3c6cc575136d7c9c46a59ef3f1 include/aout/adobe.h
505986144b431b327147f091fb4fc248 include/aout/aout64.h
1653e641d01d3bff4501bdd3d29bdd2e include/aout/ar.h
0659966366fcba7172fc5514bdf514cd include/aout/ChangeLog
f274fd6beb6cfd201cb243784edf2cc8 include/aout/ChangeLog
193ed538f4344f368a21ab36b402e717 include/aout/dynix3.h
972c094e166daaecda2dbd2770884df4 include/aout/encap.h
4c8dee5f526437644104a3c1b2c24012 include/aout/host.h
@@ -9671,7 +9717,7 @@
cb9a074cf859c172994ad5211ae42716 include/cgen/basic-ops.h
1be2d7203ed93c5b271ee2f13d35731a include/cgen/bitset.h
37785f3eed21fc14cdc3a0b12e8b4406 include/cgen/ChangeLog
599a0874836941d1b4055b1ee61999b9 include/ChangeLog
2da3ffbf7abf1469f9bc3c890b56b97d include/ChangeLog
41879305404d3b06773b10ab3fa44539 include/ChangeLog-9103
03a82a03bc1a7670093195b9f5a31eb0 include/coff/alpha.h
be64c1b7d6a9253de5de477b0a82729f include/coff/apollo.h
@@ -9727,7 +9773,7 @@
e6572c4d7c9b1aa716400b36eb335661 include/elf/arm.h
f6b3652db73c98b774d058b53cec0116 include/elf/avr.h
d57ea7f73ff9019959af2b89c285af03 include/elf/bfin.h
9bded0b6a28b86f8fc5f7c07ecd049d9 include/elf/ChangeLog
3c5ae3c1537eac0ac67ca7c3fa86320d include/elf/ChangeLog
4a26c010ce1159365c425f0df730a09d include/elf/ChangeLog-9103
6921e2a8cb2306411d52951c9123a222 include/elf/common.h
6b6dca38e60e6651e7a107c14a8f7c6e include/elf/cr16.h
@@ -9807,7 +9853,7 @@
9d1ee8ac8f06e76603220807400bbe1e include/gcc-c-interface.h
960419210b1dffddd4335ba3e1e55775 include/gcc-interface.h
9c2e3b6ab219878159e347ab16405443 include/gdb/callback.h
4aeed7314c8e6d789f2bd669518b77ba include/gdb/ChangeLog
a574f61527b6e66e3f23e6b4fc7784dc include/gdb/ChangeLog
e94e5afcc2f64d94aa7be51cf1246f6b include/gdb/fileio.h
ddfaa18b2b66336e4d5c1900ef7a895b include/gdb/gdb-index.h
8bea1e880fdb3b6079ff3b6494c4c627 include/gdb/remote-sim.h
@@ -9864,7 +9910,7 @@
2891f7be0848f0fbfc65a48d7097cb3d include/opcode/avr.h
8df0b26c7bfb547a53d99d1f6655106c include/opcode/bfin.h
d806bcd88de063e55a5c0d26fd6bd0a1 include/opcode/cgen.h
b11f16648039c60dbe529d1a1f0cf186 include/opcode/ChangeLog
c6a2d8b9f9d661eef732d62988693f45 include/opcode/ChangeLog
a342d85fea1e2696d1608befe2530137 include/opcode/ChangeLog-9103
0274d0e49b554d8bc8b727f6cf66d551 include/opcode/convex.h
1478cfdd9063a61a8fb2569cc1f5765a include/opcode/cr16.h
@@ -10025,7 +10071,7 @@
76ca170a525d5b84d90f0478fe788931 intl/VERSION
da73aad6396daa6072d443c12133ee0f ld/.gitignore
80c55f071409c7062c5059105eafe078 ld/aclocal.m4
c0abec9bad274e734f7a0db7e26a7312 ld/ChangeLog
1de691ff4d8816e98350e1fd65a935bf ld/ChangeLog
b4ea35b18cd631b1a84c4d66b5fbf17f ld/ChangeLog-0001
cb83c58e2db10afdd1e6f57b2ab02d1a ld/ChangeLog-0203
b5f4cdda418187b6e6b1e8aa32b22c11 ld/ChangeLog-2004
@@ -10043,8 +10089,8 @@
59217f22ee78753701ad3d51e4e0b0e2 ld/ChangeLog-9899
526dd994856eb0dd44cad140164a0420 ld/config.in
562d42f083c0e210eee9d677d8fa1bba ld/configdoc.texi
a5cc367be38baae9e79e6259785d68b5 ld/configure
b8b2fcace9579ac7bce9fc443cce614a ld/configure.ac
7f3748449739772c64f52959ee15a5e2 ld/configure
2a48c05a9287e269cb64207c22cfea85 ld/configure.ac
738adc19ed04b3c0f60dcaeb8f49bc05 ld/configure.host
6dd4bb4f35aa7d03e3d71a32038ffaa0 ld/configure.tgt
6ff2bd16117b06f621e78354121cd518 ld/deffile.h
@@ -10434,7 +10480,7 @@
c749ade45bd1e81ad3895438f264fb83 ld/emultempl/cr16elf.em
4392e90718cad0746df5314afaff05fb ld/emultempl/crxelf.em
a5b35db1c76c435f06ba3e70fd54ddb1 ld/emultempl/elf-generic.em
56b4aca188c10356a33f51a4eeecaaff ld/emultempl/elf32.em
2e4fe381566d6e3ff44b4bbd42727997 ld/emultempl/elf32.em
ac74b35a8705191a72cfd1e3aa685010 ld/emultempl/epiphanyelf_4x4.em
aa645a90f2c7b1f9c06d93a4d0026c6d ld/emultempl/genelf.em
afca4ea02a15dcbdba61f61a143c003f ld/emultempl/generic.em
@@ -10452,15 +10498,15 @@
aa315f0625ceae0209b4b574729a3fbc ld/emultempl/mipself.em
790307221337625840527677dcdef373 ld/emultempl/mmix-elfnmmo.em
814816b3512136ca420236f1689a85a2 ld/emultempl/mmixelf.em
109a0b3a4fc19d787f79b41aadb7af68 ld/emultempl/mmo.em
5504bad75efb3c51417e474de6b3a2bb ld/emultempl/mmo.em
ab5fa340d23b2afb4393ed4175d2da70 ld/emultempl/msp430.em
97a2a108194510473f37bc5c643445ec ld/emultempl/nds32elf.em
3fc19c3ef0310454ca7834a5b38f4086 ld/emultempl/needrelax.em
f57a95b62b1930737edacde36440b6e0 ld/emultempl/netbsd.em
3a28a535f6978423d87cb87229d51bd5 ld/emultempl/nios2elf.em
a8190e4a0b5cca5b8677d8bb2d39940f ld/emultempl/ostring.sed
c6c01fc78358b0dc47e54b3fe0ca0d2d ld/emultempl/pe.em
1d1737e354119258c73e15b2b6394ef0 ld/emultempl/pep.em
127816390a3e8cf66ca6facb066d8c20 ld/emultempl/pe.em
c7b638e2e44ab31e232d9cfb869bfdd1 ld/emultempl/pep.em
08163217bc5b792db3709bff76b84e42 ld/emultempl/ppc32elf.em
2235b11b8b614ee375a5ad759b1d4410 ld/emultempl/ppc64elf.em
5d226afe0d3281030027ed74905a2f44 ld/emultempl/README
@@ -10487,10 +10533,10 @@
351c85fba3e46d48e9752dc51e2a0cac ld/genscrba.sh
a00c9012784b66948e363dc7563f4cee ld/genscripts.sh
c6afb85e22b4945cf6a81216931c5c93 ld/h8-doc.texi
8bd4d7411e595bd9d81171f710007cd2 ld/ld.1
d7705efbc054a807c9d0dd63cb1a858a ld/ld.1
81dddb880fdb401ad355c80cd624a12b ld/ld.h
4ce0dba5dff9ac180077d2c8514f68fe ld/ld.info
a46e41b3723f0e5148a888a2528ba4c0 ld/ld.texinfo
1214a0087326d79852d3334e9faf4732 ld/ld.info
161dcbc03e8e2aa864f72d4bcf0d5bf7 ld/ld.texinfo
4b3849863f45062ee5cee683bf51fbcb ld/ldbuildid.c
a48666d7dacfe0b8eb1aeba2d91bd470 ld/ldbuildid.h
f9aedc1a5e600172f2c5b377a3fe1c64 ld/ldcref.c
@@ -10520,7 +10566,7 @@
ed845964c3956288790c00b1c19fe088 ld/ldver.h
4967f53967484117ddfe70f132de33fc ld/ldwrite.c
c5138e69f0dea9bda64b6b63d6636506 ld/ldwrite.h
ae37e304b97ce68c76aa575011bc4ef5 ld/lexsup.c
b7d80e165de9df1258169152d26914c9 ld/lexsup.c
11893085f8079863bb591f73ca77fd8a ld/MAINTAINERS
6751429220db2fd782b1ab1db49bb79f ld/Makefile.am
309a64f22eebcea8d4826d76d99c2cec ld/Makefile.in
@@ -10667,7 +10713,7 @@
ea4b1e3b2f89ef5393f50d7e8dff37db ld/testplug.c
c404d71446794fd73f3af4a53504dd01 ld/testplug2.c
b50daac12b7b2081ebac5b8d6a6c4938 ld/testplug3.c
4493865ff0aa6cd643b1c891f66fc868 ld/testsuite/ChangeLog
38d5f35a784dc50c8b8a014a28dfecf3 ld/testsuite/ChangeLog
4ad0891478a03aecf68a87677ea1bec2 ld/testsuite/ChangeLog-2004
28919f3b134108767a4ddc928d1a3b57 ld/testsuite/ChangeLog-2005
22cc89a4117eb02e4c2ec5144037c2a2 ld/testsuite/ChangeLog-2006
@@ -10681,7 +10727,7 @@
3816debde8c4ac438c318a53fdbbea67 ld/testsuite/ChangeLog-2014
cc4e72840b3138e245aac354e9eda342 ld/testsuite/ChangeLog-9303
910d7e38fc3873993820aabf76dc4633 ld/testsuite/config/default.exp
a8cd3204eed2ba49049a2a934d8b8f3f ld/testsuite/ld-aarch64/aarch64-elf.exp
a8b31b718109d1c8e5fd327042451f28 ld/testsuite/ld-aarch64/aarch64-elf.exp
ee05d23f722a952993a04bb0b5be2841 ld/testsuite/ld-aarch64/aarch64.ld
6e220b77ea1a7210374865f197cc0091 ld/testsuite/ld-aarch64/copy-reloc-exe.s
0bb06bd1458a67cf0614fa07108fa0f3 ld/testsuite/ld-aarch64/copy-reloc-so.s
@@ -10860,10 +10906,12 @@
9ef690685f017cf1eb9c7409463aca33 ld/testsuite/ld-aarch64/farcall-b-defsym.s
5b4c8d4ba4b0bd6dc93dbb259febe86b ld/testsuite/ld-aarch64/farcall-b-gsym.d
6edd904c5fe00b2a5150fecbc80c887b ld/testsuite/ld-aarch64/farcall-b-gsym.s
9dbd491f04d36547526e13cbcb5c7073 ld/testsuite/ld-aarch64/farcall-b-none-function.d
da1f36a72ff50bdae7921bb6a85f341d ld/testsuite/ld-aarch64/farcall-b-none-function.d
a8bb1a6d44b0808bef173865cb9743c6 ld/testsuite/ld-aarch64/farcall-b-none-function.s
41899e19a89a380eaf228cbb6fdd060b ld/testsuite/ld-aarch64/farcall-b-plt.d
354de433dc3054faeb15572396d978ba ld/testsuite/ld-aarch64/farcall-b-plt.s
0a1261a6beeeb39be015cfc8a6031ffe ld/testsuite/ld-aarch64/farcall-b-section.d
5c10879456a2f860e3838eaefcda146b ld/testsuite/ld-aarch64/farcall-b-section.s
fa590522d0f991b1cf0d06f904c82617 ld/testsuite/ld-aarch64/farcall-b.d
f3b6f9c3640700cee33ba8b945a177fd ld/testsuite/ld-aarch64/farcall-b.s
1793faadce0d76d5de5790d0c44fe372 ld/testsuite/ld-aarch64/farcall-back-be.d
@@ -10871,14 +10919,14 @@
b274b868ecd8ae890edaf948cf96fbb2 ld/testsuite/ld-aarch64/farcall-back.s
bdec921a20b04c4d237820c5b34ea0d7 ld/testsuite/ld-aarch64/farcall-bl-defsym.d
6068b08232383f155b019bfb627ed2b3 ld/testsuite/ld-aarch64/farcall-bl-defsym.s
e0b7029e7724d6ee52622a62e2a0a8ba ld/testsuite/ld-aarch64/farcall-bl-none-function.d
c50ba5a6751d9c4ded9181398cca2f73 ld/testsuite/ld-aarch64/farcall-bl-none-function.d
ba0b7f5c3ba889c8cdd672aa690a4257 ld/testsuite/ld-aarch64/farcall-bl-none-function.s
562b11abe46958c4579a1d1d73545f08 ld/testsuite/ld-aarch64/farcall-bl-plt.d
5db108875a50b0d990e9ff90a58ef5cd ld/testsuite/ld-aarch64/farcall-bl-plt.s
985ddb997e58fbb01ec37c96a509c662 ld/testsuite/ld-aarch64/farcall-bl-section.d
8279445db936b0352ed2ad053148f914 ld/testsuite/ld-aarch64/farcall-bl-section.s
7f9f59694923e3632cac61c0f883a60c ld/testsuite/ld-aarch64/farcall-bl.d
8483697b5ff3589c7293b3115eeea13c ld/testsuite/ld-aarch64/farcall-bl.s
14a84dee9658f84f9c8abb90882295c3 ld/testsuite/ld-aarch64/farcall-section.d
926368612abe2e00422781f9d48fafae ld/testsuite/ld-aarch64/farcall-section.s
7cf90e19cc2cc034efac5fa7c1c56b4f ld/testsuite/ld-aarch64/gc-got-relocs.d
b0265aaac5118fe08670d99204e6da36 ld/testsuite/ld-aarch64/gc-plt-hidden.s
5d8c777f684281568ba16194e4811a6e ld/testsuite/ld-aarch64/gc-plt-main.s
@@ -11101,7 +11149,7 @@
a787400b6bcc43f49aa58957d81b56b9 ld/testsuite/ld-arm/arm-call1.s
5e27a3edfbfbf3a12d65e227fab0c447 ld/testsuite/ld-arm/arm-call2.s
db6201ba0784c78873c482bdda111311 ld/testsuite/ld-arm/arm-dyn.ld
85185b2bc6cd8edc41521b06dd37974b ld/testsuite/ld-arm/arm-elf.exp
56835eda26cde160742b995960cf6a36 ld/testsuite/ld-arm/arm-elf.exp
172eb2491b18b87e9b34493c407a13ad ld/testsuite/ld-arm/arm-export-class.rd
1d54fbbcc2a94214b6f0d42e92099cb6 ld/testsuite/ld-arm/arm-export-class.xd
2a3abc273f1a81034c2252c1593c803a ld/testsuite/ld-arm/arm-lib-plt-2.dd
@@ -11532,14 +11580,16 @@
6cb86d783e2e863cfb2a9b039489a570 ld/testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.s
2208d6fb28c75cefb28600a5ad890216 ld/testsuite/ld-arm/stm32l4xx-cannot-fix-it-block.d
972b4da9b52ef5cf4ad4cb9cbf754acf ld/testsuite/ld-arm/stm32l4xx-cannot-fix-it-block.s
5568be6a62e51a0eda185bb1d4affe75 ld/testsuite/ld-arm/stm32l4xx-fix-all.d
2ca53fa3db43ca8e002926936b64634e ld/testsuite/ld-arm/stm32l4xx-fix-all.s
7a49003774d10a6110f425fd518adf12 ld/testsuite/ld-arm/stm32l4xx-fix-all.d
287d45e18e780ae7082685229c31daf1 ld/testsuite/ld-arm/stm32l4xx-fix-all.s
a501c8fe154588b78139bd6028c68c08 ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d
5bb2ad00cb9fcae6e17e8dc7a6d1a076 ld/testsuite/ld-arm/stm32l4xx-fix-it-block.s
b30b77f918f021f2902ed8937acfb4cb ld/testsuite/ld-arm/stm32l4xx-fix-ldm.d
a51ba979143b4510ad8ae6e9e6825c25 ld/testsuite/ld-arm/stm32l4xx-fix-ldm.s
a2b0c5cc2bfb597b706e9934fdb1e8f9 ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d
4af50cfdf175fd2d5652fe05fcf0ead3 ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s
b3b5dda9783d7795a68ac136ddae4a0c ld/testsuite/ld-arm/stm32l4xx-fix-vldm.d
6bb949d5c569ab834c556e25b3f8a7f8 ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s
b5572ea07a34c2412685b8b9c93631cd ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s
4efee958adfc0ada1f44fe3586a51db0 ld/testsuite/ld-arm/symbian-seg1.d
2408cc9c760cf2059e964dff9f670006 ld/testsuite/ld-arm/symbian-seg1.s
3b533217d41c00ff6f1a9fd52268c7fe ld/testsuite/ld-arm/thumb-b-lks-sym.d
@@ -11658,6 +11708,10 @@
bc83964a5d7d3aa0c99158ae9c44439d ld/testsuite/ld-avr/avr-prop-3.s
779a4d50c613d1bfc792c1e94735e920 ld/testsuite/ld-avr/avr-prop-4.d
15d6a6e766de75ccf7f9d918eceb6fa8 ld/testsuite/ld-avr/avr-prop-4.s
f35b623e34329ad3f9f333896677b820 ld/testsuite/ld-avr/avr-prop-5.d
9338074ec5c07c3a5bff5ddfed48f441 ld/testsuite/ld-avr/avr-prop-5.s
51e4d15666e8bc87532b24b3abaf8d8e ld/testsuite/ld-avr/avr-prop-6.d
b4c07dfc3235e8d1c80fcafeb0ff6bcd ld/testsuite/ld-avr/avr-prop-6.s
86ede4a5c78bdfcfcd8220756ded5b1f ld/testsuite/ld-avr/avr.exp
15affb3a700147eb89bd7bad48dd3b66 ld/testsuite/ld-avr/gc-section-debugline.d
c87de9237aa723d376f740acc12a20ff ld/testsuite/ld-avr/norelax_diff.d
@@ -12088,8 +12142,8 @@
dcf933a6a39b4cf2e648408d13399f21 ld/testsuite/ld-elf/compress1b.d
0eb33d24f26607d364dfce52b8f63f15 ld/testsuite/ld-elf/compress1c.d
1ed6f32200aefff409e277d02ff710d4 ld/testsuite/ld-elf/compressed1a.d
33bb4c28c7b114620076289fe657c7c1 ld/testsuite/ld-elf/compressed1b.d
f7342547cf40531b5bd8b45f2cb0c94a ld/testsuite/ld-elf/compressed1c.d
69b7c348ec3ebbd85cfba8c2ddd66106 ld/testsuite/ld-elf/compressed1b.d
4e41791c633dba599c1092beaff650e9 ld/testsuite/ld-elf/compressed1c.d
5138bd39886ef8815f92f86866d7773c ld/testsuite/ld-elf/compressed1d.d
ff253faff6cf61d00c94884964b9e4c1 ld/testsuite/ld-elf/compressed1e.d
deaa743c21343d50005ce2368a63da9f ld/testsuite/ld-elf/data1.c
@@ -12231,8 +12285,8 @@
c5e3fdc75792e33a4b6a4e2d75c3400b ld/testsuite/ld-elf/frame.exp
849fea883bafed1cbcbaebbe323e7783 ld/testsuite/ld-elf/frame.s
f5eb79eb13454634e50e29bfcf9127c8 ld/testsuite/ld-elf/func1.c
3256653c595b7969ba82d2c23b66ffdd ld/testsuite/ld-elf/gabiend.rt
3256653c595b7969ba82d2c23b66ffdd ld/testsuite/ld-elf/gabinormal.rt
36aa380929ea2195f3825b2344fbf3ae ld/testsuite/ld-elf/gabiend.rt
36aa380929ea2195f3825b2344fbf3ae ld/testsuite/ld-elf/gabinormal.rt
40dadc4124e56bdb402d4fd07200b825 ld/testsuite/ld-elf/gap.s
72b96e4690e57ce362de641c1028ed12 ld/testsuite/ld-elf/global1.d
b808b1c59f43d906bc90b71d598325e9 ld/testsuite/ld-elf/gnubegin.rS
@@ -12263,7 +12317,7 @@
d20a232b867adf1bef08b4ce03cf1430 ld/testsuite/ld-elf/header.s
9982da84d54af70ca2e81e3979251435 ld/testsuite/ld-elf/header.t
89178798ccc30d52ff0924e01b5571bd ld/testsuite/ld-elf/hidden.out
7df99265d43093946612037cb69dbb78 ld/testsuite/ld-elf/indirect.exp
5f825ba4bff4fc735a4796816379a3ee ld/testsuite/ld-elf/indirect.exp
5bc983a41039f5aee1a1a4da1342e9b5 ld/testsuite/ld-elf/indirect1a.c
03a038aee2aa13d966f731c348f7cb68 ld/testsuite/ld-elf/indirect1b.c
0cbd5c0a8ed0fa85a44eff8cc3dc2c99 ld/testsuite/ld-elf/indirect1c.c
@@ -12484,6 +12538,22 @@
798a00abfd037f250553a9d4a4f25942 ld/testsuite/ld-elf/pr19073.map
1ff784f62ba0dcb5a8b913ef642c131f ld/testsuite/ld-elf/pr19073.rd
4217f5ce90ceb9c3c2fd2d769941255a ld/testsuite/ld-elf/pr19073.s
91d91efbeba5e45301ea3095076f6168 ld/testsuite/ld-elf/pr19539.d
3066dce629479939d957d696aabb267a ld/testsuite/ld-elf/pr19539.s
53737048391928fff8a7613b8277ceaa ld/testsuite/ld-elf/pr19539.t
be4583f59558fd604c67b79d6ebb2110 ld/testsuite/ld-elf/pr19553.map
2aa4bbfff7deb011ef82d0c71a9e059d ld/testsuite/ld-elf/pr19553a.c
9881001bbea4d7ca2de2a748ce485288 ld/testsuite/ld-elf/pr19553b.c
9534b63304be03b1eb2aa7240b8495b6 ld/testsuite/ld-elf/pr19553b.out
a81cc5a8014168edc102784f4b77e7ea ld/testsuite/ld-elf/pr19553c.c
053978197b1b42141a6d9f52dbfae15d ld/testsuite/ld-elf/pr19553c.out
da0c69a46afc9a2d33b827030cf72517 ld/testsuite/ld-elf/pr19553d.c
dda7f670174abf0e2265943ecb6f3cc9 ld/testsuite/ld-elf/pr19553d.out
46ebe66a7494c3ff81f28b2888841594 ld/testsuite/ld-elf/pr19579a.c
e5d2383165e8be2b54d1f9a95436fa5e ld/testsuite/ld-elf/pr19579b.c
3b4c992e9aba130c86c5caf4e7337ee6 ld/testsuite/ld-elf/pr19698.d
aaadb18ddd62ba87167babc9c597ba02 ld/testsuite/ld-elf/pr19698.s
75209059b90345bd2843015ce97bc952 ld/testsuite/ld-elf/pr19698.t
438731a77d9e7ecd767679f54af92f72 ld/testsuite/ld-elf/pr2404.out
b4ed54bc61ff4a4881422940d6850d7c ld/testsuite/ld-elf/pr2404a.c
d5d79c02518d9b89c2a0d22b121bf77b ld/testsuite/ld-elf/pr2404b.c
@@ -12538,7 +12608,7 @@
2172991a0be7bbcc919dd018cb3e1984 ld/testsuite/ld-elf/seg.d
366d0c0a5413780d911830f52009bd84 ld/testsuite/ld-elf/seg.s
33df9bb4b3d304089bbc3721861a181b ld/testsuite/ld-elf/seg.t
26890fb31801d9b4b3c69abe473603be ld/testsuite/ld-elf/shared.exp
487e25801f0789cd02b959e5109953fa ld/testsuite/ld-elf/shared.exp
6f4d84a169cac8e0dd19b4b396d69de4 ld/testsuite/ld-elf/simple.s
bca204cb5e2f9dfd81723b0cf322fa76 ld/testsuite/ld-elf/stab.d
75696f7383f43855c6c4522c05bb189d ld/testsuite/ld-elf/stack-exec.rd
@@ -12763,7 +12833,7 @@
4bb9ca85a1469d2af2ac23d7a8f540a0 ld/testsuite/ld-elfvsb/define.s
8c101871251d783e6acf5775f76627da ld/testsuite/ld-elfvsb/elf-offset.ld
311acb2b4478311b5dd7d43553e4167c ld/testsuite/ld-elfvsb/elfvsb.dat
05d3018e96506058d355c0b585bfaeda ld/testsuite/ld-elfvsb/elfvsb.exp
85ee437e815dbfc4ffc2b9eb030834c4 ld/testsuite/ld-elfvsb/elfvsb.exp
77ac30a27063e4b52eabf74341e5a86e ld/testsuite/ld-elfvsb/hidden0.d
976bd30c73849900caaed88cfb7244d7 ld/testsuite/ld-elfvsb/hidden1.d
e99b30ba463dd21eea50b562b78ea224 ld/testsuite/ld-elfvsb/hidden2.d
@@ -12944,21 +13014,21 @@
abbd4c0e6060fa01f7f17ecdddf529b9 ld/testsuite/ld-i386/alloc.d
170462078f6b736209d66144d5298673 ld/testsuite/ld-i386/alloc.s
5127792659937a4df2498eb86ff41c68 ld/testsuite/ld-i386/alloc.t
5643885a65e503c692b9c128919b3f19 ld/testsuite/ld-i386/branch1.d
170e9fecd69212c4af449953b33a1ccf ld/testsuite/ld-i386/branch1.d
09a9926df73675e3a3a4743ef8a62772 ld/testsuite/ld-i386/branch1.s
791265c27c4d66a3f9b73cb4b9167266 ld/testsuite/ld-i386/call1.d
c1db7937bfb9ff0288b35fec7a4b2913 ld/testsuite/ld-i386/call1.d
d3eff844704a8f8a868fb0e221cba03f ld/testsuite/ld-i386/call1.s
791265c27c4d66a3f9b73cb4b9167266 ld/testsuite/ld-i386/call2.d
c1db7937bfb9ff0288b35fec7a4b2913 ld/testsuite/ld-i386/call2.d
50a98c4ca2c82bba687e216d17d9fb1f ld/testsuite/ld-i386/call2.s
d3eff844704a8f8a868fb0e221cba03f ld/testsuite/ld-i386/call3.s
b807272cc27bb690b3428935ddf06e7a ld/testsuite/ld-i386/call3a.d
365dd557907202b6c984013e7082d9ff ld/testsuite/ld-i386/call3b.d
662a859ec6ae228a53953e073df6fcc5 ld/testsuite/ld-i386/call3c.d
fdb9988711e3d9e13abeb87b214a65de ld/testsuite/ld-i386/call3d.d
6db6a1ab21009c3607811f738117219b ld/testsuite/ld-i386/call3e.d
8fcb12834bfce75a166dd2faa59ff6af ld/testsuite/ld-i386/call3f.d
6fcde0f1cf5e1b4888ae7cc59b4abc13 ld/testsuite/ld-i386/call3g.d
a961e8930efc8ab90f9bebfc207c4c8d ld/testsuite/ld-i386/call3h.d
4f4ae518f08a0f2dce451e6634bdee7f ld/testsuite/ld-i386/call3a.d
0015c0f2d600b8c428577ec8748e2ad2 ld/testsuite/ld-i386/call3b.d
eed0cd2726d26fb8de0703661f1d80f8 ld/testsuite/ld-i386/call3c.d
e5999df91f403dfd57467c14c99885d9 ld/testsuite/ld-i386/call3d.d
88af29727800e56e27983c858a545ecd ld/testsuite/ld-i386/call3e.d
27276ab98bd14b385e4dd36eca5ccecf ld/testsuite/ld-i386/call3f.d
1e6a40508fec502bed59453441dd444c ld/testsuite/ld-i386/call3g.d
f6c8a12adae4b5041c28f7b99d1811b1 ld/testsuite/ld-i386/call3h.d
3514d60eeebcfc8f7d93239d00a042fa ld/testsuite/ld-i386/combreloc.d
bfad8fd9caab1c503c3e547132bba8e3 ld/testsuite/ld-i386/combreloc.s
3d3179e084e0db2e7dfa246916ca8b9f ld/testsuite/ld-i386/compressed1.d
@@ -12978,12 +13048,12 @@
47a609aa14618023c1317f741f3810de ld/testsuite/ld-i386/emit-relocs.s
79903e501f200c13f99dd855eb3777db ld/testsuite/ld-i386/export-class.exp
9b4555015075d610d1ab4a1d5b0a8365 ld/testsuite/ld-i386/foo.s
75e49c4aca783e90fe943b0f059a3ac0 ld/testsuite/ld-i386/got1.dd
1faf81fd62b1729926ec8255372a5db5 ld/testsuite/ld-i386/got1.dd
4e375a49ef832bbed3c14d5406174724 ld/testsuite/ld-i386/got1.out
9adbbd27a871278cbf828d25c540c667 ld/testsuite/ld-i386/got1a.S
5ddb99810569a153d2019e1d012ffcdf ld/testsuite/ld-i386/got1a.S
6c8132b31d76a2534f28aa37107d6ce2 ld/testsuite/ld-i386/got1b.c
647cf0337568c467fe4f91f52089dc64 ld/testsuite/ld-i386/got1c.c
fe1aef9deaf175bb7bfaf5b2879e8285 ld/testsuite/ld-i386/got1d.S
d14a2662e089c4dc510556e303a31540 ld/testsuite/ld-i386/got1d.S
e0b4ac393b55aa6dde9eeb2eac8dd281 ld/testsuite/ld-i386/hidden1.d
d3e5ca870e218a1b1dcb656e0bfaa3ce ld/testsuite/ld-i386/hidden1.s
0dd37cfc96c77c5af40622536f802cb8 ld/testsuite/ld-i386/hidden2.d
@@ -12992,34 +13062,40 @@
d9d64e8ca2b43c851eacaa021767eafa ld/testsuite/ld-i386/hidden3.s
7323101efad83a803d173081d7f29702 ld/testsuite/ld-i386/i386-export-class.rd
1d54fbbcc2a94214b6f0d42e92099cb6 ld/testsuite/ld-i386/i386-export-class.xd
f9a53fed5f8032762e35470bdadc4c30 ld/testsuite/ld-i386/i386.exp
54287af768776d7ea2a9e5be7af3c02b ld/testsuite/ld-i386/i386.exp
7919180fc8f3ddb0f0863e477031a63e ld/testsuite/ld-i386/iamcu-1.d
bff7913e9b7215ada3e224f43e64d7b8 ld/testsuite/ld-i386/iamcu-2.d
25a061bae7271e6c77403abee96d40da ld/testsuite/ld-i386/iamcu-3.d
6d9082b9401d55a5736f62248a8b7d21 ld/testsuite/ld-i386/iamcu-4.d
791265c27c4d66a3f9b73cb4b9167266 ld/testsuite/ld-i386/jmp1.d
34cd3a78d277b55c84fd9e7b293e4509 ld/testsuite/ld-i386/ifunc-1a.c
b11c1a20de66b796cfdefe4fa7098091 ld/testsuite/ld-i386/ifunc-1b.S
1039548bd0df30099c506ef692f41a51 ld/testsuite/ld-i386/ifunc-1c.S
49107fa3e3da73a8b65f5b1724541dff ld/testsuite/ld-i386/ifunc-1d.S
c1db7937bfb9ff0288b35fec7a4b2913 ld/testsuite/ld-i386/jmp1.d
ff1a7738267feb54a93c60b87a16bdd1 ld/testsuite/ld-i386/jmp1.s
791265c27c4d66a3f9b73cb4b9167266 ld/testsuite/ld-i386/jmp2.d
c1db7937bfb9ff0288b35fec7a4b2913 ld/testsuite/ld-i386/jmp2.d
58dd126978325c5a1742548355be74af ld/testsuite/ld-i386/jmp2.s
313ca9255d60c78313c99a8a2d775fc3 ld/testsuite/ld-i386/lea1.s
dc40b9c1435c3a3ba3a927bc3949edac ld/testsuite/ld-i386/lea1a.d
69c481b3e148f4a499fe01ee8225c858 ld/testsuite/ld-i386/lea1b.d
423bc63e6a2d7ff1b8aff9750e7ad1e8 ld/testsuite/ld-i386/lea1c.d
5bf232e6fe30c67a8392287de47e4bb8 ld/testsuite/ld-i386/lea1c.d
f016456c006b25a667a774b97fffe766 ld/testsuite/ld-i386/lea1d.d
cf5b94cb7ad6b21bae8a022668f6ef35 ld/testsuite/ld-i386/lea1e.d
d3cf0358eab51590ceb38ec18e919fad ld/testsuite/ld-i386/lea1f.d
c13dd2b36242b4adc901ed20fa39ef07 ld/testsuite/ld-i386/libno-plt-1b.dd
5946ccd92a521b81850589a2da13ffb7 ld/testsuite/ld-i386/libno-plt-1b.rd
81b61c5433457222cbffa4499957a107 ld/testsuite/ld-i386/load1-nacl.d
e8520f481cfc78318d989cd00001a4a3 ld/testsuite/ld-i386/load1.d
a3100a40faa76ba964fd10d129ce764c ld/testsuite/ld-i386/load1.d
a65d666a624f4c47460b74b8ae8fddec ld/testsuite/ld-i386/load1.s
255ba5742f4f6823277e9d93adcd2d36 ld/testsuite/ld-i386/load2.d
681fd98f274aaaed9ba60d4b00c5e917 ld/testsuite/ld-i386/load2.d
6b8986223ae44ef241b9378d30d2771e ld/testsuite/ld-i386/load2.s
255ba5742f4f6823277e9d93adcd2d36 ld/testsuite/ld-i386/load3.d
681fd98f274aaaed9ba60d4b00c5e917 ld/testsuite/ld-i386/load3.d
50923cf80bcf834bcf7e352361bf03d8 ld/testsuite/ld-i386/load3.s
40a778ebac0476cca0558b443aee2ff6 ld/testsuite/ld-i386/load4.s
837219c429f417a6d673d3efd55f152c ld/testsuite/ld-i386/load4a.d
6de65e40bbb46473a04ad09fc2705438 ld/testsuite/ld-i386/load4a.d
c0e5aa09f18e16cf48b6e8ae7e954846 ld/testsuite/ld-i386/load4b.d
33d00c2488691081417efff1ecba80a4 ld/testsuite/ld-i386/load5.s
a496ffa60eaca8a606f146303984619c ld/testsuite/ld-i386/load5a.d
c270ac563d86329f5e235a20678b44fd ld/testsuite/ld-i386/load5a.d
1167575473595ca6b21921118d1846e2 ld/testsuite/ld-i386/load5b.d
e06b41a2a4b9257f16bda859afe54512 ld/testsuite/ld-i386/load6.d
71010c580bbbaaa5c5eaace7843c2e73 ld/testsuite/ld-i386/load6.s
@@ -13028,13 +13104,41 @@
a747e808280cf3adeef003996b4e1000 ld/testsuite/ld-i386/mov1b.d
d2111de90708836dd985ebf2fab9c0c6 ld/testsuite/ld-i386/mov2.s
69ed3db50c5d621ab29e40b61f1e38d7 ld/testsuite/ld-i386/mov2a.d
0d8eaff4e0c04a7742263b1e9c5cacfc ld/testsuite/ld-i386/mov2b.d
0bf3cf5297ec7a59e17059be89d32981 ld/testsuite/ld-i386/mov3.d
56dd005886a2d3a9a7667b25a88599b8 ld/testsuite/ld-i386/mov2b.d
4d82c01fb006af76e63bbdeeb83a9145 ld/testsuite/ld-i386/mov3.d
da874b03f708af9249f95d6684583262 ld/testsuite/ld-i386/mov3.s
7fafb21fb16648602fe2bbc3e2654a8e ld/testsuite/ld-i386/no-plt-1a.dd
04071b12b009bcd5f62fa0bc21cc086a ld/testsuite/ld-i386/no-plt-1a.rd
fce405b178e57998ed521e0389f8c5f0 ld/testsuite/ld-i386/no-plt-1b.dd
a0f3284062d2ecad28ae82ee5eba6e0b ld/testsuite/ld-i386/no-plt-1b.rd
fd191b3e5707c9cc5a27c67728985070 ld/testsuite/ld-i386/no-plt-1c.dd
ce1094718ebe6cda64119d3f12897446 ld/testsuite/ld-i386/no-plt-1c.rd
37cde2c9f43cd65736b465f3f42fa79b ld/testsuite/ld-i386/no-plt-1d.dd
5d38316a60007e56b98b2b0c8ccea8fb ld/testsuite/ld-i386/no-plt-1d.rd
4e724b57a30d5472fdb4d30a7661e581 ld/testsuite/ld-i386/no-plt-1e.dd
04071b12b009bcd5f62fa0bc21cc086a ld/testsuite/ld-i386/no-plt-1e.rd
fce405b178e57998ed521e0389f8c5f0 ld/testsuite/ld-i386/no-plt-1f.dd
a0f3284062d2ecad28ae82ee5eba6e0b ld/testsuite/ld-i386/no-plt-1f.rd
998a17d7cf579f746bc743014a636183 ld/testsuite/ld-i386/no-plt-1g.dd
ce1094718ebe6cda64119d3f12897446 ld/testsuite/ld-i386/no-plt-1g.rd
35e1ba51f45080bcb8fd2935b97a990f ld/testsuite/ld-i386/no-plt-1h.dd
04071b12b009bcd5f62fa0bc21cc086a ld/testsuite/ld-i386/no-plt-1h.rd
2b974f872e512db3cd5051b2863db42c ld/testsuite/ld-i386/no-plt-1i.dd
b95b9d03f6ec87b6ccd0b76e9d9277fe ld/testsuite/ld-i386/no-plt-1i.rd
185e59a3eeccb11f1d6a12f0fa5ef0b1 ld/testsuite/ld-i386/no-plt-1j.dd
5d38316a60007e56b98b2b0c8ccea8fb ld/testsuite/ld-i386/no-plt-1j.rd
7f10faf83adda314e4becf6a1a143c1d ld/testsuite/ld-i386/no-plt-check1a.S
86cc5f2867724ccc3fef5b81cb2ef04f ld/testsuite/ld-i386/no-plt-check1b.S
c793ec0d8b40d5cbb3e1cd79aaee7ee6 ld/testsuite/ld-i386/no-plt-extern1a.S
836980a5956ed187998c2fb50ce61db3 ld/testsuite/ld-i386/no-plt-extern1b.S
c8879832168a7e3fbb8185e3f668a4ff ld/testsuite/ld-i386/no-plt-func1.c
34cd3a78d277b55c84fd9e7b293e4509 ld/testsuite/ld-i386/no-plt-main1.c
83e4f29b242ee1f3ef3c3676e240a6f9 ld/testsuite/ld-i386/no-plt.exp
74112f5d00b1bc8acfb9165b1b9ddd0c ld/testsuite/ld-i386/nogot1.d
6578c6fdcd635f9a6f10174cc27f5125 ld/testsuite/ld-i386/nogot1.s
1fe6ae6b1583214e2d42d6b94b234708 ld/testsuite/ld-i386/nogot2.d
adf3d3417bacbbbbd44af52a3a9d1879 ld/testsuite/ld-i386/nogot2.s
32c0be4fb7f3030bf9c74c0a836d4f2e ld/testsuite/ld-i386/pass.out
fbfd82c1904aafdc454c9b25164bf59e ld/testsuite/ld-i386/pcrel16.d
86c55cbae78801844b5fbab4a5134989 ld/testsuite/ld-i386/pcrel16.s
f4baf242d9ff9f702b7e51e343d60d1c ld/testsuite/ld-i386/pcrel16abs.d
@@ -13118,6 +13222,27 @@
48fa49fa20607843d160a0a82b7878c5 ld/testsuite/ld-i386/pr19319.dd
5206bbf6e456f9826d98aac92a36c08a ld/testsuite/ld-i386/pr19319a.S
aa0536f581ce36bef88f074da8de2a9a ld/testsuite/ld-i386/pr19319b.S
302ebdd8428640e533abd85f161dbc83 ld/testsuite/ld-i386/pr19615.d
ed5e5c49ecec0c98c131d429372e47ff ld/testsuite/ld-i386/pr19615.s
f6bc5a760561f9f3c811275b5dc45a9f ld/testsuite/ld-i386/pr19827-nacl.rd
f6bc5a760561f9f3c811275b5dc45a9f ld/testsuite/ld-i386/pr19827.rd
f1c77b700705334ba881aacb565021e8 ld/testsuite/ld-i386/pr19827a.S
1af381ced5b0c83b310fcaf134a0ca5c ld/testsuite/ld-i386/pr19827b.S
473c979f1b91e69a2c2e72e009f24bb6 ld/testsuite/ld-i386/pr20117.d
dcd342e8f220bd307122c6aae5af52dc ld/testsuite/ld-i386/pr20117.s
ff23f73730bff11da38c9395d24b073c ld/testsuite/ld-i386/pr20244-1.s
c77dc790f81d21fba45f4576ebff7708 ld/testsuite/ld-i386/pr20244-1a.d
2ab7584683bb01f0b843920ed8c1b194 ld/testsuite/ld-i386/pr20244-1b.d
f4209fdbfa1cf84cf720f573a6b544ba ld/testsuite/ld-i386/pr20244-1c.d
3d9529c95dcf6d10edc8294bd828b8f3 ld/testsuite/ld-i386/pr20244-2.s
0db0a68fb84c675c6b43cd2380d99c72 ld/testsuite/ld-i386/pr20244-2a.d
a0237d08a79d62a173bcaf70fb0951d3 ld/testsuite/ld-i386/pr20244-2b.d
76b7f33df57112180ba7255a1f6e64e7 ld/testsuite/ld-i386/pr20244-2c.d
2aedcfdeba9f03634abc2cc6176a26c4 ld/testsuite/ld-i386/pr20244-2d.d
34cd3a78d277b55c84fd9e7b293e4509 ld/testsuite/ld-i386/pr20244-3a.c
c54bbf6a69bd0b2180b9b00e2fb926e6 ld/testsuite/ld-i386/pr20244-3b.S
72b77c6732940910430a4a6131062a3c ld/testsuite/ld-i386/pr20244-3c.S
49c4b55501b588ffed19d33af42c11ab ld/testsuite/ld-i386/pr20244-3d.S
92de073b153a3be8e4c2e986b9bc785d ld/testsuite/ld-i386/protected1.d
538ea3fd8f05afd6d0dc78414f610d00 ld/testsuite/ld-i386/protected1.s
339ba4f5757c67ee3e47afe85ecb3617 ld/testsuite/ld-i386/protected2.d
@@ -13324,11 +13449,11 @@
39b77a44ebd85f7f6566b86840839ca0 ld/testsuite/ld-ifunc/ifunc-20.s
b9292b92d27952d206f01321ea255d9b ld/testsuite/ld-ifunc/ifunc-21-i386.d
533fade9b24b1328344a400a29dc5a87 ld/testsuite/ld-ifunc/ifunc-21-i386.s
27bdf0526567af01ab37156506613f25 ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
3eae009079c3e1f78f4f4f575f39bdae ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
e9a9585b6087db16e0dae8c8250b40bb ld/testsuite/ld-ifunc/ifunc-21-x86-64.s
b9292b92d27952d206f01321ea255d9b ld/testsuite/ld-ifunc/ifunc-22-i386.d
a59b1a4fbade5fe125056db43ed98930 ld/testsuite/ld-ifunc/ifunc-22-i386.s
27bdf0526567af01ab37156506613f25 ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
3eae009079c3e1f78f4f4f575f39bdae ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
301ef75eee0a3c20dc93303d9e85f399 ld/testsuite/ld-ifunc/ifunc-22-x86-64.s
cec051f23f977dd374cdf989a646d79d ld/testsuite/ld-ifunc/ifunc-3-x86.s
8e9f4eef936260af25a724875e40a770 ld/testsuite/ld-ifunc/ifunc-3a-x86.d
@@ -13351,7 +13476,7 @@
103356fa54f7510ebb11e1796d3fe237 ld/testsuite/ld-ifunc/ifunc-5b-local-x86-64.d
3d1a94dda9922568a16ad8b32c3664b9 ld/testsuite/ld-ifunc/ifunc-5b-x86-64.d
0a6d3eff262d42539ba730775a9b40e2 ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d
9faa9c16d5a2edad1cfb22afb39ea1a7 ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d
e720581e90b070cb262b972ad5b00a4d ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d
c33bd20b84debeef306fbac51829d907 ld/testsuite/ld-ifunc/ifunc-6-i386.s
fcb22cf8a1f82a48942ed7db399e8991 ld/testsuite/ld-ifunc/ifunc-6-x86-64.s
9e9cddc515d5c76e1d37ada15625ac4f ld/testsuite/ld-ifunc/ifunc-6a-i386.d
@@ -14738,7 +14863,7 @@
04e931997df7d1d011536db92ffbc98e ld/testsuite/ld-plugin/lto-8b.c
00b822743f4480c5712411291bec2f5e ld/testsuite/ld-plugin/lto-9.cc
5420edfe48faf3c5f554f8aeea213765 ld/testsuite/ld-plugin/lto-9.d
53dcc2810cc44baa22063bd406d7c285 ld/testsuite/ld-plugin/lto.exp
ace400c6e760c6e3f55ce98603ef426a ld/testsuite/ld-plugin/lto.exp
e6f0c2a8972646b01ce62774b99d26c3 ld/testsuite/ld-plugin/main.c
2383ad102ddb913b276a454c41fdbb76 ld/testsuite/ld-plugin/plugin-1.d
624433740608f0fd6087480046b60990 ld/testsuite/ld-plugin/plugin-10.d
@@ -14997,7 +15122,7 @@
c3407f7dd750c46beeed846038ac2c4f ld/testsuite/ld-powerpc/powerpc-32-export-class.xd
61b50869f045e30c21cd3430d97b63c0 ld/testsuite/ld-powerpc/powerpc-64-export-class.rd
c4fb672b12a30041fe72cdf7cc9c21b5 ld/testsuite/ld-powerpc/powerpc-64-export-class.xd
a531bacde16d26ff3caaefac35f0b933 ld/testsuite/ld-powerpc/powerpc.exp
b47e5c6ebe44ca85775d7b724723abd1 ld/testsuite/ld-powerpc/powerpc.exp
314b6221726085da3a08e21232e5886c ld/testsuite/ld-powerpc/ppc476-shared.d
56f0d050f5f885874e6abb403123a22b ld/testsuite/ld-powerpc/ppc476-shared.lnk
900b658f364355886b9103a9e7144807 ld/testsuite/ld-powerpc/ppc476-shared.s
@@ -15032,6 +15157,9 @@
4f1d059fd6c74f43c5e8d81138f1c7a6 ld/testsuite/ld-powerpc/tls32.g
4be01f64e6bdc206797b1b4d8b492dbd ld/testsuite/ld-powerpc/tls32.s
cfef6d60f250fffb43490bf0c199daa1 ld/testsuite/ld-powerpc/tls32.t
b50df70b35e6fb46cc508111031d68df ld/testsuite/ld-powerpc/tlsdll.s
5bca65d22df7264b5f9d7f1ac82ab105 ld/testsuite/ld-powerpc/tlsdll.ver
4750c765b98ac834cc9c1b4174b54bfe ld/testsuite/ld-powerpc/tlsdll_32.s
4cd74f84e969a26a2f7f281a9a0c5ba2 ld/testsuite/ld-powerpc/tlsexe.d
f697b614fd60542d8357139b2e00023a ld/testsuite/ld-powerpc/tlsexe.g
954a609262bed1bd7f2b386d39763e3d ld/testsuite/ld-powerpc/tlsexe.r
@@ -15070,6 +15198,10 @@
f3f4d3a1dd2ecf6f44b5bc3333d2d79f ld/testsuite/ld-powerpc/tlsopt4.s
823b9ecb42faee6c48324c601428c5b2 ld/testsuite/ld-powerpc/tlsopt4_32.d
9f34854a67102932713ec55fc2f3f3c6 ld/testsuite/ld-powerpc/tlsopt4_32.s
2341186973c9b18564364e2f8f7bee5f ld/testsuite/ld-powerpc/tlsopt5.d
a6e47e999935e59bd95e342125166e54 ld/testsuite/ld-powerpc/tlsopt5.s
e92d063f95450daf0c58fc20c21be587 ld/testsuite/ld-powerpc/tlsopt5_32.d
81c0f83503784366c830d7620fb1bf0a ld/testsuite/ld-powerpc/tlsopt5_32.s
183bfe5972cb075419991eec73cb0d7b ld/testsuite/ld-powerpc/tlsso.d
05de0c8954b316f7c85a6729b51be605 ld/testsuite/ld-powerpc/tlsso.g
34193877f8146c8cc085d724093ecebe ld/testsuite/ld-powerpc/tlsso.r
@@ -16294,15 +16426,15 @@
fe4cd137ae5f2cbf7c4b3a01738c1777 ld/testsuite/ld-x86-64/bnd-ifunc-2.s
5ba61fa26b0eee3b152864edaf32962e ld/testsuite/ld-x86-64/bnd-plt-1.d
0cdb1bfbb0f16f8d3dbdba1c7fb48f8b ld/testsuite/ld-x86-64/call1.s
6a2027b07870a602ad813d79b8655fe7 ld/testsuite/ld-x86-64/call1a.d
e4af2f43a845f96484fa613dd7699b0d ld/testsuite/ld-x86-64/call1b.d
f587aa14f0509738b0dba1dfc3b120bd ld/testsuite/ld-x86-64/call1c.d
f42075b03efc6ffa9520d3b5d7dbc231 ld/testsuite/ld-x86-64/call1d.d
2ec99d34fd54245276c16cd4d735758a ld/testsuite/ld-x86-64/call1e.d
850e77d7c44bf300eadead395b9a1be3 ld/testsuite/ld-x86-64/call1f.d
c96dc06df6b43471a11ddda6b37ed7a9 ld/testsuite/ld-x86-64/call1g.d
49b0feecbb0afe5b0446c08e85a7d8b9 ld/testsuite/ld-x86-64/call1h.d
56018c772d8ab524212012f4fe5be99b ld/testsuite/ld-x86-64/call1i.d
52f026c39fc2846e8c927cd666cf479f ld/testsuite/ld-x86-64/call1a.d
de070fefce6175aae6f2a845c1a95bd5 ld/testsuite/ld-x86-64/call1b.d
0ecda3cd3f3d924cc53467100b0bf489 ld/testsuite/ld-x86-64/call1c.d
f3c414f10dd33ed247964906d0cd517e ld/testsuite/ld-x86-64/call1d.d
26c96b3bbe5dd852585f4cdd32e0e574 ld/testsuite/ld-x86-64/call1e.d
e913bca6e24beefde3d8baece5f4728b ld/testsuite/ld-x86-64/call1f.d
1b858fe5c52bd4cec28ffc6e57a82497 ld/testsuite/ld-x86-64/call1g.d
1fe01d271e76ce46ac9611b60a8a9196 ld/testsuite/ld-x86-64/call1h.d
164ccfa5d32f5739ce3d31a86f2ed1ee ld/testsuite/ld-x86-64/call1i.d
91a199ecf6afe1be369939ed9c9e78d2 ld/testsuite/ld-x86-64/compressed1.d
f05168212b4b926d40f433c53fba8a2b ld/testsuite/ld-x86-64/compressed1.s
8d45d88edb169c63b9cde50875f663fa ld/testsuite/ld-x86-64/copyreloc-lib.c
@@ -16375,12 +16507,14 @@
e951ee333716df0a0aa2091d20df80df ld/testsuite/ld-x86-64/lea1j.d
f3e42470e7e2a643acb188678616a8ae ld/testsuite/ld-x86-64/lea1k.d
911f51319882353369f941edef4b0ef9 ld/testsuite/ld-x86-64/lea1l.d
4b97070f1c420340cb74c883c8ba70f5 ld/testsuite/ld-x86-64/libno-plt-1b.dd
b369113a4192bff7f3af5c89874b7a52 ld/testsuite/ld-x86-64/libno-plt-1b.rd
f5740794f967cb7e67a9d83d9c56f22b ld/testsuite/ld-x86-64/line.exp
3d6b62b2da8022cf1de24aeb99cc0d9f ld/testsuite/ld-x86-64/load1.s
e2ffb96a79b8cacac55a4c6cb3283064 ld/testsuite/ld-x86-64/load1a-nacl.d
d65b27cc013330ccb7c76225e4e788dd ld/testsuite/ld-x86-64/load1a.d
3ba9b03bd1a1299377f11f7c2fa30d42 ld/testsuite/ld-x86-64/load1a.d
0db26a753aba6b34a53841bc52dd75dd ld/testsuite/ld-x86-64/load1b-nacl.d
769b41c82ab8f6be113619c08515d463 ld/testsuite/ld-x86-64/load1b.d
b1c81362ff26d7d872afddeefda89e5e ld/testsuite/ld-x86-64/load1b.d
9186b4181f4b278053cdd0199f7240c5 ld/testsuite/ld-x86-64/load1c-nacl.d
9713345525343d38a9777fd69e37d9c5 ld/testsuite/ld-x86-64/load1c.d
c3967cc96b2d8e730e7d5dcfe406ff7e ld/testsuite/ld-x86-64/load1d-nacl.d
@@ -16421,10 +16555,30 @@
e7f72cd9cfac1f47d9c47402b613fbec ld/testsuite/ld-x86-64/mpx4.dd
874fb04fe5be1cb47c6926564daf9c84 ld/testsuite/ld-x86-64/mpx4a.s
e0388052c93bea83befb3ab34ba73a6d ld/testsuite/ld-x86-64/mpx4b.s
8f8f68dfd324d0e82a43028785ce0585 ld/testsuite/ld-x86-64/no-plt-1a.dd
9659c8c29ca4a05ff7088e1d17245abf ld/testsuite/ld-x86-64/no-plt-1a.rd
d77a74dd5625815a0c8ad5580e20256e ld/testsuite/ld-x86-64/no-plt-1b.dd
73db577c07079cb22cd17cef6f58ccf4 ld/testsuite/ld-x86-64/no-plt-1b.rd
588277f4d705484e755901202798f34c ld/testsuite/ld-x86-64/no-plt-1c.dd
b8ed9daa99ee2f5efd17f9eecce24d4b ld/testsuite/ld-x86-64/no-plt-1c.rd
f77516f31fd55c74f439ad19fa36b38c ld/testsuite/ld-x86-64/no-plt-1d.dd
34ed1362eebbe3289f3f4fecfdbf2796 ld/testsuite/ld-x86-64/no-plt-1d.rd
fef6de31025bcc5d1c0cce21643ff5d7 ld/testsuite/ld-x86-64/no-plt-1e.dd
9659c8c29ca4a05ff7088e1d17245abf ld/testsuite/ld-x86-64/no-plt-1e.rd
d77a74dd5625815a0c8ad5580e20256e ld/testsuite/ld-x86-64/no-plt-1f.dd
73db577c07079cb22cd17cef6f58ccf4 ld/testsuite/ld-x86-64/no-plt-1f.rd
9bce3546ae83640f370a56ff50725032 ld/testsuite/ld-x86-64/no-plt-1g.dd
b8ed9daa99ee2f5efd17f9eecce24d4b ld/testsuite/ld-x86-64/no-plt-1g.rd
400749114b17d2fbd880efd0040d0811 ld/testsuite/ld-x86-64/no-plt-check1.S
460218085360dfa55b744eec7aaf2167 ld/testsuite/ld-x86-64/no-plt-extern1.S
c8879832168a7e3fbb8185e3f668a4ff ld/testsuite/ld-x86-64/no-plt-func1.c
34cd3a78d277b55c84fd9e7b293e4509 ld/testsuite/ld-x86-64/no-plt-main1.c
c921b754f2b4c39f16aab77857507e2f ld/testsuite/ld-x86-64/no-plt.exp
a956e939a802d200c7d34d52a64a10ca ld/testsuite/ld-x86-64/nogot1.d
b87c72722f3341ed9b3757e163aedca4 ld/testsuite/ld-x86-64/nogot1.s
14e17be79014d34039412c205d75a578 ld/testsuite/ld-x86-64/nogot2.d
648f81bd49c5e890089548cbd33b3da4 ld/testsuite/ld-x86-64/nogot2.s
32c0be4fb7f3030bf9c74c0a836d4f2e ld/testsuite/ld-x86-64/pass.out
aba37f2b6af131b304532d37b4e22f92 ld/testsuite/ld-x86-64/pcrel16.d
21deaf5784d704c09916457834ccb87a ld/testsuite/ld-x86-64/pcrel8.d
2f5d8a8a5f8cc8e158906f38d744463a ld/testsuite/ld-x86-64/pie1.d
@@ -16506,6 +16660,8 @@
4a58eeac82cb63d6d419a78d82c2903e ld/testsuite/ld-x86-64/pr18176.d
24994c28b7c840d524f8c853a2fa7bff ld/testsuite/ld-x86-64/pr18176.s
9dec9def5ff35ca86a7b6bb168cf92da ld/testsuite/ld-x86-64/pr18176.t
e3871d396bb43bb3435c339254c1e114 ld/testsuite/ld-x86-64/pr18591.d
cea121eb667a29d72f2a679b7516cf41 ld/testsuite/ld-x86-64/pr18591.s
775ce6813ac1f4168f94747b307cdf54 ld/testsuite/ld-x86-64/pr18801.d
b8b08c39266fb4d66bfb6c740ca318fc ld/testsuite/ld-x86-64/pr18801.s
1dad69e35807ff65e8a7e574466ddc38 ld/testsuite/ld-x86-64/pr18815.d
@@ -16533,6 +16689,16 @@
9fb514279a4a6222be151dbdcce11e35 ld/testsuite/ld-x86-64/pr19319.dd
f8171ef291e11fd3e2e8a0feb8a427f6 ld/testsuite/ld-x86-64/pr19319a.S
ff27e5412bc90ca35ef6861f8a939ff6 ld/testsuite/ld-x86-64/pr19319b.S
c23f34ef77717a082f5e39c6ad4e9f3d ld/testsuite/ld-x86-64/pr19615.d
ed5e5c49ecec0c98c131d429372e47ff ld/testsuite/ld-x86-64/pr19615.s
44964354c12b4611fd4d0d3fa1e7a9d0 ld/testsuite/ld-x86-64/pr19827-nacl.rd
44964354c12b4611fd4d0d3fa1e7a9d0 ld/testsuite/ld-x86-64/pr19827.rd
f1c77b700705334ba881aacb565021e8 ld/testsuite/ld-x86-64/pr19827a.S
1af381ced5b0c83b310fcaf134a0ca5c ld/testsuite/ld-x86-64/pr19827b.S
99da8009327e6123a51453b0bd76c711 ld/testsuite/ld-x86-64/pr20093-1.d
ac6d02707f478f50b2a93a9440ff4886 ld/testsuite/ld-x86-64/pr20093-1.s
99da8009327e6123a51453b0bd76c711 ld/testsuite/ld-x86-64/pr20093-2.d
d5d5f7d051c5095f7d5c17cbedcdceac ld/testsuite/ld-x86-64/pr20093-2.s
5a16c8b33f7fc14a778a75390211d675 ld/testsuite/ld-x86-64/protected1.d
72464b10c9ddf08d601e6e1981160a76 ld/testsuite/ld-x86-64/protected1.s
799b5e6cfeb966e6f8ab5e471149673f ld/testsuite/ld-x86-64/protected2-k1om.d
@@ -16636,7 +16802,7 @@
c784c72aed13e9bd4e0d0df3e07f36d1 ld/testsuite/ld-x86-64/x86-64-64-export-class.rd
e928d6484bf8b938f70b05730fc41ec8 ld/testsuite/ld-x86-64/x86-64-x32-export-class.rd
6c5efb94140f6bea6d1e05ddd22d9ce3 ld/testsuite/ld-x86-64/x86-64-x32.rd
f068ba3724b7115c2adc527e0eb471f6 ld/testsuite/ld-x86-64/x86-64.exp
8acb224e2d515f1cbcb99940ae9952bb ld/testsuite/ld-x86-64/x86-64.exp
6f577583952be3de543260d5fb8bbb16 ld/testsuite/ld-xc16x/absrel.d
3998ca79d045f299d12bbd0cf1e6205f ld/testsuite/ld-xc16x/absrel.s
01a0b5ff12180f56fd3e59aca1729442 ld/testsuite/ld-xc16x/offset.d
@@ -16885,7 +17051,7 @@
58039f24ea9f79d8849ef48ab3b72ae3 opcodes/cgen-ibld.in
a92bf8fecfc8db07b2b5c2621430f90a opcodes/cgen-opc.c
70a288863014178c0186c2c1ddb76920 opcodes/cgen.sh
a7c9f35af3545085707a1aa706e9cad0 opcodes/ChangeLog
50c64695c47f648fb1f3b678aaa14b03 opcodes/ChangeLog
58e924c52c2bfeef23d22c4f482edcfc opcodes/ChangeLog-0001
7d7d28737ff404f709104accbd7b7926 opcodes/ChangeLog-0203
1718b45c678a851d089ec7c4edaa9906 opcodes/ChangeLog-2004
@@ -16902,7 +17068,7 @@
2adb7cb7865ac91208f5f94fc4d9f397 opcodes/ChangeLog-9297
b192ee206cc807dd92ffe541cb819d6f opcodes/ChangeLog-9899
82f85f5946700d6818256ee0b9c5ecc9 opcodes/config.in
3fafda2abe7717409fdfc2b4321a74ba opcodes/configure
824359246f7d57f253b83de8c5731751 opcodes/configure
989aac5ffbb4de2ce088934dda1565b1 opcodes/configure.ac
defa00cee5f7bc69f7f680730f909317 opcodes/configure.com
8a02d6bdda2f19baaf3646b4ef4527f8 opcodes/cr16-dis.c
@@ -16950,7 +17116,7 @@
70e6e01daac148d3f013a77e179c795d opcodes/i370-dis.c
3c332f25e1c209ff488b9717c04d4d48 opcodes/i370-opc.c
288c1f65e0d73ae0eaf587af74ec8d7f opcodes/i386-dis-evex.h
7d14e57939148cc7eaf365cccc701644 opcodes/i386-dis.c
74bb97298aece84abca5cfbdb7e75e00 opcodes/i386-dis.c
c7c9d7e1afb2a032e57f5d56afe8ba34 opcodes/i386-gen.c
aaca2091eb5e0a24c07caf25fd313091 opcodes/i386-init.h
c7d2504f5429d51f2cea23509de63b27 opcodes/i386-opc.c
@@ -17117,7 +17283,7 @@
c171fa0116588976056ef26b540eb69c opcodes/po/zh_CN.gmo
2ccdb5f626159dedf687e37713dd930c opcodes/po/zh_CN.po
60c90115b9204942fd51a6ed7a5e6732 opcodes/ppc-dis.c
7b5733175ad4a9f27328002e34baeb06 opcodes/ppc-opc.c
e5f656d5f9f84d57ea752979e505af90 opcodes/ppc-opc.c
9136bf8389a1452d297fe09242924b87 opcodes/rl78-decode.c
981caf96814a59ee09e6d1c39d53ca16 opcodes/rl78-decode.opc
39e393239656160df5eeacc593ee20f9 opcodes/rl78-dis.c
@@ -1,3 +1,301 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.26.1
* configure: Regenerate.
2016-06-29 Tristan Gingold <gingold@adacore.com>
* development.sh: Set development to false.
2016-06-28 Alan Modra <amodra@gmail.com>
Apply from master
2016-05-19 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (ppc64_elf_branch_reloc): Check for NULL owner
before dereferencing.
2016-06-28 Alan Modra <amodra@gmail.com>
PR ld/19264
* elf64-ppc.c (STUB_SHRINK_ITER): Define.
(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
if shrinking stubs.
(ppc64_elf_size_stubs): Adjust to suit.
2016-06-14 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Backport from master
2016-06-14 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20254
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
offsets until reloc_toaddr.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
GOT32 adjustment for static executables.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.
2016-06-13 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Backport from master
2016-06-08 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20221
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
2016-06-09 Alan Modra <amodra@gmail.com>
PR ld/20159
PR ld/16467
* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
(_bfd_elf_add_default_symbol): Don't indirect to/from defined
symbol given a version by a script different to the version
of the symbol being added.
(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
_bfd_elf_strtab_restore. Don't fudge dynstr references.
* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
(struct strtab_save): New.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
when setting need_convert_load.
2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20117
* elf32-i386.c (elf_i386_convert_load): Don't convert
R_386_GOT32.
2016-05-18 Christophe Monat <christophe.monat@st.com>
Backport from master
2016-05-09 Christophe Monat <christophe.monat@st.com>
PR ld/20030
* elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding.
(stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs
to nb_words.
(create_instruction_vldmia): Add is_dp to disambiguate SP/DP
encoding.
(create_instruction_vldmdb): Likewise.
(stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding,
uses it to re-encode.
2016-05-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-05-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20093
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert
GOTPCREL relocation against large section.
* elflink.c (bfd_elf_final_link): Likewise.
2016-05-11 Alan Modra <amodra@gmail.com>
PR 20060
* elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local.
* elf32-ppc.c (ppc_elf_tls_setup): Likewise.
2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20006
* elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections
when estimating distances between output sections.
2016-03-29 Toni Spets <toni.spets@iki.fi>
PR 19878
* coffcode.h (coff_write_object_contents): Revert accidental
2014-11-10 change.
2016-03-17 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19827
* elf32-i386.c (elf_i386_check_relocs): Bind defined symbol
locally in PIE.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
(elf_x86_64_relocate_section): Likewise.
2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-01-30 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19539
* elf32-i386.c (elf_i386_reloc_type_class): Check relocation
against STT_GNU_IFUNC symbol only with dynamic symbols.
* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
2016-03-15 Nick Clifton <nickc@redhat.com>
Backport from master:
2016-03-09 Leon Winter <winter-gcc@bfw-online.de>
PR ld/19623
* cofflink.c (_bfd_coff_generic_relocate_section): Do not apply
relocations against absolute symbols.
2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-01-28 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/19523
* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to
decompress debug sections.
2016-03-09 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19579
Backport from master
2016-03-08 H.J. Lu <hongjiu.lu@intel.com>
* elflink.c (_bfd_elf_merge_symbol): Group common symbol checking
together.
2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
* elflink.c (_bfd_elf_merge_symbol): Treat common symbol in
executable as definition if the new definition comes from a
shared library.
2016-03-09 Nick Clifton <nickc@redhat.com>
Alan Modra <amodra@gmail.com>
PR binutils/19775
* archive.c (bfd_generic_openr_next_archived_file): Allow zero
length elements in the archive.
* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise.
2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19752
Backport from master
2015-12-18 H.J. Lu <hongjiu.lu@intel.com>
* coff-x86_64.c (coff_amd64_reloc): Fix formatting.
2015-12-18 Nick Clifton <nickc@redhat.com>
* coff-i386.c (coff_i386_reloc): Fix formatting.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19698
* elflink.c (bfd_elf_record_link_assignment): Set versioned if
symbol version is unknown.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19553
* elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED
if a symbol from a library loaded via DT_NEEDED doesn't match
the symbol referenced by regular object.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset
to (bfd_vma) -1 when setting needs_plt to 0.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
2016-02-26 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (create_linkage_sections): Create sfpr when
save_restore_funcs, rest of sections when not relocatable.
(ppc64_elf_init_stub_bfd): Always call create_linkage_sections.
(sfpr_define): Define all symbols on emitted code.
(ppc64_elf_func_desc_adjust): Adjust for sfpr now being created
when relocatable. Move sfpr_define loop earlier.
2016-02-25 Jiong Wang <jiong.wang@arm.com>
Backport from master
2016-01-21 Jiong Wang <jiong.wang@arm.com>
* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
veneer for sym_sec != input_sec.
(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
(elfNN_aarch64_final_link_relocate): Take rela addend into account when
calculation destination.
2016-02-10 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-10 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19601
* elf32-i386.c (elf_i386_relocate_section): Mask off the least
significant bit in GOT offset for R_386_GOT32X.
2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19542
* elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated
distances in the compressed_size field of the output section.
2016-02-01 John David Anglin <danglin@gcc.gnu.org>
PR ld/19526
* elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output
files.
* elf64-hppa.c (elf32_hppa_final_link): Likewise. Remove retval.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.26.0
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.26
@@ -119,7 +417,7 @@
* configure: Regenerate.
2015-11-11 Alan Modra <amodra@gmail.com>
Peter Bergner <bergner@vnet.ibm.com>
Peter Bergner <bergner@vnet.ibm.com>
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
@@ -179,8 +477,8 @@
2015-10-29 Catherine Moore <clm@codesourcery.com>
* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
section to bfd_abs_section_ptr if the stub is discarded.
* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
section to bfd_abs_section_ptr if the stub is discarded.
2015-10-29 Ed Schouten <ed@nuxi.nl>
@@ -232,7 +530,7 @@
* bfd-in2.h: Regenerate.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
Christophe Monat <christophe.monat@st.com>
Christophe Monat <christophe.monat@st.com>
* bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
@@ -1225,115 +1523,115 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
* bfd/aoutx.h: Replace shared, executable, relocatable and pie
* aoutx.h: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* bfd/bout.c: Likewise.
* bfd/coff-alpha.c: Likewise.
* bfd/coff-arm.c: Likewise.
* bfd/coff-i386.c: Likewise.
* bfd/coff-i960.c: Likewise.
* bfd/coff-m68k.c: Likewise.
* bfd/coff-mcore.c: Likewise.
* bfd/coff-mips.c: Likewise.
* bfd/coff-ppc.c: Likewise.
* bfd/coff-rs6000.c: Likewise.
* bfd/coff-sh.c: Likewise.
* bfd/coff-tic80.c: Likewise.
* bfd/coff-x86_64.c: Likewise.
* bfd/coff64-rs6000.c: Likewise.
* bfd/coffgen.c: Likewise.
* bfd/cofflink.c: Likewise.
* bfd/ecoff.c: Likewise.
* bfd/ecofflink.c: Likewise.
* bfd/elf-bfd.h: Likewise.
* bfd/elf-eh-frame.c: Likewise.
* bfd/elf-ifunc.c: Likewise.
* bfd/elf-m10200.c: Likewise.
* bfd/elf-m10300.c: Likewise.
* bfd/elf-s390-common.c: Likewise.
* bfd/elf-vxworks.c: Likewise.
* bfd/elf.c: Likewise.
* bfd/elf32-arm.c: Likewise.
* bfd/elf32-avr.c: Likewise.
* bfd/elf32-bfin.c: Likewise.
* bfd/elf32-cr16.c: Likewise.
* bfd/elf32-cr16c.c: Likewise.
* bfd/elf32-cris.c: Likewise.
* bfd/elf32-crx.c: Likewise.
* bfd/elf32-d10v.c: Likewise.
* bfd/elf32-dlx.c: Likewise.
* bfd/elf32-epiphany.c: Likewise.
* bfd/elf32-fr30.c: Likewise.
* bfd/elf32-frv.c: Likewise.
* bfd/elf32-ft32.c: Likewise.
* bfd/elf32-h8300.c: Likewise.
* bfd/elf32-hppa.c: Likewise.
* bfd/elf32-i370.c: Likewise.
* bfd/elf32-i386.c: Likewise.
* bfd/elf32-i860.c: Likewise.
* bfd/elf32-ip2k.c: Likewise.
* bfd/elf32-iq2000.c: Likewise.
* bfd/elf32-lm32.c: Likewise.
* bfd/elf32-m32c.c: Likewise.
* bfd/elf32-m32r.c: Likewise.
* bfd/elf32-m68hc11.c: Likewise.
* bfd/elf32-m68hc1x.c: Likewise.
* bfd/elf32-m68k.c: Likewise.
* bfd/elf32-mcore.c: Likewise.
* bfd/elf32-mep.c: Likewise.
* bfd/elf32-metag.c: Likewise.
* bfd/elf32-microblaze.c: Likewise.
* bfd/elf32-moxie.c: Likewise.
* bfd/elf32-msp430.c: Likewise.
* bfd/elf32-mt.c: Likewise.
* bfd/elf32-nds32.c: Likewise.
* bfd/elf32-nios2.c: Likewise.
* bfd/elf32-or1k.c: Likewise.
* bfd/elf32-ppc.c: Likewise.
* bfd/elf32-rl78.c: Likewise.
* bfd/elf32-rx.c: Likewise.
* bfd/elf32-s390.c: Likewise.
* bfd/elf32-score.c: Likewise.
* bfd/elf32-score7.c: Likewise.
* bfd/elf32-sh-symbian.c: Likewise.
* bfd/elf32-sh.c: Likewise.
* bfd/elf32-sh64.c: Likewise.
* bfd/elf32-spu.c: Likewise.
* bfd/elf32-tic6x.c: Likewise.
* bfd/elf32-tilepro.c: Likewise.
* bfd/elf32-v850.c: Likewise.
* bfd/elf32-vax.c: Likewise.
* bfd/elf32-visium.c: Likewise.
* bfd/elf32-xc16x.c: Likewise.
* bfd/elf32-xstormy16.c: Likewise.
* bfd/elf32-xtensa.c: Likewise.
* bfd/elf64-alpha.c: Likewise.
* bfd/elf64-hppa.c: Likewise.
* bfd/elf64-ia64-vms.c: Likewise.
* bfd/elf64-mmix.c: Likewise.
* bfd/elf64-ppc.c: Likewise.
* bfd/elf64-s390.c: Likewise.
* bfd/elf64-sh64.c: Likewise.
* bfd/elf64-x86-64.c: Likewise.
* bfd/elflink.c: Likewise.
* bfd/elfnn-aarch64.c: Likewise.
* bfd/elfnn-ia64.c: Likewise.
* bfd/elfxx-mips.c: Likewise.
* bfd/elfxx-sparc.c: Likewise.
* bfd/elfxx-tilegx.c: Likewise.
* bfd/i386linux.c: Likewise.
* bfd/linker.c: Likewise.
* bfd/m68klinux.c: Likewise.
* bfd/pdp11.c: Likewise.
* bfd/pe-mips.c: Likewise.
* bfd/peXXigen.c: Likewise.
* bfd/reloc.c: Likewise.
* bfd/reloc16.c: Likewise.
* bfd/sparclinux.c: Likewise.
* bfd/sunos.c: Likewise.
* bfd/vms-alpha.c: Likewise.
* bfd/xcofflink.c: Likewise.
* bout.c: Likewise.
* coff-alpha.c: Likewise.
* coff-arm.c: Likewise.
* coff-i386.c: Likewise.
* coff-i960.c: Likewise.
* coff-m68k.c: Likewise.
* coff-mcore.c: Likewise.
* coff-mips.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-sh.c: Likewise.
* coff-tic80.c: Likewise.
* coff-x86_64.c: Likewise.
* coff64-rs6000.c: Likewise.
* coffgen.c: Likewise.
* cofflink.c: Likewise.
* ecoff.c: Likewise.
* ecofflink.c: Likewise.
* elf-bfd.h: Likewise.
* elf-eh-frame.c: Likewise.
* elf-ifunc.c: Likewise.
* elf-m10200.c: Likewise.
* elf-m10300.c: Likewise.
* elf-s390-common.c: Likewise.
* elf-vxworks.c: Likewise.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cr16c.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-crx.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-dlx.c: Likewise.
* elf32-epiphany.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-ft32.c: Likewise.
* elf32-h8300.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-i860.c: Likewise.
* elf32-ip2k.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc11.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-mep.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh-symbian.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-sh64.c: Likewise.
* elf32-spu.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-visium.c: Likewise.
* elf32-xc16x.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* i386linux.c: Likewise.
* linker.c: Likewise.
* m68klinux.c: Likewise.
* pdp11.c: Likewise.
* pe-mips.c: Likewise.
* peXXigen.c: Likewise.
* reloc.c: Likewise.
* reloc16.c: Likewise.
* sparclinux.c: Likewise.
* sunos.c: Likewise.
* vms-alpha.c: Likewise.
* xcofflink.c: Likewise.
2015-08-18 Alan Modra <amodra@gmail.com>
@@ -1387,7 +1685,7 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
* elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
Loose the check for symbol from ABS section.
(elfNN_aarch64_size_stubs): Pass sym_sec.
@@ -1688,10 +1986,10 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/18656
* bfd.c (bfd_convert_section_size): New function.
(bfd_convert_section_contents): Likewise.
* bfd-in2.h: Regenerated.
PR binutils/18656
* bfd.c (bfd_convert_section_size): New function.
(bfd_convert_section_contents): Likewise.
* bfd-in2.h: Regenerated.
2015-07-09 Catherine Moore <clm@codesourcery.com>
@@ -2004,7 +2302,6 @@
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
bfd/
* bfd-in2.h: Regenerated.
* elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define.
(COMPACT_EH_CANT_UNWIND_OPCODE): Define.
@@ -2913,7 +3210,7 @@
2015-03-18 H.J. Lu <hongjiu.lu@intel.com>
* compress.c (bfd_compress_section_contents): Make it static.
* bfd/bfd-in2.h: Regenerated.
* bfd-in2.h: Regenerated.
2015-03-18 Eric Youngdale <eyoungdale@ptc.com>
@@ -3062,8 +3359,8 @@
2015-02-27 Marcus Shawcroft <marcus.shawcroft@arm.com>
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
@@ -3534,7 +3831,7 @@
is weak or pointer_equality_needed is FALSE.
* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Improve
comment discussing why we clear st_value for some symbols.
comment discussing why we clear st_value for some symbols.
2015-02-02 Kuan-Lin Chen <kuanlinchentw@gmail.com>
@@ -802,7 +802,7 @@
Note that last_file->origin can be odd in the case of
BSD-4.4-style element with a long odd size. */
filestart += filestart % 2;
if (filestart <= last_file->proxy_origin)
if (filestart < last_file->proxy_origin)
{
bfd_set_error (bfd_error_malformed_archive);
@@ -2208,7 +2208,7 @@
BSD-4.4-style element with a long odd size. */
filestart = last_file->proxy_origin + size;
filestart += filestart % 2;
if (filestart <= last_file->proxy_origin)
if (filestart < last_file->proxy_origin)
{
bfd_set_error (bfd_error_malformed_archive);
@@ -139,41 +139,41 @@
#define DOIT(x) \
x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))
if (diff != 0)
{
reloc_howto_type *howto = reloc_entry->howto;
unsigned char *addr = (unsigned char *) data + reloc_entry->address;
if (diff != 0)
{
reloc_howto_type *howto = reloc_entry->howto;
unsigned char *addr = (unsigned char *) data + reloc_entry->address;
switch (howto->size)
switch (howto->size)
{
case 0:
{
case 0:
{
char x = bfd_get_8 (abfd, addr);
DOIT (x);
bfd_put_8 (abfd, x, addr);
}
break;
case 1:
{
short x = bfd_get_16 (abfd, addr);
DOIT (x);
bfd_put_16 (abfd, (bfd_vma) x, addr);
}
break;
char x = bfd_get_8 (abfd, addr);
DOIT (x);
bfd_put_8 (abfd, x, addr);
}
break;
case 2:
{
long x = bfd_get_32 (abfd, addr);
DOIT (x);
bfd_put_32 (abfd, (bfd_vma) x, addr);
}
break;
case 1:
{
short x = bfd_get_16 (abfd, addr);
DOIT (x);
bfd_put_16 (abfd, (bfd_vma) x, addr);
}
break;
default:
abort ();
case 2:
{
long x = bfd_get_32 (abfd, addr);
DOIT (x);
bfd_put_32 (abfd, (bfd_vma) x, addr);
}
}
break;
default:
abort ();
}
}
return bfd_reloc_continue;
@@ -138,59 +138,61 @@
#define DOIT(x) \
x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))
if (diff != 0)
{
reloc_howto_type *howto = reloc_entry->howto;
unsigned char *addr = (unsigned char *) data + reloc_entry->address;
if (diff != 0)
{
reloc_howto_type *howto = reloc_entry->howto;
unsigned char *addr = (unsigned char *) data + reloc_entry->address;
/* FIXME: We do not have an end address for data, so we cannot
accurately range check any addresses computed against it.
cf: PR binutils/17512: file: 1085-1761-0.004.
For now we do the best that we can. */
if (addr < (unsigned char *) data || addr > ((unsigned char *) data) + input_section->size)
/* FIXME: We do not have an end address for data, so we cannot
accurately range check any addresses computed against it.
cf: PR binutils/17512: file: 1085-1761-0.004.
For now we do the best that we can. */
if (addr < (unsigned char *) data
|| addr > ((unsigned char *) data) + input_section->size)
{
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
}
switch (howto->size)
{
case 0:
{
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
char x = bfd_get_8 (abfd, addr);
DOIT (x);
bfd_put_8 (abfd, x, addr);
}
break;
switch (howto->size)
case 1:
{
case 0:
{
char x = bfd_get_8 (abfd, addr);
DOIT (x);
bfd_put_8 (abfd, x, addr);
}
break;
case 1:
{
short x = bfd_get_16 (abfd, addr);
DOIT (x);
bfd_put_16 (abfd, (bfd_vma) x, addr);
}
break;
short x = bfd_get_16 (abfd, addr);
DOIT (x);
bfd_put_16 (abfd, (bfd_vma) x, addr);
}
break;
case 2:
{
long x = bfd_get_32 (abfd, addr);
DOIT (x);
bfd_put_32 (abfd, (bfd_vma) x, addr);
}
break;
case 4:
{
long long x = bfd_get_64 (abfd, addr);
DOIT (x);
bfd_put_64 (abfd, (bfd_vma) x, addr);
}
break;
case 2:
{
long x = bfd_get_32 (abfd, addr);
DOIT (x);
bfd_put_32 (abfd, (bfd_vma) x, addr);
}
break;
default:
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
case 4:
{
long long x = bfd_get_64 (abfd, addr);
DOIT (x);
bfd_put_64 (abfd, (bfd_vma) x, addr);
}
}
break;
default:
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
}
}
return bfd_reloc_continue;
@@ -4076,6 +4076,8 @@
internal_f.f_flags |= F_DYNLOAD;
#endif
memset (&internal_a, 0, sizeof internal_a);
{
unsigned int magic = 0;
@@ -2977,6 +2977,12 @@
else
{
sec = sections[symndx];
/* PR 19623: Relocations against symbols in
the absolute sections should ignored. */
if (bfd_is_abs_section (sec))
continue;
val = (sec->output_section->vma
+ sec->output_offset
+ sym->n_value);
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for bfd 2.26.
# Generated by GNU Autoconf 2.64 for bfd 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='bfd'
PACKAGE_TARNAME='bfd'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='bfd 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='bfd 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1351,7 +1351,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures bfd 2.26 to adapt to many kinds of systems.
\`configure' configures bfd 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1422,7 +1422,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of bfd 2.26:";;
short | recursive ) echo "Configuration of bfd 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1543,7 +1543,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
bfd configure 2.26
bfd configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2185,7 +2185,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by bfd $as_me 2.26, which was
It was created by bfd $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3993,7 +3993,7 @@
# Define the identity of the package.
PACKAGE='bfd'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -16533,7 +16533,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by bfd $as_me 2.26, which was
This file was extended by bfd $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -16597,7 +16597,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
bfd config.status 2.26
bfd config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -16,4 +16,4 @@
development=true
development=false
@@ -3706,8 +3706,10 @@
fail more quickly. */
return FALSE;
if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL
|| ! bfd_check_format (debug_bfd, bfd_object)
|| !(debug_bfd->flags |= BFD_DECOMPRESS,
bfd_check_format (debug_bfd, bfd_object))
|| (msec = find_debug_info (debug_bfd,
debug_sections, NULL)) == NULL
|| !bfd_generic_link_read_symbols (debug_bfd))
@@ -2039,9 +2039,11 @@
extern unsigned int _bfd_elf_strtab_refcount
(struct elf_strtab_hash *, bfd_size_type);
extern void _bfd_elf_strtab_clear_all_refs
(struct elf_strtab_hash *tab);
extern void _bfd_elf_strtab_restore_size
(struct elf_strtab_hash *, bfd_size_type);
(struct elf_strtab_hash *);
extern void *_bfd_elf_strtab_save
(struct elf_strtab_hash *);
extern void _bfd_elf_strtab_restore
(struct elf_strtab_hash *, void *);
extern bfd_size_type _bfd_elf_strtab_size
(struct elf_strtab_hash *);
extern bfd_size_type _bfd_elf_strtab_offset
@@ -215,16 +215,45 @@
tab->array[idx]->refcount = 0;
}
/* Downsizes strtab. Entries from IDX up to the current size are
removed from the array. */
struct strtab_save
{
bfd_size_type size;
unsigned int refcount[1];
};
void *
_bfd_elf_strtab_save (struct elf_strtab_hash *tab)
{
struct strtab_save *save;
bfd_size_type idx, size;
size = sizeof (*save) + (tab->size - 1) * sizeof (save->refcount[0]);
save = bfd_malloc (size);
if (save == NULL)
return save;
save->size = tab->size;
for (idx = 1; idx < tab->size; idx++)
save->refcount[idx] = tab->array[idx]->refcount;
return save;
}
void
_bfd_elf_strtab_restore_size (struct elf_strtab_hash *tab, bfd_size_type idx)
_bfd_elf_strtab_restore (struct elf_strtab_hash *tab, void *buf)
{
bfd_size_type curr_size = tab->size;
bfd_size_type idx, curr_size = tab->size;
struct strtab_save *save = (struct strtab_save *) buf;
BFD_ASSERT (tab->sec_size == 0);
BFD_ASSERT (idx <= curr_size);
tab->size = idx;
BFD_ASSERT (save->size <= curr_size);
tab->size = save->size;
for (idx = 1; idx < save->size; ++idx)
tab->array[idx]->refcount = save->refcount[idx];
for (; idx < curr_size; ++idx)
{
/* We don't remove entries from the hash table, just set their
@@ -7374,18 +7374,21 @@
{
/* A6.5 Extension register load or store instruction
A7.7.229
We look only for the 32-bit registers case since the DP (64-bit
registers) are not supported for STM32L4XX
We look for SP 32-bit and DP 64-bit registers.
Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
<list> is consecutive 64-bit registers
1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
<list> is consecutive 32-bit registers
1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
if P==0 && U==1 && W==1 && Rn=1101 VPOP
if PUW=010 || PUW=011 || PUW=101 VLDM. */
return
((insn & 0xfe100f00) == 0xec100a00)
(((insn & 0xfe100f00) == 0xec100b00) ||
((insn & 0xfe100f00) == 0xec100a00))
&&
(((((insn << 7) >> 28) & 0xd) == 0x4)
|| ((((insn << 7) >> 28) & 0xd) == 0x5)
|| ((((insn << 7) >> 28) & 0xd) == 0x9));
@@ -7402,19 +7405,19 @@
stm32l4xx_need_create_replacing_stub (const insn32 insn,
bfd_arm_stm32l4xx_fix stm32l4xx_fix)
{
int nb_regs = 0;
int nb_words = 0;
/* The field encoding the register list is the same for both LDMIA
and LDMDB encodings. */
if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
nb_regs = popcount (insn & 0x0000ffff);
nb_words = popcount (insn & 0x0000ffff);
else if (is_thumb2_vldm (insn))
nb_regs = (insn & 0xff);
nb_words = (insn & 0xff);
/* DEFAULT mode accounts for the real bug condition situation,
ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
return
(stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_regs > 8 :
(stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
(stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
}
@@ -16242,30 +16245,31 @@
}
static inline bfd_vma
create_instruction_vldmia (int base_reg, int wback, int num_regs,
create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
int first_reg)
{
/* A8.8.332 VLDM (A8-922)
VLMD{MODE} Rn{!}, {list} (Encoding T2). */
bfd_vma patched_inst = 0xec900a00
VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
| (wback << 21)
| (base_reg << 16)
| (num_regs & 0x000000ff)
| (((unsigned)first_reg>>1) & 0x0000000f) << 12
| (num_words & 0x000000ff)
| (((unsigned)first_reg >> 1) & 0x0000000f) << 12
| (first_reg & 0x00000001) << 22;
return patched_inst;
}
static inline bfd_vma
create_instruction_vldmdb (int base_reg, int num_regs, int first_reg)
create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
int first_reg)
{
/* A8.8.332 VLDM (A8-922)
VLMD{MODE} Rn!, {} (Encoding T2). */
bfd_vma patched_inst = 0xed300a00
VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
| (base_reg << 16)
| (num_regs & 0x000000ff)
| (((unsigned)first_reg>>1) & 0x0000000f) << 12
| (num_words & 0x000000ff)
| (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
| (first_reg & 0x00000001) << 22;
return patched_inst;
@@ -16745,15 +16749,15 @@
const bfd_byte *const initial_insn_addr,
bfd_byte *const base_stub_contents)
{
int num_regs = ((unsigned int)initial_insn << 24) >> 24;
int num_words = ((unsigned int) initial_insn << 24) >> 24;
bfd_byte *current_stub_contents = base_stub_contents;
BFD_ASSERT (is_thumb2_vldm (initial_insn));
/* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
smaller than 8 registers load sequences that do not cause the
smaller than 8 words load sequences that do not cause the
hardware issue. */
if (num_regs <= 8)
if (num_words <= 8)
{
current_stub_contents =
@@ -16768,28 +16772,30 @@
}
else
{
bfd_boolean is_dp =
(initial_insn & 0xfe100f00) == 0xec100b00;
bfd_boolean is_ia_nobang =
(((initial_insn << 7) >> 28) & 0xd) == 0x4;
bfd_boolean is_ia_bang =
(((initial_insn << 7) >> 28) & 0xd) == 0x5;
bfd_boolean is_db_bang =
(((initial_insn << 7) >> 28) & 0xd) == 0x9;
int base_reg = ((unsigned int)initial_insn << 12) >> 28;
int base_reg = ((unsigned int) initial_insn << 12) >> 28;
int first_reg = ((((unsigned int)initial_insn << 16) >> 28) << 1)
int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
| (((unsigned int)initial_insn << 9) >> 31);
int chunks = (num_regs%8) ? (num_regs/8 + 1) : (num_regs/8);
int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
int chunk;
/* The test coverage has been done assuming the following
hypothesis that exactly one of the previous is_ predicates is
true. */
BFD_ASSERT ((is_ia_nobang ^ is_ia_bang ^ is_db_bang) &&
!(is_ia_nobang & is_ia_bang & is_db_bang));
BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
&& !(is_ia_nobang & is_ia_bang & is_db_bang));
/* We treat the cutting of the register in one pass for all
/* We treat the cutting of the words in one pass for all
cases, then we emit the adjustments:
vldm rx, {...}
@@ -16802,29 +16808,34 @@
vldmd rx!, {...}
-> vldmb rx!, {8_words_or_less} for each needed 8_word. */
for (chunk = 0; chunk<chunks; ++chunk)
for (chunk = 0; chunk < chunks; ++chunk)
{
bfd_vma new_insn = 0;
if (is_ia_nobang || is_ia_bang)
{
current_stub_contents =
push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
create_instruction_vldmia
(base_reg,
1,
chunks - (chunk + 1) ?
8 : num_regs - chunk * 8,
first_reg + chunk * 8));
new_insn = create_instruction_vldmia
(base_reg,
is_dp,
1,
chunks - (chunk + 1) ?
8 : num_words - chunk * 8,
first_reg + chunk * 8);
}
else if (is_db_bang)
{
current_stub_contents =
push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
create_instruction_vldmdb
(base_reg,
chunks - (chunk + 1) ?
8 : num_regs - chunk * 8,
first_reg + chunk * 8));
new_insn = create_instruction_vldmdb
(base_reg,
is_dp,
chunks - (chunk + 1) ?
8 : num_words - chunk * 8,
first_reg + chunk * 8);
}
if (new_insn)
current_stub_contents =
push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
new_insn);
}
/* Only this case requires the base register compensation
@@ -16834,7 +16845,7 @@
current_stub_contents =
push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
create_instruction_sub
(base_reg, base_reg, 4*num_regs));
(base_reg, base_reg, 4*num_words));
}
@@ -1826,12 +1826,13 @@
Elf_Internal_Rela *irel, *irelend;
Elf_Internal_Sym *isym;
Elf_Internal_Sym *isymbuf = NULL;
bfd_vma toaddr;
bfd_vma toaddr, reloc_toaddr;
struct elf_link_hash_entry **sym_hashes;
struct elf_link_hash_entry **end_hashes;
unsigned int symcount;
struct avr_relax_info *relax_info;
struct avr_property_record *prop_record = NULL;
bfd_boolean did_shrink = FALSE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
@@ -1862,15 +1863,32 @@
}
}
/* We need to look at all relocs with offsets less than toaddr. prop
records handling adjusts toaddr downwards to avoid moving syms at the
address of the property record, but all relocs with offsets between addr
and the current value of toaddr need to have their offsets adjusted.
Assume addr = 0, toaddr = 4 and count = 2. After prop records handling,
toaddr becomes 2, but relocs with offsets 2 and 3 still need to be
adjusted (to 0 and 1 respectively), as the first 2 bytes are now gone.
So record the current value of toaddr here, and use it when adjusting
reloc offsets. */
reloc_toaddr = toaddr;
irel = elf_section_data (sec)->relocs;
irelend = irel + sec->reloc_count;
if (toaddr - addr - count > 0)
memmove (contents + addr, contents + addr + count,
(size_t) (toaddr - addr - count));
{
memmove (contents + addr, contents + addr + count,
(size_t) (toaddr - addr - count));
did_shrink = TRUE;
}
if (prop_record == NULL)
sec->size -= count;
{
sec->size -= count;
did_shrink = TRUE;
}
else
{
@@ -1889,12 +1907,20 @@
prop_record->data.align.preceding_deleted += count;
break;
};
/* If toaddr == (addr + count), then we didn't delete anything, yet
we fill count bytes backwards from toaddr. This is still ok - we
end up overwriting the bytes we would have deleted. We just need
to remember we didn't delete anything i.e. don't set did_shrink,
so that we don't corrupt reloc offsets or symbol values.*/
memset (contents + toaddr - count, fill, count);
/* Adjust the TOADDR to avoid moving symbols located at the address
of the property record, which has not moved. */
toaddr -= count;
}
if (!did_shrink)
return TRUE;
for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
@@ -1906,7 +1932,7 @@
if ((irel->r_offset > addr
&& irel->r_offset < toaddr))
&& irel->r_offset < reloc_toaddr))
{
if (debug_relax)
printf ("Relocation at address 0x%x needs to be moved.\n"
@@ -3245,6 +3245,8 @@
static bfd_boolean
elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
{
struct stat buf;
if (!bfd_elf_final_link (abfd, info))
return FALSE;
@@ -3252,6 +3254,13 @@
/* If we're producing a final executable, sort the contents of the
unwind section. */
if (bfd_link_relocatable (info))
return TRUE;
/* Do not attempt to sort non-regular files. This is here
especially for configure scripts and kernel builds which run
tests with "ld [...] -o /dev/null". */
if (stat (abfd->filename, &buf) != 0
|| !S_ISREG(buf.st_mode))
return TRUE;
return elf_hppa_sort_unwind (abfd);
@@ -1830,7 +1830,8 @@
&& (sec->flags & SEC_ALLOC) != 0
&& (r_type != R_386_PC32
|| (h != NULL
&& (! SYMBOLIC_BIND (info, h)
&& (! (bfd_link_pie (info)
|| SYMBOLIC_BIND (info, h))
|| h->root.type == bfd_link_hash_defweak
|| !h->def_regular))))
|| (ELIMINATE_COPY_RELOCS
@@ -1961,7 +1962,7 @@
return FALSE;
}
if ((r_type == R_386_GOT32 || r_type == R_386_GOT32X)
if (r_type == R_386_GOT32X
&& (h == NULL || h->type != STT_GNU_IFUNC))
sec->need_convert_load = 1;
}
@@ -2490,12 +2491,14 @@
}
else
{
eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
}
else
{
eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
@@ -2813,14 +2816,16 @@
unsigned int nop;
bfd_vma nop_offset;
if (r_type != R_386_GOT32 && r_type != R_386_GOT32X)
/* Don't convert R_386_GOT32 since we can't tell if it is applied
to "mov $foo@GOT, %reg" which isn't a load via GOT. */
if (r_type != R_386_GOT32X)
continue;
roff = irel->r_offset;
if (roff < 2)
continue;
addend = bfd_get_32 (abfd, contents + roff);
if (addend != 0)
continue;
@@ -2828,13 +2833,11 @@
modrm = bfd_get_8 (abfd, contents + roff - 1);
baseless = (modrm & 0xc7) == 0x5;
if (r_type == R_386_GOT32X
&& baseless
if (baseless
&& bfd_link_pic (link_info))
{
/* For PIC, disallow R_386_GOT32X without a base register
since we don't know what the GOT base is. Allow
R_386_GOT32 for existing object files. */
since we don't know what the GOT base is. */
const char *name;
if (r_symndx < symtab_hdr->sh_info)
@@ -2862,12 +2865,6 @@
if (opcode != 0x8b)
{
/* Only convert R_386_GOT32X relocation for call, jmp or
one of adc, add, and, cmp, or, sbb, sub, test, xor
instructions. */
if (r_type != R_386_GOT32X)
continue;
/* It is OK to convert indirect branch to direct branch. It
is OK to convert adc, add, and, cmp, or, sbb, sub, test,
xor only when PIC is false. */
@@ -2875,8 +2872,8 @@
continue;
}
/* Try to convert R_386_GOT32 and R_386_GOT32X. Get the symbol
referred to by the reloc. */
/* Try to convert R_386_GOT32X. Get the symbol referred to by
the reloc. */
if (r_symndx < symtab_hdr->sh_info)
{
isym = bfd_sym_from_r_symndx (&htab->sym_cache,
@@ -2988,8 +2985,7 @@
{
/* Convert "mov foo@GOT(%reg1), %reg2" to
"lea foo@GOTOFF(%reg1), %reg2". */
if (r_type == R_386_GOT32X
&& (baseless || !bfd_link_pic (link_info)))
if (baseless || !bfd_link_pic (link_info))
{
r_type = R_386_32;
/* For R_386_32, convert
@@ -3953,20 +3949,26 @@
}
relocation = off;
if (htab->elf.splt == NULL)
relocation += gotplt->output_offset;
}
else
relocation = (base_got->output_section->vma
+ base_got->output_offset + off
- gotplt->output_section->vma
- gotplt->output_offset);
if ((*(contents + rel->r_offset - 1) & 0xc7) == 0x5)
{
if (bfd_link_pic (info))
goto disallow_got32;
relocation += (gotplt->output_section->vma
+ gotplt->output_offset);
}
else if (htab->elf.splt == NULL)
{
relocation = (base_got->output_section->vma
+ base_got->output_offset + off
- gotplt->output_section->vma
- gotplt->output_offset);
if (htab->elf.splt == NULL)
relocation += gotplt->output_offset;
relocation += gotplt->output_offset;
}
goto do_relocation;
@@ -4016,10 +4018,12 @@
if (h->got.offset != (bfd_vma) -1)
/* Use GOT entry. Mask off the least significant bit in
GOT offset which may be set by R_386_GOT32 processing
below. */
relocation = (htab->elf.sgot->output_section->vma
+ htab->elf.sgot->output_offset
+ h->got.offset - offplt);
+ (h->got.offset & ~1) - offplt);
else
relocation = (h->plt.offset / plt_entry_size - 1 + 3) * 4;
@@ -4122,10 +4126,39 @@
if (off >= (bfd_vma) -2)
abort ();
relocation = htab->elf.sgot->output_section->vma
+ htab->elf.sgot->output_offset + off
- htab->elf.sgotplt->output_section->vma
- htab->elf.sgotplt->output_offset;
relocation = (htab->elf.sgot->output_section->vma
+ htab->elf.sgot->output_offset + off);
if ((*(contents + rel->r_offset - 1) & 0xc7) == 0x5)
{
if (bfd_link_pic (info))
{
/* For PIC, disallow R_386_GOT32 without a base
register since we don't know what the GOT base
is. */
const char *name;
disallow_got32:
if (h == NULL)
name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
NULL);
else
name = h->root.root.string;
(*_bfd_error_handler)
(_("%B: direct GOT relocation %s against `%s' without base register can not be used when making a shared object"),
input_bfd, howto->name, name);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
}
else
{
/* Subtract the .got.plt section address only with a base
register. */
relocation -= (htab->elf.sgotplt->output_section->vma
+ htab->elf.sgotplt->output_offset);
}
break;
case R_386_GOTOFF:
@@ -4285,8 +4318,8 @@
else if (h != NULL
&& h->dynindx != -1
&& (r_type == R_386_PC32
|| !bfd_link_pic (info)
|| !SYMBOLIC_BIND (info, h)
|| !(bfd_link_executable (info)
|| SYMBOLIC_BIND (info, h))
|| !h->def_regular))
outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
else
@@ -5355,19 +5388,23 @@
bfd *abfd = info->output_bfd;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
struct elf_link_hash_table *htab = elf_hash_table (info);
unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
Elf_Internal_Sym sym;
if (htab->dynsym == NULL
|| !bed->s->swap_symbol_in (abfd,
(htab->dynsym->contents
+ r_symndx * sizeof (Elf32_External_Sym)),
0, &sym))
abort ();
if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
return reloc_class_ifunc;
if (htab->dynsym != NULL
&& htab->dynsym->contents != NULL)
{
/* Check relocation against STT_GNU_IFUNC symbol if there are
dynamic symbols. */
unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
Elf_Internal_Sym sym;
if (!bed->s->swap_symbol_in (abfd,
(htab->dynsym->contents
+ r_symndx * sizeof (Elf32_External_Sym)),
0, &sym))
abort ();
if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
return reloc_class_ifunc;
}
switch (ELF32_R_TYPE (rela->r_info))
{
@@ -5166,6 +5166,7 @@
tga->root.type = bfd_link_hash_indirect;
tga->root.u.i.link = &opt->root;
ppc_elf_copy_indirect_symbol (info, opt, tga);
opt->forced_local = 0;
if (opt->dynindx != -1)
{
@@ -2945,7 +2945,7 @@
static bfd_boolean
elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
{
bfd_boolean retval;
struct stat buf;
struct elf64_hppa_link_hash_table *hppa_info = hppa_link_hash_table (info);
if (hppa_info == NULL)
@@ -3029,7 +3029,8 @@
info);
retval = bfd_elf_final_link (abfd, info);
if (!bfd_elf_final_link (abfd, info))
return FALSE;
elf_link_hash_traverse (elf_hash_table (info),
elf_hppa_remark_useless_dynamic_symbols,
@@ -3037,10 +3038,17 @@
/* If we're producing a final executable, sort the contents of the
unwind section. */
if (retval && !bfd_link_relocatable (info))
retval = elf_hppa_sort_unwind (abfd);
if (bfd_link_relocatable (info))
return TRUE;
/* Do not attempt to sort non-regular files. This is here
especially for configure scripts and kernel builds which run
tests with "ld [...] -o /dev/null". */
if (stat (abfd->filename, &buf) != 0
|| !S_ISREG(buf.st_mode))
return TRUE;
return retval;
return elf_hppa_sort_unwind (abfd);
}
/* Relocate the given INSN. VALUE should be the actual value we want
@@ -2570,6 +2570,7 @@
elf_symbol_type *elfsym = (elf_symbol_type *) symbol;
if (symbol->section->owner != abfd
&& symbol->section->owner != NULL
&& abiversion (symbol->section->owner) >= 2)
{
unsigned int i;
@@ -4344,14 +4345,20 @@
htab = ppc_hash_table (info);
flags = (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY
| SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED);
htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr",
flags);
if (htab->sfpr == NULL
|| ! bfd_set_section_alignment (dynobj, htab->sfpr, 2))
return FALSE;
if (htab->params->save_restore_funcs)
{
htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr",
flags);
if (htab->sfpr == NULL
|| ! bfd_set_section_alignment (dynobj, htab->sfpr, 2))
return FALSE;
}
if (bfd_link_relocatable (info))
return TRUE;
htab->glink = bfd_make_section_anyway_with_flags (dynobj, ".glink",
@@ -4428,9 +4435,6 @@
return FALSE;
htab->elf.dynobj = params->stub_bfd;
htab->params = params;
if (bfd_link_relocatable (info))
return TRUE;
return create_linkage_sections (htab->elf.dynobj, info);
}
@@ -6665,7 +6669,7 @@
sym[len + 0] = i / 10 + '0';
sym[len + 1] = i % 10 + '0';
h = (struct ppc_link_hash_entry *)
elf_link_hash_lookup (&htab->elf, sym, FALSE, FALSE, TRUE);
elf_link_hash_lookup (&htab->elf, sym, writing, TRUE, TRUE);
if (stub_sec != NULL)
{
if (h != NULL
@@ -6706,6 +6710,7 @@
h->elf.root.u.def.value = htab->sfpr->size;
h->elf.type = STT_FUNC;
h->elf.def_regular = 1;
h->elf.non_elf = 0;
_bfd_elf_link_hash_hide_symbol (info, &h->elf, TRUE);
writing = TRUE;
if (htab->sfpr->contents == NULL)
@@ -7050,14 +7055,28 @@
struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
unsigned int i;
htab = ppc_hash_table (info);
if (htab == NULL)
return FALSE;
if (htab->sfpr != NULL)
{
unsigned int i;
htab->sfpr->size = 0;
for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++)
if (!sfpr_define (info, &save_res_funcs[i], NULL))
return FALSE;
if (htab->sfpr->size == 0)
htab->sfpr->flags |= SEC_EXCLUDE;
}
if (bfd_link_relocatable (info))
return TRUE;
if (!bfd_link_relocatable (info)
&& htab->elf.hgot != NULL)
if (htab->elf.hgot != NULL)
{
_bfd_elf_link_hash_hide_symbol (info, htab->elf.hgot, TRUE);
/* Make .TOC. defined so as to prevent it being made dynamic.
@@ -7076,22 +7095,8 @@
| STV_HIDDEN);
}
if (htab->sfpr == NULL)
return TRUE;
htab->sfpr->size = 0;
if (htab->params->save_restore_funcs)
for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++)
if (!sfpr_define (info, &save_res_funcs[i], NULL))
return FALSE;
elf_link_hash_traverse (&htab->elf, func_desc_adjust, info);
if (htab->sfpr->size == 0)
htab->sfpr->flags |= SEC_EXCLUDE;
return TRUE;
}
@@ -8224,6 +8229,7 @@
tga_fd->root.type = bfd_link_hash_indirect;
tga_fd->root.u.i.link = &opt_fd->root;
ppc64_elf_copy_indirect_symbol (info, opt_fd, tga_fd);
opt_fd->forced_local = 0;
if (opt_fd->dynindx != -1)
{
@@ -8240,6 +8246,7 @@
tga->root.type = bfd_link_hash_indirect;
tga->root.u.i.link = &opt->root;
ppc64_elf_copy_indirect_symbol (info, opt, tga);
opt->forced_local = 0;
_bfd_elf_link_hash_hide_symbol (info, opt,
tga->forced_local);
htab->tls_get_addr = (struct ppc_link_hash_entry *) opt;
@@ -12176,6 +12183,13 @@
if (!group_sections (info, stub_group_size, stubs_always_before_branch))
return FALSE;
#define STUB_SHRINK_ITER 20
/* Loop until no stubs added. After iteration 20 of this loop we may
exit on a stub section shrinking. This is to break out of a
pathological case where adding stubs on one iteration decreases
section gaps (perhaps due to alignment), which then requires
fewer or smaller stubs on the next iteration. */
while (1)
{
@@ -12558,11 +12572,11 @@
stub_sec != NULL;
stub_sec = stub_sec->next)
if ((stub_sec->flags & SEC_LINKER_CREATED) == 0
&& stub_sec->rawsize != stub_sec->size)
&& stub_sec->rawsize != stub_sec->size
&& (htab->stub_iteration <= STUB_SHRINK_ITER
|| stub_sec->rawsize < stub_sec->size))
break;
/* Exit from this loop when no stubs have been added, and no stubs
have changed size. */
if (stub_sec == NULL
&& (htab->glink_eh_frame == NULL
|| htab->glink_eh_frame->rawsize == htab->glink_eh_frame->size))
@@ -12893,9 +12907,6 @@
stub_sec->contents = bfd_zalloc (htab->params->stub_bfd, stub_sec->size);
if (stub_sec->contents == NULL)
return FALSE;
/* We want to check that built size is the same as calculated
size. rawsize is a convenient location to use. */
stub_sec->rawsize = stub_sec->size;
stub_sec->size = 0;
}
@@ -13084,7 +13095,9 @@
if ((stub_sec->flags & SEC_LINKER_CREATED) == 0)
{
stub_sec_count += 1;
if (stub_sec->rawsize != stub_sec->size)
if (stub_sec->rawsize != stub_sec->size
&& (htab->stub_iteration <= STUB_SHRINK_ITER
|| stub_sec->rawsize < stub_sec->size))
break;
}
@@ -2029,7 +2029,8 @@
&& (sec->flags & SEC_ALLOC) != 0
&& (! IS_X86_64_PCREL_TYPE (r_type)
|| (h != NULL
&& (! SYMBOLIC_BIND (info, h)
&& (! (bfd_link_pie (info)
|| SYMBOLIC_BIND (info, h))
|| h->root.type == bfd_link_hash_defweak
|| !h->def_regular))))
|| (ELIMINATE_COPY_RELOCS
@@ -2723,12 +2724,14 @@
}
else
{
eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
}
else
{
eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
@@ -3151,6 +3154,11 @@
continue;
}
if (elf_section_data (tsec) != NULL
&& (elf_section_flags (tsec) & SHF_X86_64_LARGE) != 0)
continue;
if (tsec->sec_info_type == SEC_INFO_TYPE_MERGE)
{
/* At this stage in linking, no SEC_MERGE symbol has been
@@ -3190,35 +3198,46 @@
}
else
{
asection *asect;
bfd_size_type size;
bfd_signed_vma distance;
/* At this point, we don't know the load addresses of TSEC
section nor SEC section. We estimate the distrance between
SEC and TSEC. */
size = 0;
for (asect = sec->output_section;
asect != NULL && asect != tsec->output_section;
asect = asect->next)
SEC and TSEC. We store the estimated distances in the
compressed_size field of the output section, which is only
used to decompress the compressed input section. */
if (sec->output_section->compressed_size == 0)
{
asection *i;
for (i = asect->output_section->map_head.s;
i != NULL;
i = i->map_head.s)
{
size = align_power (size, i->alignment_power);
size += i->size;
}
asection *asect;
bfd_size_type size = 0;
for (asect = link_info->output_bfd->sections;
asect != NULL;
asect = asect->next)
/* Skip debug sections since compressed_size is used to
compress debug sections. */
if ((asect->flags & SEC_DEBUGGING) == 0)
{
asection *i;
for (i = asect->map_head.s;
i != NULL;
i = i->map_head.s)
{
size = align_power (size, i->alignment_power);
size += i->size;
}
asect->compressed_size = size;
}
}
/* Don't convert GOTPCREL relocations if TSEC isn't placed
after SEC. */
if (asect == NULL)
distance = (tsec->output_section->compressed_size
- sec->output_section->compressed_size);
if (distance < 0)
continue;
/* Take PT_GNU_RELRO segment into account by adding
maxpagesize. */
if ((toff + size + maxpagesize - roff + 0x80000000)
if ((toff + distance + maxpagesize - roff + 0x80000000)
> 0xffffffff)
continue;
}
@@ -4631,8 +4650,8 @@
else if (h != NULL
&& h->dynindx != -1
&& (IS_X86_64_PCREL_TYPE (r_type)
|| ! bfd_link_pic (info)
|| ! SYMBOLIC_BIND (info, h)
|| !(bfd_link_executable (info)
|| SYMBOLIC_BIND (info, h))
|| ! h->def_regular))
{
outrel.r_info = htab->r_info (h->dynindx, r_type);
@@ -5728,19 +5747,23 @@
bfd *abfd = info->output_bfd;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
struct elf_x86_64_link_hash_table *htab = elf_x86_64_hash_table (info);
unsigned long r_symndx = htab->r_sym (rela->r_info);
Elf_Internal_Sym sym;
if (htab->elf.dynsym == NULL
|| !bed->s->swap_symbol_in (abfd,
(htab->elf.dynsym->contents
+ r_symndx * bed->s->sizeof_sym),
0, &sym))
abort ();
if (htab->elf.dynsym != NULL
&& htab->elf.dynsym->contents != NULL)
{
/* Check relocation against STT_GNU_IFUNC symbol if there are
dynamic symbols. */
unsigned long r_symndx = htab->r_sym (rela->r_info);
Elf_Internal_Sym sym;
if (!bed->s->swap_symbol_in (abfd,
(htab->elf.dynsym->contents
+ r_symndx * bed->s->sizeof_sym),
0, &sym))
abort ();
if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
return reloc_class_ifunc;
if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
return reloc_class_ifunc;
}
switch ((int) ELF32_R_TYPE (rela->r_info))
{
@@ -555,6 +555,19 @@
if (h == NULL)
return provide;
if (h->versioned == unknown)
{
char *version = strrchr (name, ELF_VER_CHR);
if (version)
{
if (version > name && version[-1] != ELF_VER_CHR)
h->versioned = versioned_hidden;
else
h->versioned = versioned;
}
}
switch (h->root.type)
{
case bfd_link_hash_defined:
@@ -1171,21 +1184,20 @@
oldfunc = (h->type != STT_NOTYPE
&& bed->is_function_type (h->type));
/* When we try to create a default indirect symbol from the dynamic
definition with the default version, we skip it if its type and
the type of existing regular definition mismatch. */
/* If creating a default indirect symbol ("foo" or "foo@") from a
dynamic versioned definition ("foo@@") skip doing so if there is
an existing regular definition with a different type. We don't
want, for example, a "time" variable in the executable overriding
a "time" function in a shared library. */
if (pold_alignment == NULL
&& newdyn
&& newdef
&& !olddyn
&& (((olddef || h->root.type == bfd_link_hash_common)
&& ELF_ST_TYPE (sym->st_info) != h->type
&& ELF_ST_TYPE (sym->st_info) != STT_NOTYPE
&& h->type != STT_NOTYPE
&& !(newfunc && oldfunc))
|| (olddef
&& ((h->type == STT_GNU_IFUNC)
!= (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)))))
&& (olddef || h->root.type == bfd_link_hash_common)
&& ELF_ST_TYPE (sym->st_info) != h->type
&& ELF_ST_TYPE (sym->st_info) != STT_NOTYPE
&& h->type != STT_NOTYPE
&& !(newfunc && oldfunc))
{
*skip = TRUE;
return TRUE;
@@ -1472,13 +1484,16 @@
represent variables; this can cause confusion in principle, but
any such confusion would seem to indicate an erroneous program or
shared library. We also permit a common symbol in a regular
object to override a weak symbol in a shared object. */
object to override a weak symbol in a shared object. A common
symbol in executable also overrides a symbol in a shared object. */
if (newdyn
&& newdef
&& (olddef
|| (h->root.type == bfd_link_hash_common
&& (newweak || newfunc))))
&& (newweak
|| newfunc
|| (!olddyn && bfd_link_executable (info))))))
{
*override = TRUE;
newdef = FALSE;
@@ -1749,6 +1764,31 @@
if (skip)
goto nondefault;
if (hi->def_regular)
{
/* If the undecorated symbol will have a version added by a
script different to H, then don't indirect to/from the
undecorated symbol. This isn't ideal because we may not yet
have seen symbol versions, if given by a script on the
command line rather than via --version-script. */
if (hi->verinfo.vertree == NULL && info->version_info != NULL)
{
bfd_boolean hide;
hi->verinfo.vertree
= bfd_find_version_for_sym (info->version_info,
hi->root.root.string, &hide);
if (hi->verinfo.vertree != NULL && hide)
{
(*bed->elf_backend_hide_symbol) (info, hi, TRUE);
goto nondefault;
}
}
if (hi->verinfo.vertree != NULL
&& strcmp (p + 1 + (p[1] == '@'), hi->verinfo.vertree->name) != 0)
goto nondefault;
}
if (! override)
{
@@ -3481,8 +3521,7 @@
void *old_ent;
struct bfd_link_hash_entry *old_undefs = NULL;
struct bfd_link_hash_entry *old_undefs_tail = NULL;
long old_dynsymcount = 0;
bfd_size_type old_dynstr_size = 0;
void *old_strtab = NULL;
size_t tabsize = 0;
asection *s;
bfd_boolean just_syms;
@@ -3923,8 +3962,9 @@
old_table = htab->root.table.table;
old_size = htab->root.table.size;
old_count = htab->root.table.count;
old_dynsymcount = htab->dynsymcount;
old_dynstr_size = _bfd_elf_strtab_size (htab->dynstr);
old_strtab = _bfd_elf_strtab_save (htab->dynstr);
if (old_strtab == NULL)
goto error_free_vers;
for (i = 0; i < htab->root.table.size; i++)
{
@@ -4562,8 +4602,10 @@
break;
}
/* Don't add DT_NEEDED for references from the dummy bfd nor
for unmatched symbol. */
if (!add_needed
&& matched
&& definition
&& ((dynsym
&& h->ref_regular_nonweak
@@ -4633,7 +4675,9 @@
memcpy (htab->root.table.table, old_tab, tabsize);
htab->root.undefs = old_undefs;
htab->root.undefs_tail = old_undefs_tail;
_bfd_elf_strtab_restore_size (htab->dynstr, old_dynstr_size);
_bfd_elf_strtab_restore (htab->dynstr, old_strtab);
free (old_strtab);
old_strtab = NULL;
for (i = 0; i < htab->root.table.size; i++)
{
struct bfd_hash_entry *p;
@@ -4646,9 +4690,6 @@
h = (struct elf_link_hash_entry *) p;
if (h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
if (h->dynindx >= old_dynsymcount
&& h->dynstr_index < old_dynstr_size)
_bfd_elf_strtab_delref (htab->dynstr, h->dynstr_index);
/* Preserve the maximum alignment and size for common
symbols even if this dynamic lib isn't on DT_NEEDED
@@ -5018,6 +5059,8 @@
error_free_vers:
if (old_tab != NULL)
free (old_tab);
if (old_strtab != NULL)
free (old_strtab);
if (nondeflt_vers != NULL)
free (nondeflt_vers);
if (extversym != NULL)
@@ -2655,7 +2655,7 @@
bfd_boolean via_plt_p;
if (st_type != STT_FUNC
&& (sym_sec != bfd_abs_section_ptr))
&& (sym_sec == input_sec))
return stub_type;
globals = elf_aarch64_hash_table (info);
@@ -4174,7 +4174,7 @@
goto error_ret_free_internal;
}
stub_entry->target_value = sym_value;
stub_entry->target_value = sym_value + irela->r_addend;
stub_entry->target_section = sym_sec;
stub_entry->stub_type = stub_type;
stub_entry->h = hash;
@@ -5280,15 +5280,28 @@
/* Check if a stub has to be inserted because the destination
is too far away. */
struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
if (! aarch64_valid_branch_p (value, place))
/* If the branch destination is directed to plt stub, "value" will be
the final destination, otherwise we should plus signed_addend, it may
contain non-zero value, for example call to local function symbol
which are turned into "sec_sym + sec_off", and sec_off is kept in
signed_addend. */
if (! aarch64_valid_branch_p (via_plt_p ? value : value + signed_addend,
place))
/* The target is out of reach, so redirect the branch to
the local stub for this function. */
stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec, h,
rel, globals);
if (stub_entry != NULL)
value = (stub_entry->stub_offset
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_sec->output_section->vma);
{
value = (stub_entry->stub_offset
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_sec->output_section->vma);
/* We have redirected the destination to stub entry address,
so ignore any addend record in the original rela entry. */
signed_addend = 0;
}
}
value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value,
signed_addend, weak_undef_p);
@@ -1,4 +1,4 @@
#define BFD_VERSION_DATE 20160125
#define BFD_VERSION_DATE 20160629
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
@@ -1,1 +1,1 @@
m4_define([BFD_VERSION], [2.26])
m4_define([BFD_VERSION], [2.26.1])
@@ -1,3 +1,48 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-06-28 Alan Modra <amodra@gmail.com>
PR 20304
* objdump.c (objdump_print_symname): Don't attempt to retrieve
version info from synthetic symbols.
2016-06-13 Alan Modra <amodra@gmail.com>
* objcopy.c (copy_main): Init newsym->othersym.
2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-01-28 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/19523
* Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to
runtest.
* Makefile.in: Regenerated.
* testsuite/binutils-all/compress.exp (test_gnu_debuglink): New
proc.
Run test_gnu_debuglink for native ELF build.
2016-03-09 Nick Clifton <nickc@redhat.com>
PR binutils/19775
* testsuite/binutils-all/ar.exp (proc empty_archive): New proc.
Run the new proc.
* testsuite/binutils-all/empty: New, empty, file.
2016-02-12 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-12 H.J. Lu <hongjiu.lu@intel.com>
* doc/binutils.texi: Fix a typo.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -238,12 +283,12 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/18656
* objcopy.c (setup_section): Call bfd_convert_section_size
to get the output section size.
(copy_section): Get the section size from the output section
and call bfd_get_full_section_contents to convert section
contents for output.
PR binutils/18656
* objcopy.c (setup_section): Call bfd_convert_section_size
to get the output section size.
(copy_section): Get the section size from the output section
and call bfd_get_full_section_contents to convert section
contents for output.
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
@@ -192,6 +192,7 @@
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \
CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \
$$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \
$(RUNTESTFLAGS); \
@@ -1290,6 +1290,7 @@
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \
CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \
$$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \
$(RUNTESTFLAGS); \
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for binutils 2.26.
# Generated by GNU Autoconf 2.64 for binutils 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='binutils'
PACKAGE_TARNAME='binutils'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='binutils 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='binutils 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1335,7 +1335,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures binutils 2.26 to adapt to many kinds of systems.
\`configure' configures binutils 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1406,7 +1406,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of binutils 2.26:";;
short | recursive ) echo "Configuration of binutils 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1527,7 +1527,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
binutils configure 2.26
binutils configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2169,7 +2169,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by binutils $as_me 2.26, which was
It was created by binutils $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3977,7 +3977,7 @@
# Define the identity of the package.
PACKAGE='binutils'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -15142,7 +15142,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by binutils $as_me 2.26, which was
This file was extended by binutils $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15206,7 +15206,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
binutils config.status 2.26
binutils config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -4096,6 +4096,7 @@
}
t = strchr (t + 1, ',');
newsym->othersym = NULL;
if (t)
newsym->flags = parse_symflags (t+1, &newsym->othersym);
else
@@ -809,7 +809,8 @@
name = alloc;
}
version_string = bfd_get_symbol_version_string (abfd, sym, &hidden);
if ((sym->flags & BSF_SYNTHETIC) == 0)
version_string = bfd_get_symbol_version_string (abfd, sym, &hidden);
if (bfd_is_und_section (bfd_get_section (sym)))
hidden = TRUE;
@@ -339,11 +339,11 @@
2009-10-16 Doug Kwan <dougkwan@google.com>
* elfcpp/elfcpp.h (DT_PREINIT_ARRAY): Correct enum value.
* elfcpp.h (DT_PREINIT_ARRAY): Correct enum value.
2009-10-09 Andrew Pinski <andrew_pinski@playstation.sony.com>
* elfcpp/elfcpp_file.h (Elf_file::section_name): Change shstr_size
* elfcpp_file.h (Elf_file::section_name): Change shstr_size
to Elf_WXword.
2009-10-09 Mikolaj Zalewski <mikolajz@google.com>
@@ -1,3 +1,191 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-06-29 Maciej W. Rozycki <macro@imgtec.com>
Backport from master
2016-04-22 Maciej W. Rozycki <macro@imgtec.com>
* config/tc-mips.c (code_option_type): New enum.
(parse_code_option): Return status indicating option type.
(s_mipsset): Update `parse_code_option' call site accordingly.
Always set register sizes from the ISA with ISA overrides.
(s_module): Update `parse_code_option' call site.
* testsuite/gas/mips/isa-override-1.d: New test.
* testsuite/gas/mips/micromips@isa-override-1.d: New test.
* testsuite/gas/mips/mips1@isa-override-1.d: New test.
* testsuite/gas/mips/mips2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
* testsuite/gas/mips/r3000@isa-override-1.d: New test.
* testsuite/gas/mips/r3900@isa-override-1.d: New test.
* testsuite/gas/mips/r5900@isa-override-1.d: New test.
* testsuite/gas/mips/octeon@isa-override-1.d: New test.
* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
* testsuite/gas/mips/isa-override-2.l: New list test.
* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
output.
* testsuite/gas/mips/isa-override-1.s: New test source.
* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
* testsuite/gas/mips/isa-override-2.s: New test source.
* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-29 Maciej W. Rozycki <macro@imgtec.com>
Backport from master
2016-06-29 Maciej W. Rozycki <macro@imgtec.com>
* write.c: Remove "libbfd.h" inclusion.
2016-06-23 Peter Bergner <bergner@vnet.ibm.com>
Apply from master.
2016-06-22 Peter Bergner <bergner@vnet.ibm.com>
* testsuite/gas/ppc/power9.d <brd, brh, brw, mffs, mffs., mffsce,
mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor,
setbool, xor3>: New tests.
* testsuite/gas/ppc/power9.s: Likewise.
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
Backport from master
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
PR binutils/20196
* gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
stbcx., sthcx., stwcx., stdcx.>: Add tests.
* gas/testsuite/gas/ppc/e6500.d: Likewise.
* gas/testsuite/gas/ppc/power8.s: Likewise.
* gas/testsuite/gas/ppc/power8.d: Likewise.
* gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
stdcx.>: Add tests.
* gas/testsuite/gas/ppc/power4.d: Likewise.
2016-06-01 Peter Bergner <bergner@vnet.ibm.com>
Backport from master
2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
* testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
* testsuite/gas/ppc/altivec3.s: Likewise.
* testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
* testsuite/gas/ppc/power9.s: Likewise.
2016-05-11 Nick Clifton <nickc@redhat.com>
PR gas/20047
* config/tc-arc.c (md_parse_option): Return 1 for recognised dummy
options.
2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19909
* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
only if i.disp_encoding != disp_encoding_32bit.
* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
* gas/testsuite/gas/i386/disp32.d: Updated.
* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (register_number): Check RegVRex.
* testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
with %zmm19 and %zmm3.
* testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
* testsuite/gas/i386/x86-64-avx512f.d: Likewise.
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19520
* NEWS: Mention new command line option -mrelax-relocations and
new configure option --enable-x86-relax-relocations for x86
target.
* config.in: Regenerated.
* configure.ac: Add --enable-x86-relax-relocations.
(ac_default_x86_relax_relocations): New. Default to 1 except
for x86 Solaris targets older than Solaris 12.
(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
* configure: Likewise.
* config/tc-i386.c (generate_relax_relocations): New.
(OPTION_MRELAX_RELOCATIONS): Likewise.
(output_disp): Don't generate relax relocations if
generate_relax_relocations is 0.
(md_longopts): Add -mrelax-relocations.
(md_show_usage): Likewise.
(md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
* doc/c-i386.texi: Document -mrelax-relocations=.
* testsuite/gas/i386/got-no-relax.d: New file.
* testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
* testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
* testsuite/gas/i386/localpic.d: Likewise.
* testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
* testsuite/gas/i386/reloc32.d: Likewise.
* testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
* testsuite/gas/i386/x86-64-localpic.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
* testsuite/gas/i386/i386.exp: Run got-no-relax and
x86-64-gotpcrel-no-relax.
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Remove duplicated marker for 2.26.
2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19532
* configure.ac (compressed_debug_sections): Replace == with =.
* configure: Regenerated.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -8,12 +196,8 @@
2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* gas/config/tc-arm.c (aeabi_set_public_attributes): Adjust
* config/tc-arm.c (aeabi_set_public_attributes): Adjust
TAG_ARCH_profile for armv8-a.
* gas/testsuite/gas/arm/armv8a-automatic-hlt.d: New test.
* gas/testsuite/gas/arm/armv8a-automatic-hlt.s: New test.
* gas/testsuite/gas/arm/armv8a-automatic-lda.d: New test.
* gas/testsuite/gas/arm/armv8a-automatic-lda.s: New test.
2015-12-15 Nick Clifton <nickc@redhat.com>
@@ -320,10 +504,10 @@
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
* config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
2015-10-02 Renlin Li <renlin.li@arm.com>
@@ -572,9 +756,9 @@
2015-08-17 Alan Modra <amodra@gmail.com>
* gas/config/tc-arm.c (s_align): Delete.
* config/tc-arm.c (s_align): Delete.
(md_pseudo_table): Use s_align_ptwo for "align".
* gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
* config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
* read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-13 Alan Modra <amodra@gmail.com>
@@ -952,7 +1136,7 @@
2015-06-11 John David Anglin <danglin@gcc.gnu.org>
PR gas/18427
* gas/config/tc-hppa.c (last_label_symbol): Declare.
* config/tc-hppa.c (last_label_symbol): Declare.
(pa_get_label): Return last label in current space/segment or NULL.
(pa_define_label): Record last label and add to root.
(pa_undefine_label): Remove last label from root.
@@ -1028,7 +1212,6 @@
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
gas/
* config/tc-alpha.c (all_cfi_sections): Declare.
(s_alpha_ent): Initialize all_cfi_sections.
(alpha_elf_md_end): Invoke cfi_set_sections.
@@ -1796,7 +1979,7 @@
2015-01-12 Jan Beulich <jbeulich@suse.com>
* gas/dw2gencfi.c (cfi_add_label, dot_cfi_label): New.
* dw2gencfi.c (cfi_add_label, dot_cfi_label): New.
(cfi_pseudo_table): Add "cfi_label".
(output_cfi_insn): Handle CFI_label.
(select_cie_for_fde): Als terminate CIE when encountering
@@ -1809,7 +1992,7 @@
2015-01-12 Jan Beulich <jbeulich@suse.com>
* gas/config/tc-arm.c (do_neon_shl_imm): Check immediate range.
* config/tc-arm.c (do_neon_shl_imm): Check immediate range.
(do_neon_qshl_imm): Likewise.
2015-01-12 Alan Modra <amodra@gmail.com>
@@ -1,5 +1,12 @@
-*- text -*-
* Add a configure option --enable-x86-relax-relocations to decide whether
x86 assembler should generate relax relocations by default. Default to
yes, except for x86 Solaris targets older than Solaris 12.
* New command line option -mrelax-relocations= for x86 target to control
whether to generate relax relocations.
Changes in 2.26:
* Add a configure option --enable-compressed-debug-sections={all,gas} to
@@ -7,8 +14,6 @@
* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
assembler support for Argonaut RISC architectures.
Changes in 2.26:
* Symbol and label names can now be enclosed in double quotes (") which allows
them to contain characters that are not part of valid symbol names in high
@@ -39,6 +39,9 @@
/* Define if you want compressed debug sections by default. */
#undef DEFAULT_FLAG_COMPRESS_DEBUG
/* Define to 1 if you want to generate x86 relax relocations by default. */
#undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS
/* Supported emulations. */
#undef EMULATIONS
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for gas 2.26.
# Generated by GNU Autoconf 2.64 for gas 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='gas'
PACKAGE_TARNAME='gas'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='gas 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='gas 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -765,6 +765,7 @@
enable_targets
enable_checking
enable_compressed_debug_sections
enable_x86_relax_relocations
enable_werror
enable_build_warnings
enable_nls
@@ -1323,7 +1324,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures gas 2.26 to adapt to many kinds of systems.
\`configure' configures gas 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1394,7 +1395,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of gas 2.26:";;
short | recursive ) echo "Configuration of gas 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1415,6 +1416,8 @@
--enable-checking enable run-time checks
--enable-compressed-debug-sections={all,gas,none}
compress debug sections by default]
--enable-x86-relax-relocations
generate x86 relax relocations by default
--enable-werror treat compile warnings as errors
--enable-build-warnings enable build-time compiler warnings
--disable-nls do not use Native Language Support
@@ -1510,7 +1513,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
gas configure 2.26
gas configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1920,7 +1923,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by gas $as_me 2.26, which was
It was created by gas $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3728,7 +3731,7 @@
# Define the identity of the package.
PACKAGE='gas'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -10972,7 +10975,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 10975 "configure"
#line 10978 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -11078,7 +11081,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11081 "configure"
#line 11084 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -11680,6 +11683,17 @@
esac
fi
# PR gas/19520
# Decide if x86 assembler should generate relax relocations.
ac_default_x86_relax_relocations=unset
# Provide a configure time option to override our default.
# Check whether --enable-x86_relax_relocations was given.
if test "${enable_x86_relax_relocations+set}" = set; then :
enableval=$enable_x86_relax_relocations; case "${enableval}" in
no) ac_default_x86_relax_relocations=0 ;;
esac
fi
using_cgen=no
@@ -12082,7 +12096,18 @@
| i386-go32-rtems*)
$as_echo "#define STRICTCOFF 1" >>confdefs.h
;;
i386-*-solaris2 \
| x86_64-*-solaris2 \
| i386-*-solaris2.[0-9] \
| i386-*-solaris2.1[01] \
| x86_64-*-solaris2.1[01])
if test ${this_target} = $target \
&& test ${ac_default_x86_relax_relocations} = unset; then
ac_default_x86_relax_relocations=0
fi
;;
i860-*-*)
@@ -12504,8 +12529,17 @@
emulations="$emulations $emulation"
done
if test ${ac_default_x86_relax_relocations} = unset; then
ac_default_x86_relax_relocations=1
fi
cat >>confdefs.h <<_ACEOF
#define DEFAULT_GENERATE_X86_RELAX_RELOCATIONS $ac_default_x86_relax_relocations
_ACEOF
if test x$ac_default_compressed_debug_sections == xyes ; then
if test x$ac_default_compressed_debug_sections = xyes ; then
$as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h
@@ -15029,7 +15063,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by gas $as_me 2.26, which was
This file was extended by gas $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15093,7 +15127,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
gas config.status 2.26
gas config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -77,6 +77,17 @@
*) ac_default_compressed_debug_sections=unset ;;
esac])dnl
# PR gas/19520
# Decide if x86 assembler should generate relax relocations.
ac_default_x86_relax_relocations=unset
# Provide a configure time option to override our default.
AC_ARG_ENABLE(x86_relax_relocations,
AS_HELP_STRING([--enable-x86-relax-relocations],
[generate x86 relax relocations by default]),
[case "${enableval}" in
no) ac_default_x86_relax_relocations=0 ;;
esac])dnl
using_cgen=no
AM_BINUTILS_WARNINGS
@@ -166,6 +177,17 @@
| i386-*-go32* \
| i386-go32-rtems*)
AC_DEFINE(STRICTCOFF, 1, [Using strict COFF?])
;;
i386-*-solaris2 \
| x86_64-*-solaris2 \
| i386-*-solaris2.[[0-9]] \
| i386-*-solaris2.1[[01]] \
| x86_64-*-solaris2.1[[01]])
if test ${this_target} = $target \
&& test ${ac_default_x86_relax_relocations} = unset; then
ac_default_x86_relax_relocations=0
fi
;;
i860-*-*)
@@ -549,7 +571,14 @@
done
if test x$ac_default_compressed_debug_sections == xyes ; then
if test ${ac_default_x86_relax_relocations} = unset; then
ac_default_x86_relax_relocations=1
fi
AC_DEFINE_UNQUOTED(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS,
$ac_default_x86_relax_relocations,
[Define to 1 if you want to generate x86 relax relocations by default.])
if test x$ac_default_compressed_debug_sections = xyes ; then
AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.])
fi
@@ -25,7 +25,6 @@
#include "obstack.h"
#include "output-file.h"
#include "dwarf2dbg.h"
#include "libbfd.h"
#include "compress-debug.h"
#ifndef TC_FORCE_RELOCATION
@@ -1,3 +1,11 @@
2016-02-05 Sriraman Tallam <tmsriram@google.com>
PR gold/19047
* icf.cc (get_rel_addend): New function.
(get_section_contents): Move merge section addend computation to a
new function. Ignore negative values for SHT_REL and SHT_RELA addends.
Fix bug to not read past the length of the section.
2015-12-16 Roland McGrath <mcgrathr@google.com>
PR ld/17473
@@ -33,7 +41,7 @@
2015-11-11 Alan Modra <amodra@gmail.com>
Peter Bergner <bergner@vnet.ibm.com>
* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
* powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
(Powerpc_relocate_functions::addr16dx_ha): Likewise.
(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
(Target_powerpc::Scan::global): Likewise.
@@ -339,7 +347,7 @@
2015-07-26 Doug Kwan <dougkwan@google.com>
* testsuite/arm_unaligned_reloc.{s,sh}: Make test less sensitive to
disassembler output format.
disassembler output format.
2015-07-23 Ian Coolidge <icoolidge@google.com>
Plumb --pic-veneer option for gold.
@@ -566,7 +574,7 @@
2015-06-29 Doug Kwan <dougkwan@google.com>
* testsuite/arm_bl_out_of_range.s: Align stub table so that it appears
at address expected by test.
at address expected by test.
* testsuite/arm_cortex_a8_b.s: Ditto.
* testsuite/arm_cortex_a8_b_cond.s: Ditto.
* testsuite/arm_cortex_a8_bl.s: Ditto.
@@ -940,7 +948,6 @@
2015-04-07 HC Yen <hc.yen@mediatek.com>
Add AArch32 support for gold linker.
gold/
* arm.cc: Add V8 arch combine table.
2015-04-06 Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
@@ -1455,7 +1462,6 @@
(Output_data_plt_arm::entry_count): Modified.
(Output_data_plt_arm::address_for_global): New method.
(Output_data_plt_arm::address_for_local): New method.
gold/
(Output_data_plt_arm::set_final_data_size): Add irelative_count_.
(Output_data_plt_arm::insert_irelative_data): New method.
(Output_data_plt_arm::irelative_rel_): New member.
@@ -2490,7 +2496,7 @@
Add .gdb_index version 7 support.
* gold/dwarf_reader.cc: include <utility> (for make_pair).
* dwarf_reader.cc: include <utility> (for make_pair).
(Dwarf_abbrev_table::do_read_abbrevs): Check for compressed
debug sections.
(Dwarf_ranges_table::read_ranges_table): Likewise.
@@ -2501,21 +2507,21 @@
for end of list by offset, not by offset == 0.
(Dwarf_info_reader::do_read_string_table): Check for compressed
debug sections.
* gold/dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table):
* dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table):
Initialize new data members.
(Dwarf_pubnames_table::next_name): return flag_byte.
(Dwarf_pubnames_table::end_of_table_): New data member.
(Dwarf_pubnames_table::is_gnu_style_): New data member.
* gold/gdb-index.cc (gdb_index_version): Update to version 7.
* gdb-index.cc (gdb_index_version): Update to version 7.
(Gdb_index_info_reader::read_pubtable): Read flag_byte.
(Gdb_index_info_reader::read_pubnames_and_pubtypes): Don't
read skeleton type unit DIEs.
(Gdb_index::add_symbol): Add flag_byte; adjust all callers.
(Gdb_index::do_write): Write flag_byte.
* gold/gdb-index.h (Gdb_index::add_symbol): Add flags parameter.
* gdb-index.h (Gdb_index::add_symbol): Add flags parameter.
(Gdb_index::Cu_vector): Store flags along with cu indexes.
* gold/testsuite/gdb_index_test_3.sh: Allow versions 4-7.
* gold/testsuite/gdb_index_test_comm.sh: Likewise.
* testsuite/gdb_index_test_3.sh: Allow versions 4-7.
* testsuite/gdb_index_test_comm.sh: Likewise.
2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
@@ -5554,15 +5560,15 @@
2012-01-03 Cary Coutant <ccoutant@google.com>
* gold/incremental.cc (Sized_incremental_binary::do_process_got_plt):
* incremental.cc (Sized_incremental_binary::do_process_got_plt):
Use abstract base class for GOT.
* gold/output.h (class Output_data_got_base): New abstract base class.
* output.h (class Output_data_got_base): New abstract base class.
(class Output_data_got): Derive from new base class, adjust ctors.
(Output_data_got::reserve_slot): Make virtual; rename to
do_reserve_slot; Adjust callers.
* gold/target.h (Sized_target::init_got_plt_for_update): Return
* target.h (Sized_target::init_got_plt_for_update): Return
pointer to abstract base class.
* gold/x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise.
* x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise.
2011-12-18 Ian Lance Taylor <iant@google.com>
@@ -6073,10 +6079,10 @@
2011-08-01 Cary Coutant <ccoutant@google.com>
* gold/testsuite/Makefile.am (justsyms_exec): New testcase.
* gold/testsuite/Makefile.in: Regenerate.
* gold/testsuite/justsyms_exec.c: New source file.
* gold/testsuite/justsyms_lib.c: New source file.
* testsuite/Makefile.am (justsyms_exec): New testcase.
* testsuite/Makefile.in: Regenerate.
* testsuite/justsyms_exec.c: New source file.
* testsuite/justsyms_lib.c: New source file.
2011-08-01 Cary Coutant <ccoutant@google.com>
@@ -6402,7 +6408,7 @@
2011-07-06 Cary Coutant <ccoutant@google.com>
* gold/incremental.cc
* incremental.cc
(Output_section_incremental_inputs::write_info_blocks): Check for
hidden and internal symbols.
@@ -6943,9 +6949,9 @@
2011-06-09 Cary Coutant <ccoutant@google.com>
PR gold/12804
* gold/gold.cc (queue_initial_tasks): Warn if --incremental is
* gold.cc (queue_initial_tasks): Warn if --incremental is
used with --compress-debug-sections.
* gold/object.cc (Sized_relobj_file::do_layout): Report
* object.cc (Sized_relobj_file::do_layout): Report
uncompressed size of compressed input sections.
2011-06-08 Cary Coutant <ccoutant@google.com>
@@ -7073,10 +7079,10 @@
2011-06-02 Cary Coutant <ccoutant@google.com>
PR gold/12163
* gold/archive.cc (Archive::Archive): Initialize new data member.
* archive.cc (Archive::Archive): Initialize new data member.
(Archive::include_all_members): Return if archive has already been
included.
* gold/archive.h (Archive::include_all_members_): New data member.
* archive.h (Archive::include_all_members_): New data member.
2011-06-02 Nick Clifton <nickc@redhat.com>
@@ -7593,9 +7599,9 @@
2011-04-14 Cary Coutant <ccoutant@google.com>
* gold/layout.cc (Layout::symtab_section_offset): New function.
* gold/layout.h (Layout::symtab_section_offset): New function.
* gold/reloc.cc (Sized_relobj::do_relocate): Call it.
* layout.cc (Layout::symtab_section_offset): New function.
* layout.h (Layout::symtab_section_offset): New function.
* reloc.cc (Sized_relobj::do_relocate): Call it.
2011-04-12 Ian Lance Taylor <iant@google.com>
@@ -8706,7 +8712,7 @@
2010-10-17 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (Target_arm::got_section): Use correct order and set
* arm.cc (Target_arm::got_section): Use correct order and set
GOT output section to be writable.
2010-10-14 Cary Coutant <ccoutant@google.com>
@@ -8858,7 +8864,7 @@
2010-09-30 Doug Kwan <dougkwan@google.com>
* gold/testsuite/arm_branch_out_of_range.sh: Fix broken tests.
* testsuite/arm_branch_out_of_range.sh: Fix broken tests.
2010-09-28 Sriraman Tallam <tmsriram@google.com>
@@ -8902,13 +8908,13 @@
2010-09-15 Doug Kwan <dougkwan@google.com>
* gold/testsuite/script_test_3.t: Add ARM special sections.
* gold/testsuite/script_test_4.t: Same.
* gold/testsuite/script_test_5.t: Same.
* gold/testsuite/script_test_6.t: Same.
* gold/testsuite/script_test_7.t: Same.
* gold/testsuite/script_test_7.t: Same.
* gold/testsuite/thumb_blx_out_of_range.s: Fix instruction alignment.
* testsuite/script_test_3.t: Add ARM special sections.
* testsuite/script_test_4.t: Same.
* testsuite/script_test_5.t: Same.
* testsuite/script_test_6.t: Same.
* testsuite/script_test_7.t: Same.
* testsuite/script_test_7.t: Same.
* testsuite/thumb_blx_out_of_range.s: Fix instruction alignment.
2010-09-14 Cary Coutant <ccoutant@google.com>
@@ -9041,7 +9047,7 @@
2010-08-27 Doug Kwan <dougkwan@google.com>
* gold/resolve.cc (Symbol_table::should_override): Let a weak
* resolve.cc (Symbol_table::should_override): Let a weak
reference override an existing dynamic weak reference.
* testsuite/Makefile.am: Add new test dyn_weak_ref.
* testsuite/Makefile.in: Regenerate.
@@ -9133,11 +9139,11 @@
2010-08-19 Neil Vachharajani <nvachhar@google.com>
Cary Coutant <ccoutant@google.com>
* gold/archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust
* archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust
constructor, and set_blocker.
* gold/archive.cc (Add_lib_group_symbols::is_runnable): Also check
* archive.cc (Add_lib_group_symbols::is_runnable): Also check
readsyms_blocker_.
* gold/readsyms.cc (Read_symbols::do_lib_group): Also pass
* readsyms.cc (Read_symbols::do_lib_group): Also pass
this->this_blocker_ to Add_lib_group_symbols::set_blocker.
* testsuite/Makefile.am (start_lib_test): New test case.
* testsuite/Makefile.in: Regenerate.
@@ -9740,9 +9746,9 @@
2010-07-27 Jeffrey Yasskin <jyasskin@google.com>
* testsuite/debug_msg.sh: Test mixed weak/strong symbol behavior.
* gold/testsuite/debug_msg.cc: Likewise.
* gold/testsuite/odr_violation1.cc
* gold/testsuite/odr_violation2.cc
* testsuite/debug_msg.cc: Likewise.
* testsuite/odr_violation1.cc
* testsuite/odr_violation2.cc
2010-07-21 Cary Coutant <ccoutant@google.com>
@@ -10087,13 +10093,13 @@
2010-05-26 Rafael Espindola <espindola@google.com>
PR 11604
* gold/object.cc(Sized_relobj::do_layout_deferred_sections): Avoid
* object.cc(Sized_relobj::do_layout_deferred_sections): Avoid
adding sections the garbage collector removed.
* gold/testsuite/Makefile.am: Add test.
* gold/testsuite/Makefile.in: Regenerate.
* gold/testsuite/plugin_test_7.sh: New.
* gold/testsuite/plugin_test_7_1.c: New.
* gold/testsuite/plugin_test_7_2.c: New.
* testsuite/Makefile.am: Add test.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test_7.sh: New.
* testsuite/plugin_test_7_1.c: New.
* testsuite/plugin_test_7_2.c: New.
2010-05-26 Rafael Espindola <espindola@google.com>
@@ -10577,7 +10583,7 @@
2010-03-25 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code
* arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code
to avoid a conversion warning on a 32-bit host.
2010-03-24 Ian Lance Taylor <iant@google.com>
@@ -10781,7 +10787,7 @@
2010-03-08 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage
* arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage
due to a conversion warning.
(Arm_relobj::update_output_local_symbol_count): Check for local
symbol with unset output index.
@@ -11403,7 +11409,7 @@
2010-01-29 Viktor Kutuzov <vkutuzov@accesssoftek.com>
* gold/arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8,
* arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8,
R_ARM_THM_PC12, R_ARM_THM_ALU_PREL_11_0.
(Arm_relocate_functions::thm_alu11): New Method.
(Arm_relocate_functions::thm_pc8): New Method.
@@ -11553,12 +11559,12 @@
2010-01-22 Viktor Kutuzov <vkutuzov@accesssoftek.com>
* gold/arm.cc (Target_arm): Updated fix_v4bx method and usage of
* arm.cc (Target_arm): Updated fix_v4bx method and usage of
Fix_v4bx enum values .
* gold/options.h (General_options): New option definitions.
* options.h (General_options): New option definitions.
(General_options::fix_v4bx): New method.
(General_options::Fix_v4bx): New enum.
* gold/options.cc (General_options::parse_fix_v4bx): New method.
* options.cc (General_options::parse_fix_v4bx): New method.
(General_options::parse_fix_v4bx_interworking): New method.
2010-01-22 Doug Kwan <dougkwan@google.com>
@@ -11618,7 +11624,7 @@
2010-01-20 Viktor Kutuzov <vkutuzov@accesssoftek.com>
* gold/arm.cc: Added support for R_ARM_V4BX relocation
* arm.cc: Added support for R_ARM_V4BX relocation
(class Arm_v4bx_stub): New class.
(DEF_STUBS): Updated definition to support v4_veneer_bx.
(Stub_factory::make_arm_v4bx_stub): New method.
@@ -12675,7 +12681,7 @@
attributes_section and attributes_vendor.
* i386.cc (Target_i386::i386_info): Same.
* object.cc (Sized_relobj::do_layout): Skip attribute section.
* gold/powerpc.cc (Target_powerpc::powerpc_info): Initialize new
* powerpc.cc (Target_powerpc::powerpc_info): Initialize new
fields attributes_section and attributes_vendor.
* sparc.cc (Target_sparc::sparc_info): Same.
* target.h (Target::attributes_section, Target::attributes_vendor,
@@ -13322,7 +13328,7 @@
(Segment_start_expression::value): New method definition.
(script_exp_function_segment_start): Return a new
Segment_start_expression.
* gold/script-c.h (script_saw_segment_start_expression): New function
* script-c.h (script_saw_segment_start_expression): New function
prototype.
* script-sections.cc (Script_sections::Script_sections): Initialize
SAW_SEGMENT_START_EXPRESSION_ to false.
@@ -14113,9 +14119,9 @@
(Script_sections::attach_sections_using_phdrs_clause): Do not modify
segment list.
(Script_sections::release_segments): New method definition.
* gold/script-sections.h (Script_sections::release_segments): New
* script-sections.h (Script_sections::release_segments): New
method declaration.
* gold/target.h (Target::may_relax, Target::relax,
* target.h (Target::may_relax, Target::relax,
Target::do_may_relax, Target::do_relax): New method definitions.
2009-09-17 Viktor Kutuzov <vkutuzov@accesssoftek.com>
@@ -14689,7 +14695,7 @@
2009-06-03 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (namespace utils): New.
* arm.cc (namespace utils): New.
(Target_arm::reloc_is_non_pic): Define new method.
(class Arm_relocate_functions): New.
(Target_arm::Relocate::relocate): Handle relocation types used by
@@ -14701,7 +14707,7 @@
2009-06-02 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (Target_arm::Scan::Scan): Initialize
* arm.cc (Target_arm::Scan::Scan): Initialize
issued_non_pic_error_.
(class Target_arm::Scan): Declare new method check_non_pic.
Define new method symbol_needs_plt_entry.
@@ -14722,7 +14728,7 @@
2009-05-29 Doug Kwan <dougkwan@google.com>
* gold/arm.cc (Output_data_plt_arm): Forward declaration for new
* arm.cc (Output_data_plt_arm): Forward declaration for new
template class.
(class Target_arm): Update comment.
(Target_arm::Target_arm): Initialize new data members GOT_,
@@ -213,6 +213,45 @@
}
}
inline void
get_rel_addend(const unsigned char* reloc_addend_ptr,
const unsigned int addend_size,
uint64_t* reloc_addend_value)
{
switch (addend_size)
{
case 0:
break;
case 1:
*reloc_addend_value =
read_from_pointer<8>(reloc_addend_ptr);
break;
case 2:
*reloc_addend_value =
read_from_pointer<16>(reloc_addend_ptr);
break;
case 4:
*reloc_addend_value =
read_from_pointer<32>(reloc_addend_ptr);
break;
case 8:
*reloc_addend_value =
read_from_pointer<64>(reloc_addend_ptr);
break;
default:
gold_unreachable();
}
}
@@ -397,58 +436,36 @@
uint64_t entsize =
(it_v->first)->section_entsize(it_v->second);
long long offset = it_a->first;
unsigned long long addend = it_a->second;
if (addend < 0xffffff00)
offset = offset + addend;
uint64_t reloc_addend_value = 0;
uint64_t reloc_addend_value = it_a->second;
const unsigned char* reloc_addend_ptr =
contents + static_cast<unsigned long long>(*it_o);
switch(*it_addend_size)
{
case 0:
{
break;
}
case 1:
{
reloc_addend_value =
read_from_pointer<8>(reloc_addend_ptr);
break;
}
case 2:
{
reloc_addend_value =
read_from_pointer<16>(reloc_addend_ptr);
break;
}
case 4:
{
reloc_addend_value =
read_from_pointer<32>(reloc_addend_ptr);
break;
}
case 8:
{
reloc_addend_value =
read_from_pointer<64>(reloc_addend_ptr);
break;
}
default:
gold_unreachable();
}
offset = offset + reloc_addend_value;
get_rel_addend(reloc_addend_ptr, *it_addend_size,
&reloc_addend_value);
if (reloc_addend_value < 0xffffff00)
offset = offset + reloc_addend_value;
section_size_type secn_len;
const unsigned char* str_contents =
(it_v->first)->section_contents(it_v->second,
&secn_len,
false) + offset;
gold_assert (offset < (long long) secn_len);
if ((secn_flags & elfcpp::SHF_STRINGS) != 0)
{
@@ -489,10 +506,14 @@
}
else
{
buffer.append(reinterpret_cast<const
uint64_t bufsize = entsize;
if ((offset + entsize) > secn_len)
bufsize = secn_len - offset;
buffer.append(reinterpret_cast<const
char*>(str_contents),
entsize);
bufsize);
}
buffer.append("@");
}
@@ -1,3 +1,11 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for gprof 2.26.
# Generated by GNU Autoconf 2.64 for gprof 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='gprof'
PACKAGE_TARNAME='gprof'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='gprof 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='gprof 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1299,7 +1299,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures gprof 2.26 to adapt to many kinds of systems.
\`configure' configures gprof 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1370,7 +1370,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of gprof 2.26:";;
short | recursive ) echo "Configuration of gprof 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1476,7 +1476,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
gprof configure 2.26
gprof configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1841,7 +1841,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by gprof $as_me 2.26, which was
It was created by gprof $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3649,7 +3649,7 @@
# Define the identity of the package.
PACKAGE='gprof'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -12706,7 +12706,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by gprof $as_me 2.26, which was
This file was extended by gprof $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -12770,7 +12770,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
gprof config.status 2.26
gprof config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -30,10 +30,6 @@
* dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New
attributes.
2015-09-26 James Bowman <james.bowman@ftdichip.com>
* opcode/ft32.h: Add instruction macros FT32_*()
2015-09-20 Rich Felker <dalias@libc.org>
* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
@@ -55,7 +51,7 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
* include/bfdlink.h (output_type): New enum.
* bfdlink.h (output_type): New enum.
(bfd_link_executable): New macro.
(bfd_link_dll): Likewise.
(bfd_link_relocatable): Likewise.
@@ -70,10 +66,6 @@
2015-08-11 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* ansidecl.h (GCC_FINAL): New macro.
2015-07-16 Jiong Wang <jiong.wang@arm.com>
* elf/aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration.
2015-07-14 H.J. Lu <hongjiu.lu@intel.com>
@@ -96,36 +88,19 @@
PR target/65261
* ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro.
2015-07-09 Catherine Moore <clm@codesourcery.com>
* elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf/avr.h: Add new 32 bit PC relative relocation.
2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com>
* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.
2015-06-22 Nick Clifton <nickc@redhat.com>
* dis-asm.h (struct disassemble_info): Add stop_vma field.
2015-05-28 Catherine Moore <clm@codesourcery.com>
include/
* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type.
2015-05-22 Yunlian Jiang <yunlian@google.com>
* libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is
not defined.
2015-05-12 Jiong Wang <jiong.wang@arm.com>
* elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
@@ -160,11 +135,6 @@
PR ld/pr17709
* bfdlink.h (bfd_link_info): Add extern_protected_data.
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
PR ld/16572
* elf/arm.h (EF_ARM_HASENTRY): Remove.
2015-02-19 Pedro Alves <palves@redhat.com>
* floatformat.h [__cplusplus]: Wrap in extern "C".
@@ -247,31 +217,14 @@
PR debug/63239
* dwarf2.def (DW_AT_GNU_deleted): New attribute.
2014-11-21 Terry Guo <terry.guo@arm.com>
* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
(FPU_VFP_V5D16): Likewise.
(FPU_VFP_V5_SP_D16): Likewise.
(FPU_ARCH_VFP_V5D16): Likewise.
(FPU_ARCH_VFP_V5_SP_D16): Likewise.
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* bfdlink.h (struct bfd_link_info): Add bndplt.
2014-10-30 Andrew Pinski <apinski@cavium.com>
* elf/mips.h (AFL_EXT_OCTEON3): Define.
INSN_OCTEON3, CPU_OCTEON3): Define.
2014-10-28 Yury Gribov <y.gribov@samsung.com>
* libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes.
2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com>
* elf/mips.h (AFL_ASE_MASK): Define.
2014-10-15 David Malcolm <dmalcolm@redhat.com>
* libiberty.h (choose_tmpdir): New prototype.
@@ -302,28 +255,6 @@
2014-08-12 Alan Modra <amodra@gmail.com>
* bfdlink.h (struct bfd_link_info): Add lto_plugin_active.
2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
* elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
(Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
(Val_GNU_MIPS_ABI_FP_64): Redefine.
(Val_GNU_MIPS_ABI_FP_XX): Define.
(Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
(AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
(AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
(AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
(AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
(AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
(AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
(AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
(AFL_EXT_LOONGSON_2F): Likewise.
(bfd_mips_elf_swap_abiflags_v0_in): Prototype.
(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
(bfd_mips_isa_ext): Likewise.
2014-06-13 Alan Modra <amodra@gmail.com>
@@ -340,19 +271,11 @@
2014-05-01 Steve Ellcey <sellcey@mips.com>
* include/longlong.h: Import latest version from GCC tree.
* longlong.h: Import latest version from GCC tree.
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
* opcode/mips.h (ASE_XPA): New define.
2014-04-22 Christian Svensson <blue@cmd.nu>
* dis-asm.h: Remove openrisc and or32 support. Add support for or1k.
2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* elf/avr.h: Add new DIFF relocs.
2014-03-05 Alan Modra <amodra@gmail.com>
@@ -386,11 +309,6 @@
* longlong.h: New file.
2013-11-11 Catherine Moore <clm@codesourcery.com>
* opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
(INSN_LOAD_MEMORY): ...this.
2013-10-29 Marc Glisse <marc.glisse@inria.fr>
PR tree-optimization/58689
@@ -400,10 +318,6 @@
(concat, reconcat, concat_copy2, choose_temp_base, xstrerror,
xmalloc, xrealloc, xcalloc, xstrdup, xstrndup, xmemdup, pex_init):
Mark with attribute returns_nonnull.
2013-10-22 Sterling Augustine <saugustine@google.com>
* gdb/gdb-index.h: Merge from gdb tree.
2013-10-10 Sean Keys <skeys@ipdatasys.com>
@@ -423,53 +337,14 @@
2013-08-02 Caroline Tice <cmtice@google.com>
* vtv-change-permission.h: New file.
2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
Konrad Eisele <konrad@gaisler.com>
* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
2013-06-08 Catherine Moore <clm@codesourcery.com>
* opcode/mips.h (mips_opcode): Add ase field.
(INSN_ASE_MASK): Delete.
(INSN_DSP): Rename to ASE_DSP. Provide new value.
(INSN_DSPR2): Rename to ASE_DSPR2. Provide new value.
(INSN_MCU): Rename to ASE_MCU. Provide new value.
(INSN_MDMX): Rename to ASE_MDMX. Provide new value.
(INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value.
(INSN_MT): Rename to ASE_MT. Provide new value.
(INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value.
(INSN_VIRT): Rename to ASE_VIRT. Provide new value.
(INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
(opcode_is_member): Add ase argument. Check ase.
2013-05-06 Paul Brook <paul@codesourcery.com>
include/elf/
* mips.h (R_MIPS_PC32): Update comment.
2013-04-03 Jason Merrill <jason@redhat.com>
Demangle C++11 ref-qualifier.
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_REFERENCE_THIS,
DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS.
2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
* opcode/nios2.h: Edit comment.
2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* opcode/nios2.h (OPX_WRPRS): New define.
(OP_MATCH_WRPRS): Likewise.
2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* opcode/nios2.h (OP_RDPRS): New define.
(OP_MATCH_RDPRS): Likewise.
2013-03-01 Cary Coutant <ccoutant@google.com>
* dwarf2.h (enum dwarf_sect): New enum type.
@@ -516,13 +391,7 @@
* fopen-bin.h: Likewise.
* fopen-same.h: Likewise.
* fopen-vms.h: Likewise.
* aout/hppa.h: Likewise.
* opcode/tahoe.h: Likewise.
2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-11-09 Jason Merrill <jason@redhat.com>
* demangle.h (enum demangle_component_type): Add
@@ -569,15 +438,7 @@
PR other/54411
* objalloc.h (objalloc_alloc): Do not use fast path on wraparound.
2012-09-27 Anthony Green <green@moxielogic.com>
* opcode/moxie.h (MOXIE_BAD): New define.
2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
2012-09-06 Cary Coutant <ccoutant@google.com>
* dwarf2.def: Edit comment.
@@ -591,30 +452,6 @@
(LDPT_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val.
(tv_allow_unique_segment_for_sections): New member.
(tv_unique_segment_for_sections): New member.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
@@ -631,10 +468,6 @@
(print_aarch64_disassembler_options): New declaration.
(aarch64_symbol_is_valid): New declaration.
2012-08-02 Sean Keys <skeys@ipdatasys.com>
* elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200
2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
Dr David Alan Gilbert <dave@treblig.org>
@@ -645,16 +478,7 @@
* filenames.h: #include "hashtab.h".
(filename_hash, filename_eq): Declare.
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
2012-07-05 Sean Keys <skeys@ipdatasys.com>
* opcode/xgate.h: Changed the format string for mode
XGATE_OP_DYA_MON.
2012-06-18 Doug Evans <dje@google.com>
* dwarf2.def (DW_OP): Add DW_OP_GNU_const_index.
@@ -723,12 +547,7 @@
(get_DW_TAG_name, get_DW_AT_name, get_DW_FORM_name)
(get_DW_OP_name, get_DW_ATE_name): Declare.
* dwarf2.def: New file, from dwarf2.h.
2012-04-12 David S. Miller <davem@davemloft.net>
* elf/sparc.h (R_SPARC_WDISP10): New reloc.
* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
2012-04-10 Tristan Gingold <gingold@adacore.com>
* splay-tree.h: Conditionnaly includes stdint.h and inttypes.h
@@ -746,7 +565,7 @@
Add DWARF attribute value for the "Borland fastcall" calling
convention.
* elf/dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant.
* dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant.
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
@@ -1048,15 +867,7 @@
2010-10-06 Andi Kleen <ak@linux.intel.com>
* libiberty.h (setproctitle): Add prototype.
2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
* opcode/tic6x-control-registers.h (tscl): Now read_write.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_V6Z): Remove.
@@ -1259,7 +1070,7 @@
2009-10-15 Jakub Jelinek <jakub@redhat.com>
* include/dwarf2.h (DW_LANG_Python): Add comment that it is
* dwarf2.h (DW_LANG_Python): Add comment that it is
a DWARF 4 addition.
2009-10-14 Alan Modra <amodra@bigpond.net.au>
@@ -1347,17 +1158,7 @@
* bfdlink.h (struct bfd_link_hash_common_entry): Move to top
level.
2009-09-04 Jie Zhang <jie.zhang@analog.com>
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
2009-08-06 Michael Eager <eager@eagercon.com>
* dis-asm.h: Decl print_insn_microblaze().
@@ -1517,11 +1318,7 @@
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_PACK_EXPANSION.
2008-09-24 Richard Henderson <rth@redhat.com>
* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
2008-09-22 Rafael Espindola <espindola@google.com>
* plugin-api.h (ld_plugin_status): Remove comma from the last item.
@@ -1549,33 +1346,18 @@
2008-08-17 Alan Modra <amodra@bigpond.net.au>
* bfdlink.h (bfd_generic_link_read_symbols): Declare.
2008-08-08 Anatoly Sokolov <aesok@post.ru>
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
2008-07-12 Jie Zhang <jie.zhang@analog.com>
Revert
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2008-07-07 Stan Shebs <stan@codesourcery.com>
@@ -1937,10 +1719,6 @@
2005-06-20 Geoffrey Keating <geoffk@apple.com>
* libiberty.h (strverscmp): Prototype.
2005-06-17 Jakub Jelinek <jakub@redhat.com>
* elf/external.h (GRP_ENTRY_SIZE): Define.
2005-06-08 Zack Weinberg <zack@codesourcery.com>
@@ -1,3 +1,454 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-06-14 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Backport from master
2016-06-14 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20254
* testsuite/ld-avr/avr-prop-6.d: New test.
* testsuite/ld-avr/avr-prop-6.s: New test.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.
2016-06-13 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
* testsuite/ld-i386/ifunc-1a.c: New file.
* testsuite/ld-i386/ifunc-1b.S: Likewise.
* testsuite/ld-i386/ifunc-1c.S: Likewise.
* testsuite/ld-i386/ifunc-1d.S: Likewise.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-08 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/libno-plt-1b.dd: New file.
* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1a.dd: Likewise.
* testsuite/ld-i386/no-plt-1a.rd: Likewise.
* testsuite/ld-i386/no-plt-1b.dd: Likewise.
* testsuite/ld-i386/no-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1c.dd: Likewise.
* testsuite/ld-i386/no-plt-1c.rd: Likewise.
* testsuite/ld-i386/no-plt-1d.dd: Likewise.
* testsuite/ld-i386/no-plt-1d.rd: Likewise.
* testsuite/ld-i386/no-plt-1e.dd: Likewise.
* testsuite/ld-i386/no-plt-1e.rd: Likewise.
* testsuite/ld-i386/no-plt-1f.dd: Likewise.
* testsuite/ld-i386/no-plt-1f.rd: Likewise.
* testsuite/ld-i386/no-plt-1g.dd: Likewise.
* testsuite/ld-i386/no-plt-1g.rd: Likewise.
* testsuite/ld-i386/no-plt-1h.dd: Likewise.
* testsuite/ld-i386/no-plt-1h.rd: Likewise.
* testsuite/ld-i386/no-plt-1i.dd: Likewise.
* testsuite/ld-i386/no-plt-1i.rd: Likewise.
* testsuite/ld-i386/no-plt-1j.dd: Likewise.
* testsuite/ld-i386/no-plt-1j.rd: Likewise.
* testsuite/ld-i386/no-plt-check1a.S: Likewise.
* testsuite/ld-i386/no-plt-check1b.S: Likewise.
* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
* testsuite/ld-i386/no-plt-func1.c: Likewise.
* testsuite/ld-i386/no-plt-main1.c: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.
* testsuite/ld-i386/pass.out Likewise.
2016-06-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-06-12 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
2016-06-08 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Fix a typo.
2016-06-08 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
* testsuite/ld-x86-64/pass.out Likewise.
2016-06-13 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Backport from master
2016-06-08 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20221
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
2016-06-11 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19774
* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before
tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed
tests.
2016-03-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19774
* testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before
tmpdir/pr18900.so and test --as-needed. Link tmpdir/gotpc1.o
before tmpdir/got1d.so and test --as-needed.
* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before
tmpdir/pr18900.so and test --as-needed.
2016-03-06 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o
before tmpdir/copyreloc-lib.so and test --as-needed.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20117
* testsuite/ld-i386/i386.exp: Run pr20117.
* testsuite/ld-i386/pr20117.d: New file.
* testsuite/ld-i386/pr20117.s: Likewise.
2016-05-18 Christophe Monat <christophe.monat@st.com>
Backport from master
2016-05-09 Christophe Monat <christophe.monat@st.com>
PR ld/20030
* testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp
tests. Fix misnamed stm32l4xx-fix-all.
* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple
loads with DP registers.
* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file.
* testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment.
* testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple
loads with DP registers.
* testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
2016-05-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-05-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20093
* testsuite/ld-x86-64/pr20093-1.d: New file.
* testsuite/ld-x86-64/pr20093-1.s: Likewise.
* testsuite/ld-x86-64/pr20093-2.d: Likewise.
* testsuite/ld-x86-64/pr20093-2.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2.
2016-05-11 Alan Modra <amodra@gmail.com>
PR 20060
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
* testsuite/ld-powerpc/tlsdll.s: New.
* testsuite/ld-powerpc/tlsdll.ver: New.
* testsuite/ld-powerpc/tlsdll_32.s: New.
* testsuite/ld-powerpc/tlsopt5.d: New.
* testsuite/ld-powerpc/tlsopt5.s: New.
* testsuite/ld-powerpc/tlsopt5_32.d: New.
* testsuite/ld-powerpc/tlsopt5_32.s: New.
2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20006
* testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New.
(visibility_run): Pass COMPRESS_LDFLAG to visibility_test on
ELF targets.
2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-elf/compressed1b.d: Only run for Linux/GNU targets.
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-elf/compressed1b.d: Pass
--compress-debug-sections=none to ld.
* testsuite/ld-elf/compressed1c.d: Likewise.
2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19827
* testsuite/ld-i386/pr19827-nacl.rd: New file.
* testsuite/ld-x86-64/pr19827-nacl.rd: Likewise.
2016-03-17 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19827
* testsuite/ld-i386/i386.exp: Run PR ld/19827 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr19827.rd: New file.
* testsuite/ld-i386/pr19827a.S: Likewise.
* testsuite/ld-i386/pr19827b.S: Likewise.
* testsuite/ld-x86-64/pr19827.rd: Likewise.
* testsuite/ld-x86-64/pr19827a.S: Likewise.
* testsuite/ld-x86-64/pr19827b.S: Likewise.
2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets.
2016-01-30 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19539
* testsuite/ld-elf/pr19539.d: New file.
* testsuite/ld-elf/pr19539.s: Likewise.
* testsuite/ld-elf/pr19539.t: Likewise.
2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2015-12-07 Jan Beulich <jbeulich@suse.com>
* ld-elf/gabiend.rt: Accept any alignment.
* ld-elf/gabinormal.rt: Likewise.
2016-03-09 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19579
* testsuite/ld-elf/pr19579a.c: New file.
* testsuite/ld-elf/pr19579b.c: Likewise.
* testsuite/ld-elf/shared.exp: Run PR ld/19579 test.
2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-03-02 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19739
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
merge flags of other input sections for relocatable link.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19698
* testsuite/ld-elf/pr19698.d: New file.
* testsuite/ld-elf/pr19698.s: Likewise.
* testsuite/ld-elf/pr19698.t: Likewise.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19553
* testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553.
* testsuite/ld-elf/pr19553.map: New file.
* testsuite/ld-elf/pr19553.map: Likewise.
* testsuite/ld-elf/pr19553a.c: Likewise.
* testsuite/ld-elf/pr19553b.c: Likewise.
* testsuite/ld-elf/pr19553b.out: Likewise.
* testsuite/ld-elf/pr19553c.c: Likewise.
* testsuite/ld-elf/pr19553c.out: Likewise.
* testsuite/ld-elf/pr19553d.c: Likewise.
* testsuite/ld-elf/pr19553d.out: Likewise.
2016-02-25 Jiong Wang <jiong.wang@arm.com>
Backport from master
2016-01-20 Jiong Wang <jiong.wang@arm.com>
* testsuite/ld-aarch64/farcall-section.d: Delete.
* testsuite/ld-aarch64/farcall-section.s: Delete.
* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-02-11 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19615
* ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for
PIE.
* lexsup.c (parse_args): Enable -Bsymbolic and
-Bsymbolic-functions for PIE.
* testsuite/ld-i386/i386.exp: Run pr19615.
* testsuite/ld-i386/pr19615.d: New file.
* testsuite/ld-i386/pr19615.s: Likewise.
* testsuite/ld-x86-64/pr19615.d: Likewise.
* testsuite/ld-x86-64/pr19615.s: Likewise.
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19520
* testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
* testsuite/ld-i386/call1.d: Likewise.
* testsuite/ld-i386/call2.d: Likewise.
* testsuite/ld-i386/call3a.d: Likewise.
* testsuite/ld-i386/call3b.d: Likewise.
* testsuite/ld-i386/call3c.d: Likewise.
* testsuite/ld-i386/call3d.d: Likewise.
* testsuite/ld-i386/call3e.d: Likewise.
* testsuite/ld-i386/call3f.d: Likewise.
* testsuite/ld-i386/call3g.d: Likewise.
* testsuite/ld-i386/call3h.d: Likewise.
* testsuite/ld-i386/jmp1.d: Likewise.
* testsuite/ld-i386/jmp2.d: Likewise.
* testsuite/ld-i386/lea1c.d: Likewise.
* testsuite/ld-i386/load1.d: Likewise.
* testsuite/ld-i386/load2.d: Likewise.
* testsuite/ld-i386/load3.d: Likewise.
* testsuite/ld-i386/load4a.d: Likewise.
* testsuite/ld-i386/load5a.d: Likewise.
* testsuite/ld-i386/mov2b.d: Likewise.
* testsuite/ld-i386/mov3.d: Likewise.
* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
* testsuite/ld-x86-64/call1a.d: Likewise.
* testsuite/ld-x86-64/call1b.d: Likewise.
* testsuite/ld-x86-64/call1c.d: Likewise.
* testsuite/ld-x86-64/call1d.d: Likewise.
* testsuite/ld-x86-64/call1e.d: Likewise.
* testsuite/ld-x86-64/call1f.d: Likewise.
* testsuite/ld-x86-64/call1h.d: Likewise.
* testsuite/ld-x86-64/call1i.d: Likewise.
* testsuite/ld-x86-64/load1a.d: Likewise.
* testsuite/ld-x86-64/load1b.d: Likewise.
* testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
* testsuite/ld-i386/got1.dd: Updated.
* testsuite/ld-i386/got1d.S (1): Removed.
* testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
PR ld/18591
* testsuite/ld-x86-64/pr18591.d: New file.
* testsuite/ld-x86-64/pr18591.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr18591.
2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19533
* configure.ac (compressed_debug_sections): Replace == with =.
* configure: Regenerated.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -89,7 +540,7 @@
decide placement.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
Christophe Monat <christophe.monat@st.com>
Christophe Monat <christophe.monat@st.com>
* ld.texinfo: Add description of the STM32L4xx erratum
workaround.
@@ -129,7 +580,7 @@
2015-10-22 H.J. Lu <hongjiu.lu@intel.com>
* ld/ld.texinfo: Document "-z call-nop=PADDING" option.
* ld.texinfo: Document "-z call-nop=PADDING" option.
* emulparams/call_nop.sh: New file.
* emulparams/elf_i386_be.sh: Source
${srcdir}/emulparams/call_nop.sh.
@@ -165,7 +616,7 @@
2015-10-15 Simon Dardis <Simon.Dardis@imgtec.com>
* ld/ldexp.c: (try_copy_symbol_flags): New. Factored out from...
* ldexp.c: (try_copy_symbol_flags): New. Factored out from...
(exp_fold_tree_1): Here. Cope with ternary operator in
assignments. Use new helper.
@@ -308,7 +759,7 @@
2015-09-09 James Bowman <james.bowman@ftdichip.com>
* scripttempl/ft32.sc: default linker script RAM and
FLASH size symbols
FLASH size symbols
2015-09-09 Nick Clifton <nickc@redhat.com>
@@ -359,58 +810,58 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
* ld/ldctor.c: Replace shared, executable, relocatable and pie
* ldctor.c: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* ld/ldemul.c: Likewise.
* ld/ldfile.c: Likewise.
* ld/ldlang.c: Likewise.
* ld/ldmain.c: Likewise.
* ld/ldwrite.c: Likewise.
* ld/lexsup.c: Likewise.
* ld/pe-dll.c: Likewise.
* ld/plugin.c: Likewise.
* ld/emultempl/aarch64elf.em: Likewise.
* ld/emultempl/aix.em: Likewise.
* ld/emultempl/alphaelf.em: Likewise.
* ld/emultempl/armcoff.em: Likewise.
* ld/emultempl/armelf.em: Likewise.
* ld/emultempl/avrelf.em: Likewise.
* ld/emultempl/beos.em: Likewise.
* ld/emultempl/cr16elf.em: Likewise.
* ld/emultempl/elf-generic.em: Likewise.
* ld/emultempl/elf32.em: Likewise.
* ld/emultempl/genelf.em: Likewise.
* ld/emultempl/generic.em: Likewise.
* ld/emultempl/gld960.em: Likewise.
* ld/emultempl/gld960c.em: Likewise.
* ld/emultempl/hppaelf.em: Likewise.
* ld/emultempl/irix.em: Likewise.
* ld/emultempl/linux.em: Likewise.
* ld/emultempl/lnk960.em: Likewise.
* ld/emultempl/m68hc1xelf.em: Likewise.
* ld/emultempl/m68kcoff.em: Likewise.
* ld/emultempl/m68kelf.em: Likewise.
* ld/emultempl/metagelf.em: Likewise.
* ld/emultempl/mipself.em: Likewise.
* ld/emultempl/mmo.em: Likewise.
* ld/emultempl/msp430.em: Likewise.
* ld/emultempl/nds32elf.em: Likewise.
* ld/emultempl/needrelax.em: Likewise.
* ld/emultempl/nios2elf.em: Likewise.
* ld/emultempl/pe.em: Likewise.
* ld/emultempl/pep.em: Likewise.
* ld/emultempl/ppc32elf.em: Likewise.
* ld/emultempl/ppc64elf.em: Likewise.
* ld/emultempl/sh64elf.em: Likewise.
* ld/emultempl/solaris2.em: Likewise.
* ld/emultempl/spuelf.em: Likewise.
* ld/emultempl/sunos.em: Likewise.
* ld/emultempl/tic6xdsbt.em: Likewise.
* ld/emultempl/ticoff.em: Likewise.
* ld/emultempl/v850elf.em: Likewise.
* ld/emultempl/vms.em: Likewise.
* ld/emultempl/vxworks.em: Likewise.
* ldemul.c: Likewise.
* ldfile.c: Likewise.
* ldlang.c: Likewise.
* ldmain.c: Likewise.
* ldwrite.c: Likewise.
* lexsup.c: Likewise.
* pe-dll.c: Likewise.
* plugin.c: Likewise.
* emultempl/aarch64elf.em: Likewise.
* emultempl/aix.em: Likewise.
* emultempl/alphaelf.em: Likewise.
* emultempl/armcoff.em: Likewise.
* emultempl/armelf.em: Likewise.
* emultempl/avrelf.em: Likewise.
* emultempl/beos.em: Likewise.
* emultempl/cr16elf.em: Likewise.
* emultempl/elf-generic.em: Likewise.
* emultempl/elf32.em: Likewise.
* emultempl/genelf.em: Likewise.
* emultempl/generic.em: Likewise.
* emultempl/gld960.em: Likewise.
* emultempl/gld960c.em: Likewise.
* emultempl/hppaelf.em: Likewise.
* emultempl/irix.em: Likewise.
* emultempl/linux.em: Likewise.
* emultempl/lnk960.em: Likewise.
* emultempl/m68hc1xelf.em: Likewise.
* emultempl/m68kcoff.em: Likewise.
* emultempl/m68kelf.em: Likewise.
* emultempl/metagelf.em: Likewise.
* emultempl/mipself.em: Likewise.
* emultempl/mmo.em: Likewise.
* emultempl/msp430.em: Likewise.
* emultempl/nds32elf.em: Likewise.
* emultempl/needrelax.em: Likewise.
* emultempl/nios2elf.em: Likewise.
* emultempl/pe.em: Likewise.
* emultempl/pep.em: Likewise.
* emultempl/ppc32elf.em: Likewise.
* emultempl/ppc64elf.em: Likewise.
* emultempl/sh64elf.em: Likewise.
* emultempl/solaris2.em: Likewise.
* emultempl/spuelf.em: Likewise.
* emultempl/sunos.em: Likewise.
* emultempl/tic6xdsbt.em: Likewise.
* emultempl/ticoff.em: Likewise.
* emultempl/v850elf.em: Likewise.
* emultempl/vms.em: Likewise.
* emultempl/vxworks.em: Likewise.
2015-08-18 Alan Modra <amodra@gmail.com>
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for ld 2.26.
# Generated by GNU Autoconf 2.64 for ld 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='ld'
PACKAGE_TARNAME='ld'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='ld 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='ld 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1350,7 +1350,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures ld 2.26 to adapt to many kinds of systems.
\`configure' configures ld 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1421,7 +1421,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of ld 2.26:";;
short | recursive ) echo "Configuration of ld 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1545,7 +1545,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
ld configure 2.26
ld configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2254,7 +2254,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by ld $as_me 2.26, which was
It was created by ld $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -4063,7 +4063,7 @@
# Define the identity of the package.
PACKAGE='ld'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -17134,7 +17134,7 @@
fi
done
if test x$ac_default_compressed_debug_sections == xyes ; then
if test x$ac_default_compressed_debug_sections = xyes ; then
$as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h
@@ -17740,7 +17740,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by ld $as_me 2.26, which was
This file was extended by ld $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -17804,7 +17804,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
ld config.status 2.26
ld config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -384,7 +384,7 @@
fi
done
if test x$ac_default_compressed_debug_sections == xyes ; then
if test x$ac_default_compressed_debug_sections = xyes ; then
AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.])
fi
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "LD 1"
.TH LD 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH LD 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -1196,14 +1196,20 @@
When creating a shared library, bind references to global symbols to the
definition within the shared library, if any. Normally, it is possible
for a program linked against a shared library to override the definition
within the shared library. This option is only meaningful on \s-1ELF\s0
platforms which support shared libraries.
within the shared library. This option can also be used with the
\&\fB\-\-export\-dynamic\fR option, when creating a position independent
executable, to bind references to global symbols to the definition within
the executable. This option is only meaningful on \s-1ELF\s0 platforms which
support shared libraries and position independent executables.
.IP "\fB\-Bsymbolic\-functions\fR" 4
.IX Item "-Bsymbolic-functions"
When creating a shared library, bind references to global function
symbols to the definition within the shared library, if any.
This option can also be used with the \fB\-\-export\-dynamic\fR option,
when creating a position independent executable, to bind references
to global function symbols to the definition within the executable.
This option is only meaningful on \s-1ELF\s0 platforms which support shared
libraries.
libraries and position independent executables.
.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4
.IX Item "--dynamic-list=dynamic-list-file"
Specify the name of a dynamic list file to the linker. This is
@@ -980,14 +980,21 @@
When creating a shared library, bind references to global symbols
to the definition within the shared library, if any. Normally, it
is possible for a program linked against a shared library to
override the definition within the shared library. This option is
only meaningful on ELF platforms which support shared libraries.
override the definition within the shared library. This option
can also be used with the `--export-dynamic' option, when creating
a position independent executable, to bind references to global
symbols to the definition within the executable. This option is
only meaningful on ELF platforms which support shared libraries
and position independent executables.
`-Bsymbolic-functions'
When creating a shared library, bind references to global function
symbols to the definition within the shared library, if any. This
option is only meaningful on ELF platforms which support shared
libraries.
option can also be used with the `--export-dynamic' option, when
creating a position independent executable, to bind references to
global function symbols to the definition within the executable.
This option is only meaningful on ELF platforms which support
shared libraries and position independent executables.
`--dynamic-list=DYNAMIC-LIST-FILE'
Specify the name of a dynamic list file to the linker. This is
@@ -7592,76 +7599,76 @@
* -(: Options. (line 804)
* --accept-unknown-input-arch: Options. (line 822)
* --add-needed: Options. (line 850)
* --add-stdcall-alias: Options. (line 1743)
* --allow-multiple-definition: Options. (line 1121)
* --allow-shlib-undefined: Options. (line 1127)
* --add-stdcall-alias: Options. (line 1750)
* --allow-multiple-definition: Options. (line 1128)
* --allow-shlib-undefined: Options. (line 1134)
* --architecture=ARCH: Options. (line 123)
* --as-needed: Options. (line 832)
* --audit AUDITLIB: Options. (line 112)
* --auxiliary=NAME: Options. (line 255)
* --bank-window: Options. (line 2197)
* --base-file: Options. (line 1748)
* --bank-window: Options. (line 2204)
* --base-file: Options. (line 1755)
* --be8: ARM. (line 28)
* --bss-plt: PowerPC ELF32. (line 16)
* --build-id: Options. (line 1705)
* --build-id=STYLE: Options. (line 1705)
* --check-sections: Options. (line 929)
* --compress-debug-sections=none: Options. (line 1675)
* --compress-debug-sections=zlib: Options. (line 1675)
* --compress-debug-sections=zlib-gabi: Options. (line 1675)
* --compress-debug-sections=zlib-gnu: Options. (line 1675)
* --copy-dt-needed-entries: Options. (line 941)
* --cref: Options. (line 961)
* --default-imported-symver: Options. (line 1164)
* --build-id: Options. (line 1712)
* --build-id=STYLE: Options. (line 1712)
* --check-sections: Options. (line 936)
* --compress-debug-sections=none: Options. (line 1682)
* --compress-debug-sections=zlib: Options. (line 1682)
* --compress-debug-sections=zlib-gabi: Options. (line 1682)
* --compress-debug-sections=zlib-gnu: Options. (line 1682)
* --copy-dt-needed-entries: Options. (line 948)
* --cref: Options. (line 968)
* --default-imported-symver: Options. (line 1171)
* --default-script=SCRIPT: Options. (line 562)
* --default-symver: Options. (line 1160)
* --defsym=SYMBOL=EXP: Options. (line 990)
* --demangle[=STYLE]: Options. (line 1002)
* --default-symver: Options. (line 1167)
* --defsym=SYMBOL=EXP: Options. (line 997)
* --demangle[=STYLE]: Options. (line 1009)
* --depaudit AUDITLIB: Options. (line 177)
* --disable-auto-image-base: Options. (line 1935)
* --disable-auto-import: Options. (line 2070)
* --disable-large-address-aware: Options. (line 1874)
* --disable-long-section-names: Options. (line 1758)
* --disable-new-dtags: Options. (line 1651)
* --disable-runtime-pseudo-reloc: Options. (line 2083)
* --disable-stdcall-fixup: Options. (line 1780)
* --disable-auto-image-base: Options. (line 1942)
* --disable-auto-import: Options. (line 2077)
* --disable-large-address-aware: Options. (line 1881)
* --disable-long-section-names: Options. (line 1765)
* --disable-new-dtags: Options. (line 1658)
* --disable-runtime-pseudo-reloc: Options. (line 2090)
* --disable-stdcall-fixup: Options. (line 1787)
* --discard-all: Options. (line 647)
* --discard-locals: Options. (line 651)
* --dll: Options. (line 1753)
* --dll-search-prefix: Options. (line 1941)
* --dll: Options. (line 1760)
* --dll-search-prefix: Options. (line 1948)
* --dotsyms: PowerPC64 ELF64. (line 33)
* --dsbt-index: Options. (line 2174)
* --dsbt-size: Options. (line 2169)
* --dynamic-linker=FILE: Options. (line 1015)
* --dynamic-list-cpp-new: Options. (line 921)
* --dynamic-list-cpp-typeinfo: Options. (line 925)
* --dynamic-list-data: Options. (line 918)
* --dynamic-list=DYNAMIC-LIST-FILE: Options. (line 905)
* --dynamicbase: Options. (line 2123)
* --eh-frame-hdr: Options. (line 1642)
* --dsbt-index: Options. (line 2181)
* --dsbt-size: Options. (line 2176)
* --dynamic-linker=FILE: Options. (line 1022)
* --dynamic-list-cpp-new: Options. (line 928)
* --dynamic-list-cpp-typeinfo: Options. (line 932)
* --dynamic-list-data: Options. (line 925)
* --dynamic-list=DYNAMIC-LIST-FILE: Options. (line 912)
* --dynamicbase: Options. (line 2130)
* --eh-frame-hdr: Options. (line 1649)
* --emit-relocs: Options. (line 497)
* --emit-stack-syms: SPU ELF. (line 46)
* --emit-stub-syms <1>: PowerPC ELF32. (line 47)
* --emit-stub-syms <2>: SPU ELF. (line 15)
* --emit-stub-syms: PowerPC64 ELF64. (line 29)
* --enable-auto-image-base: Options. (line 1926)
* --enable-auto-import: Options. (line 1950)
* --enable-extra-pe-debug: Options. (line 2088)
* --enable-long-section-names: Options. (line 1758)
* --enable-new-dtags: Options. (line 1651)
* --enable-runtime-pseudo-reloc: Options. (line 2075)
* --enable-stdcall-fixup: Options. (line 1780)
* --enable-auto-image-base: Options. (line 1933)
* --enable-auto-import: Options. (line 1957)
* --enable-extra-pe-debug: Options. (line 2095)
* --enable-long-section-names: Options. (line 1765)
* --enable-new-dtags: Options. (line 1658)
* --enable-runtime-pseudo-reloc: Options. (line 2082)
* --enable-stdcall-fixup: Options. (line 1787)
* --entry=ENTRY: Options. (line 187)
* --error-unresolved-symbols: Options. (line 1595)
* --exclude-all-symbols: Options. (line 1834)
* --error-unresolved-symbols: Options. (line 1602)
* --exclude-all-symbols: Options. (line 1841)
* --exclude-libs: Options. (line 197)
* --exclude-modules-for-implib: Options. (line 208)
* --exclude-symbols: Options. (line 1828)
* --export-all-symbols: Options. (line 1804)
* --exclude-symbols: Options. (line 1835)
* --export-all-symbols: Options. (line 1811)
* --export-dynamic: Options. (line 221)
* --extra-overlay-stubs: SPU ELF. (line 19)
* --fatal-warnings: Options. (line 1028)
* --file-alignment: Options. (line 1838)
* --fatal-warnings: Options. (line 1035)
* --file-alignment: Options. (line 1845)
* --filter=NAME: Options. (line 276)
* --fix-arm1176: ARM. (line 112)
* --fix-cortex-a53-835769: ARM. (line 213)
@@ -7670,66 +7677,66 @@
* --fix-v4bx: ARM. (line 50)
* --fix-v4bx-interworking: ARM. (line 63)
* --force-dynamic: Options. (line 506)
* --force-exe-suffix: Options. (line 1033)
* --forceinteg: Options. (line 2128)
* --force-exe-suffix: Options. (line 1040)
* --forceinteg: Options. (line 2135)
* --format=FORMAT: Options. (line 134)
* --format=VERSION: TI COFF. (line 6)
* --gc-sections: Options. (line 1043)
* --got: Options. (line 2210)
* --gc-sections: Options. (line 1050)
* --got: Options. (line 2217)
* --got=TYPE: M68K. (line 6)
* --gpsize=VALUE: Options. (line 309)
* --hash-size=NUMBER: Options. (line 1661)
* --hash-style=STYLE: Options. (line 1669)
* --heap: Options. (line 1844)
* --help: Options. (line 1094)
* --high-entropy-va: Options. (line 2119)
* --image-base: Options. (line 1851)
* --insert-timestamp: Options. (line 2151)
* --hash-size=NUMBER: Options. (line 1668)
* --hash-style=STYLE: Options. (line 1676)
* --heap: Options. (line 1851)
* --help: Options. (line 1101)
* --high-entropy-va: Options. (line 2126)
* --image-base: Options. (line 1858)
* --insert-timestamp: Options. (line 2158)
* --insn32 <1>: MIPS. (line 6)
* --insn32: Options. (line 2222)
* --insn32: Options. (line 2229)
* --just-symbols=FILE: Options. (line 529)
* --kill-at: Options. (line 1860)
* --large-address-aware: Options. (line 1865)
* --ld-generated-unwind-info: Options. (line 1646)
* --leading-underscore: Options. (line 1798)
* --kill-at: Options. (line 1867)
* --large-address-aware: Options. (line 1872)
* --ld-generated-unwind-info: Options. (line 1653)
* --leading-underscore: Options. (line 1805)
* --library-path=DIR: Options. (line 367)
* --library=NAMESPEC: Options. (line 334)
* --local-store=lo:hi: SPU ELF. (line 24)
* --long-plt: ARM. (line 224)
* --major-image-version: Options. (line 1881)
* --major-os-version: Options. (line 1886)
* --major-subsystem-version: Options. (line 1890)
* --major-image-version: Options. (line 1888)
* --major-os-version: Options. (line 1893)
* --major-subsystem-version: Options. (line 1897)
* --merge-exidx-entries: ARM. (line 221)
* --minor-image-version: Options. (line 1895)
* --minor-os-version: Options. (line 1900)
* --minor-subsystem-version: Options. (line 1904)
* --minor-image-version: Options. (line 1902)
* --minor-os-version: Options. (line 1907)
* --minor-subsystem-version: Options. (line 1911)
* --mri-script=MRI-CMDFILE: Options. (line 158)
* --multi-subspace: HPPA ELF32. (line 6)
* --nmagic: Options. (line 439)
* --no-accept-unknown-input-arch: Options. (line 822)
* --no-add-needed: Options. (line 850)
* --no-allow-shlib-undefined: Options. (line 1127)
* --no-allow-shlib-undefined: Options. (line 1134)
* --no-as-needed: Options. (line 832)
* --no-bind: Options. (line 2142)
* --no-check-sections: Options. (line 929)
* --no-copy-dt-needed-entries: Options. (line 941)
* --no-define-common: Options. (line 974)
* --no-demangle: Options. (line 1002)
* --no-bind: Options. (line 2149)
* --no-check-sections: Options. (line 936)
* --no-copy-dt-needed-entries: Options. (line 948)
* --no-define-common: Options. (line 981)
* --no-demangle: Options. (line 1009)
* --no-dotsyms: PowerPC64 ELF64. (line 33)
* --no-dynamic-linker: Options. (line 1022)
* --no-dynamic-linker: Options. (line 1029)
* --no-enum-size-warning: ARM. (line 159)
* --no-export-dynamic: Options. (line 221)
* --no-fatal-warnings: Options. (line 1028)
* --no-fatal-warnings: Options. (line 1035)
* --no-fix-arm1176: ARM. (line 112)
* --no-fix-cortex-a53-835769: ARM. (line 213)
* --no-fix-cortex-a8: ARM. (line 204)
* --no-gc-sections: Options. (line 1043)
* --no-insn32 <1>: Options. (line 2223)
* --no-gc-sections: Options. (line 1050)
* --no-insn32 <1>: Options. (line 2230)
* --no-insn32: MIPS. (line 6)
* --no-isolation: Options. (line 2135)
* --no-keep-memory: Options. (line 1106)
* --no-leading-underscore: Options. (line 1798)
* --no-merge-exidx-entries <1>: Options. (line 2181)
* --no-isolation: Options. (line 2142)
* --no-keep-memory: Options. (line 1113)
* --no-leading-underscore: Options. (line 1805)
* --no-merge-exidx-entries <1>: Options. (line 2188)
* --no-merge-exidx-entries: ARM. (line 221)
* --no-multi-toc: PowerPC64 ELF64. (line 97)
* --no-omagic: Options. (line 454)
@@ -7738,74 +7745,74 @@
* --no-plt-align: PowerPC64 ELF64. (line 119)
* --no-plt-static-chain: PowerPC64 ELF64. (line 127)
* --no-plt-thread-safe: PowerPC64 ELF64. (line 133)
* --no-print-gc-sections: Options. (line 1067)
* --no-print-gc-sections: Options. (line 1074)
* --no-save-restore-funcs: PowerPC64 ELF64. (line 44)
* --no-seh: Options. (line 2138)
* --no-seh: Options. (line 2145)
* --no-tls-get-addr-optimize: PowerPC64 ELF64. (line 57)
* --no-tls-optimize <1>: PowerPC64 ELF64. (line 52)
* --no-tls-optimize: PowerPC ELF32. (line 51)
* --no-toc-optimize: PowerPC64 ELF64. (line 83)
* --no-toc-sort: PowerPC64 ELF64. (line 109)
* --no-trampoline: Options. (line 2191)
* --no-undefined: Options. (line 1113)
* --no-undefined-version: Options. (line 1155)
* --no-warn-mismatch: Options. (line 1168)
* --no-warn-search-mismatch: Options. (line 1177)
* --no-trampoline: Options. (line 2198)
* --no-undefined: Options. (line 1120)
* --no-undefined-version: Options. (line 1162)
* --no-warn-mismatch: Options. (line 1175)
* --no-warn-search-mismatch: Options. (line 1184)
* --no-wchar-size-warning: ARM. (line 166)
* --no-whole-archive: Options. (line 1181)
* --noinhibit-exec: Options. (line 1185)
* --no-whole-archive: Options. (line 1188)
* --noinhibit-exec: Options. (line 1192)
* --non-overlapping-opd: PowerPC64 ELF64. (line 77)
* --nxcompat: Options. (line 2131)
* --oformat=OUTPUT-FORMAT: Options. (line 1197)
* --nxcompat: Options. (line 2138)
* --oformat=OUTPUT-FORMAT: Options. (line 1204)
* --omagic: Options. (line 445)
* --orphan-handling=MODE: Options. (line 606)
* --out-implib: Options. (line 1917)
* --output-def: Options. (line 1909)
* --out-implib: Options. (line 1924)
* --output-def: Options. (line 1916)
* --output=OUTPUT: Options. (line 460)
* --pic-executable: Options. (line 1210)
* --pic-executable: Options. (line 1217)
* --pic-veneer: ARM. (line 172)
* --plt-align: PowerPC64 ELF64. (line 119)
* --plt-static-chain: PowerPC64 ELF64. (line 127)
* --plt-thread-safe: PowerPC64 ELF64. (line 133)
* --plugin: SPU ELF. (line 6)
* --pop-state: Options. (line 494)
* --print-gc-sections: Options. (line 1067)
* --print-gc-sections: Options. (line 1074)
* --print-map: Options. (line 402)
* --print-memory-usage: Options. (line 1082)
* --print-output-format: Options. (line 1076)
* --print-memory-usage: Options. (line 1089)
* --print-output-format: Options. (line 1083)
* --push-state: Options. (line 476)
* --reduce-memory-overheads: Options. (line 1691)
* --relax: Options. (line 1226)
* --reduce-memory-overheads: Options. (line 1698)
* --relax: Options. (line 1233)
* --relax on i960: i960. (line 31)
* --relax on Nios II: Nios II. (line 6)
* --relax on PowerPC: PowerPC ELF32. (line 6)
* --relax on Xtensa: Xtensa. (line 27)
* --relocatable: Options. (line 510)
* --require-defined=SYMBOL: Options. (line 588)
* --retain-symbols-file=FILENAME: Options. (line 1252)
* --retain-symbols-file=FILENAME: Options. (line 1259)
* --save-restore-funcs: PowerPC64 ELF64. (line 44)
* --script=SCRIPT: Options. (line 553)
* --sdata-got: PowerPC ELF32. (line 33)
* --section-alignment: Options. (line 2093)
* --section-start=SECTIONNAME=ORG: Options. (line 1408)
* --section-alignment: Options. (line 2100)
* --section-start=SECTIONNAME=ORG: Options. (line 1415)
* --secure-plt: PowerPC ELF32. (line 26)
* --sort-common: Options. (line 1350)
* --sort-section=alignment: Options. (line 1365)
* --sort-section=name: Options. (line 1361)
* --split-by-file: Options. (line 1369)
* --split-by-reloc: Options. (line 1374)
* --stack: Options. (line 2099)
* --sort-common: Options. (line 1357)
* --sort-section=alignment: Options. (line 1372)
* --sort-section=name: Options. (line 1368)
* --split-by-file: Options. (line 1376)
* --split-by-reloc: Options. (line 1381)
* --stack: Options. (line 2106)
* --stack-analysis: SPU ELF. (line 29)
* --stats: Options. (line 1387)
* --stats: Options. (line 1394)
* --strip-all: Options. (line 540)
* --strip-debug: Options. (line 544)
* --stub-group-size: PowerPC64 ELF64. (line 6)
* --stub-group-size=N <1>: HPPA ELF32. (line 12)
* --stub-group-size=N: ARM. (line 177)
* --subsystem: Options. (line 2106)
* --subsystem: Options. (line 2113)
* --support-old-code: ARM. (line 6)
* --sysroot=DIRECTORY: Options. (line 1391)
* --target-help: Options. (line 1098)
* --sysroot=DIRECTORY: Options. (line 1398)
* --target-help: Options. (line 1105)
* --target1-abs: ARM. (line 33)
* --target1-rel: ARM. (line 33)
* --target2=TYPE: ARM. (line 38)
@@ -7813,38 +7820,38 @@
* --tls-get-addr-optimize: PowerPC64 ELF64. (line 57)
* --trace: Options. (line 549)
* --trace-symbol=SYMBOL: Options. (line 657)
* --traditional-format: Options. (line 1396)
* --tsaware: Options. (line 2148)
* --traditional-format: Options. (line 1403)
* --tsaware: Options. (line 2155)
* --undefined=SYMBOL: Options. (line 575)
* --unique[=SECTION]: Options. (line 632)
* --unresolved-symbols: Options. (line 1438)
* --unresolved-symbols: Options. (line 1445)
* --use-blx: ARM. (line 75)
* --use-nul-prefixed-import-tables: ARM. (line 23)
* --verbose[=NUMBER]: Options. (line 1467)
* --verbose[=NUMBER]: Options. (line 1474)
* --version: Options. (line 641)
* --version-script=VERSION-SCRIPTFILE: Options. (line 1475)
* --version-script=VERSION-SCRIPTFILE: Options. (line 1482)
* --vfp11-denorm-fix: ARM. (line 84)
* --warn-alternate-em: Options. (line 1587)
* --warn-common: Options. (line 1486)
* --warn-constructors: Options. (line 1554)
* --warn-multiple-gp: Options. (line 1559)
* --warn-once: Options. (line 1573)
* --warn-section-align: Options. (line 1577)
* --warn-shared-textrel: Options. (line 1584)
* --warn-unresolved-symbols: Options. (line 1590)
* --wdmdriver: Options. (line 2145)
* --whole-archive: Options. (line 1599)
* --wrap=SYMBOL: Options. (line 1613)
* --warn-alternate-em: Options. (line 1594)
* --warn-common: Options. (line 1493)
* --warn-constructors: Options. (line 1561)
* --warn-multiple-gp: Options. (line 1566)
* --warn-once: Options. (line 1580)
* --warn-section-align: Options. (line 1584)
* --warn-shared-textrel: Options. (line 1591)
* --warn-unresolved-symbols: Options. (line 1597)
* --wdmdriver: Options. (line 2152)
* --whole-archive: Options. (line 1606)
* --wrap=SYMBOL: Options. (line 1620)
* -A ARCH: Options. (line 122)
* -a KEYWORD: Options. (line 105)
* -assert KEYWORD: Options. (line 857)
* -b FORMAT: Options. (line 134)
* -Bdynamic: Options. (line 860)
* -Bgroup: Options. (line 870)
* -Bshareable: Options. (line 1343)
* -Bshareable: Options. (line 1350)
* -Bstatic: Options. (line 877)
* -Bsymbolic: Options. (line 892)
* -Bsymbolic-functions: Options. (line 899)
* -Bsymbolic-functions: Options. (line 903)
* -c MRI-CMDFILE: Options. (line 158)
* -call_shared: Options. (line 860)
* -d: Options. (line 168)
@@ -7864,42 +7871,42 @@
* -G VALUE: Options. (line 309)
* -h NAME: Options. (line 316)
* -i: Options. (line 325)
* -IFILE: Options. (line 1015)
* -IFILE: Options. (line 1022)
* -init=NAME: Options. (line 328)
* -L DIR: Options. (line 367)
* -l NAMESPEC: Options. (line 334)
* -M: Options. (line 402)
* -m EMULATION: Options. (line 392)
* -Map=MAPFILE: Options. (line 1102)
* -Map=MAPFILE: Options. (line 1109)
* -n: Options. (line 439)
* -N: Options. (line 445)
* -no-relax: Options. (line 1226)
* -no-relax: Options. (line 1233)
* -non_shared: Options. (line 877)
* -nostdlib: Options. (line 1191)
* -nostdlib: Options. (line 1198)
* -O LEVEL: Options. (line 466)
* -o OUTPUT: Options. (line 460)
* -P AUDITLIB: Options. (line 177)
* -pie: Options. (line 1210)
* -pie: Options. (line 1217)
* -q: Options. (line 497)
* -qmagic: Options. (line 1220)
* -Qy: Options. (line 1223)
* -qmagic: Options. (line 1227)
* -Qy: Options. (line 1230)
* -r: Options. (line 510)
* -R FILE: Options. (line 529)
* -rpath-link=DIR: Options. (line 1288)
* -rpath=DIR: Options. (line 1266)
* -rpath-link=DIR: Options. (line 1295)
* -rpath=DIR: Options. (line 1273)
* -s: Options. (line 540)
* -S: Options. (line 544)
* -shared: Options. (line 1343)
* -shared: Options. (line 1350)
* -soname=NAME: Options. (line 316)
* -static: Options. (line 877)
* -t: Options. (line 549)
* -T SCRIPT: Options. (line 553)
* -Tbss=ORG: Options. (line 1417)
* -Tdata=ORG: Options. (line 1417)
* -Tldata-segment=ORG: Options. (line 1433)
* -Trodata-segment=ORG: Options. (line 1427)
* -Ttext-segment=ORG: Options. (line 1423)
* -Ttext=ORG: Options. (line 1417)
* -Tbss=ORG: Options. (line 1424)
* -Tdata=ORG: Options. (line 1424)
* -Tldata-segment=ORG: Options. (line 1440)
* -Trodata-segment=ORG: Options. (line 1434)
* -Ttext-segment=ORG: Options. (line 1430)
* -Ttext=ORG: Options. (line 1424)
* -u SYMBOL: Options. (line 575)
* -Ur: Options. (line 596)
* -v: Options. (line 641)
@@ -7908,9 +7915,9 @@
* -X: Options. (line 651)
* -Y PATH: Options. (line 666)
* -y SYMBOL: Options. (line 657)
* -z defs: Options. (line 1113)
* -z defs: Options. (line 1120)
* -z KEYWORD: Options. (line 670)
* -z muldefs: Options. (line 1121)
* -z muldefs: Options. (line 1128)
* .: Location Counter. (line 6)
* /DISCARD/: Output Section Discarding.
(line 26)
@@ -7976,7 +7983,7 @@
(line 19)
* CHIP (MRI): MRI. (line 58)
* COLLECT_NO_DEMANGLE: Environment. (line 29)
* combining symbols, warnings on: Options. (line 1486)
* combining symbols, warnings on: Options. (line 1493)
* command files: Scripts. (line 6)
* command line: Options. (line 6)
* common allocation: Options. (line 168)
@@ -8001,7 +8008,7 @@
* CREATE_OBJECT_SYMBOLS: Output Section Keywords.
(line 9)
* creating a DEF file: WIN32. (line 158)
* cross reference table: Options. (line 961)
* cross reference table: Options. (line 968)
* cross references: Miscellaneous Commands.
(line 82)
* current output location: Location Counter. (line 6)
@@ -8011,25 +8018,25 @@
(line 82)
* DATA_SEGMENT_END(EXP): Builtin Functions. (line 104)
* DATA_SEGMENT_RELRO_END(OFFSET, EXP): Builtin Functions. (line 110)
* dbx: Options. (line 1401)
* DEF files, creating: Options. (line 1909)
* dbx: Options. (line 1408)
* DEF files, creating: Options. (line 1916)
* default emulation: Environment. (line 21)
* default input format: Environment. (line 9)
* defined symbol: Options. (line 588)
* DEFINED(SYMBOL): Builtin Functions. (line 123)
* deleting local symbols: Options. (line 647)
* demangling, default: Environment. (line 29)
* demangling, from command line: Options. (line 1002)
* demangling, from command line: Options. (line 1009)
* direct linking to a dll: WIN32. (line 239)
* discarding sections: Output Section Discarding.
(line 6)
* discontinuous memory: MEMORY. (line 6)
* DLLs, creating: Options. (line 1917)
* DLLs, linking to: Options. (line 1941)
* DLLs, creating: Options. (line 1924)
* DLLs, linking to: Options. (line 1948)
* dot: Location Counter. (line 6)
* dot inside sections: Location Counter. (line 36)
* dot outside sections: Location Counter. (line 66)
* dynamic linker, from command line: Options. (line 1015)
* dynamic linker, from command line: Options. (line 1022)
* dynamic symbol table: Options. (line 221)
* ELF program headers: PHDRS. (line 6)
* emulation: Options. (line 392)
@@ -8073,7 +8080,7 @@
* forcing the creation of dynamic sections: Options. (line 506)
* FORMAT (MRI): MRI. (line 66)
* functions in expressions: Builtin Functions. (line 6)
* garbage collection <1>: Options. (line 1043)
* garbage collection <1>: Options. (line 1050)
* garbage collection: Input Section Keep. (line 6)
* generating optimized output: Options. (line 466)
* GNU linker: Overview. (line 6)
@@ -8083,8 +8090,8 @@
* groups of archives: Options. (line 804)
* H8/300 support: H8/300. (line 6)
* header size: Builtin Functions. (line 191)
* heap size: Options. (line 1844)
* help: Options. (line 1094)
* heap size: Options. (line 1851)
* help: Options. (line 1101)
* HIDDEN: HIDDEN. (line 6)
* holes: Location Counter. (line 12)
* holes, filling: Output Section Data.
@@ -8092,13 +8099,13 @@
* HPPA multiple sub-space stubs: HPPA ELF32. (line 6)
* HPPA stub grouping: HPPA ELF32. (line 12)
* i960 support: i960. (line 6)
* image base: Options. (line 1851)
* image base: Options. (line 1858)
* implicit linker scripts: Implicit Linker Scripts.
(line 6)
* import libraries: WIN32. (line 10)
* INCLUDE FILENAME: File Commands. (line 9)
* including a linker script: File Commands. (line 9)
* including an entire archive: Options. (line 1599)
* including an entire archive: Options. (line 1606)
* incremental link: Options. (line 325)
* INHIBIT_COMMON_ALLOCATION: Miscellaneous Commands.
(line 51)
@@ -8134,14 +8141,14 @@
* ld bugs, reporting: Bug Reporting. (line 6)
* LD_FEATURE(STRING): Miscellaneous Commands.
(line 104)
* ldata segment origin, cmd line: Options. (line 1434)
* ldata segment origin, cmd line: Options. (line 1441)
* LDEMULATION: Environment. (line 21)
* len =: MEMORY. (line 74)
* LENGTH =: MEMORY. (line 74)
* LENGTH(MEMORY): Builtin Functions. (line 140)
* library search path in linker script: File Commands. (line 76)
* link map: Options. (line 402)
* link-time runtime library search path: Options. (line 1288)
* link-time runtime library search path: Options. (line 1295)
* linker crash: Bug Criteria. (line 9)
* linker script concepts: Basic Script Concepts.
(line 6)
@@ -8176,7 +8183,7 @@
* memory regions: MEMORY. (line 6)
* memory regions and sections: Output Section Region.
(line 6)
* memory usage: Options. (line 1106)
* memory usage: Options. (line 1113)
* Merging exidx entries: ARM. (line 221)
* MIN: Builtin Functions. (line 153)
* MIPS microMIPS instruction choice selection: MIPS. (line 6)
@@ -8218,10 +8225,10 @@
* ORIGIN(MEMORY): Builtin Functions. (line 163)
* orphan: Orphan Sections. (line 6)
* orphan sections: Options. (line 606)
* output file after errors: Options. (line 1185)
* output file after errors: Options. (line 1192)
* output file format in linker script: Format Commands. (line 10)
* output file name in linker script: File Commands. (line 66)
* output format: Options. (line 1076)
* output format: Options. (line 1083)
* output section alignment: Forced Output Alignment.
(line 6)
* output section attributes: Output Section Attributes.
@@ -8241,7 +8248,7 @@
* PHDRS: PHDRS. (line 6)
* PIC_VENEER: ARM. (line 172)
* pop state governing input file handling: Options. (line 494)
* position independent executables: Options. (line 1212)
* position independent executables: Options. (line 1219)
* PowerPC ELF32 options: PowerPC ELF32. (line 16)
* PowerPC GOT: PowerPC ELF32. (line 33)
* PowerPC long branches: PowerPC ELF32. (line 6)
@@ -8286,7 +8293,7 @@
* REGION_ALIAS(ALIAS, REGION): REGION_ALIAS. (line 6)
* regions of memory: MEMORY. (line 6)
* relative expressions: Expression Section. (line 6)
* relaxing addressing modes: Options. (line 1226)
* relaxing addressing modes: Options. (line 1233)
* relaxing on H8/300: H8/300. (line 9)
* relaxing on i960: i960. (line 31)
* relaxing on M68HC11: M68HC11/68HC12. (line 12)
@@ -8299,13 +8306,13 @@
* reporting bugs in ld: Reporting Bugs. (line 6)
* requirements for BFD: BFD. (line 16)
* retain relocations in final executable: Options. (line 497)
* retaining specified symbols: Options. (line 1252)
* rodata segment origin, cmd line: Options. (line 1428)
* retaining specified symbols: Options. (line 1259)
* rodata segment origin, cmd line: Options. (line 1435)
* ROM initialized data: Output Section LMA. (line 39)
* round up expression: Builtin Functions. (line 38)
* round up location counter: Builtin Functions. (line 38)
* runtime library name: Options. (line 316)
* runtime library search path: Options. (line 1266)
* runtime library search path: Options. (line 1273)
* runtime pseudo-relocation: WIN32. (line 217)
* scaled integers: Constants. (line 15)
* scommon section: Input Section Common.
@@ -8320,7 +8327,7 @@
(line 6)
* section address in expression: Builtin Functions. (line 17)
* section alignment: Builtin Functions. (line 64)
* section alignment, warnings on: Options. (line 1577)
* section alignment, warnings on: Options. (line 1584)
* section data: Output Section Data.
(line 6)
* section fill pattern: Output Section Fill.
@@ -8340,10 +8347,10 @@
* sections, discarding: Output Section Discarding.
(line 6)
* sections, orphan: Options. (line 606)
* segment origins, cmd line: Options. (line 1417)
* segment origins, cmd line: Options. (line 1424)
* SEGMENT_START(SEGMENT, DEFAULT): Builtin Functions. (line 166)
* segments, ELF: PHDRS. (line 6)
* shared libraries: Options. (line 1345)
* shared libraries: Options. (line 1352)
* SHORT(EXPRESSION): Output Section Data.
(line 6)
* SIZEOF(SECTION): Builtin Functions. (line 175)
@@ -8369,14 +8376,14 @@
* SPU plugins: SPU ELF. (line 6)
* SQUAD(EXPRESSION): Output Section Data.
(line 6)
* stack size: Options. (line 2099)
* stack size: Options. (line 2106)
* standard Unix system: Options. (line 7)
* start of execution: Entry Point. (line 6)
* STARTUP(FILENAME): File Commands. (line 84)
* STM32L4xx erratum workaround: ARM. (line 121)
* strip all symbols: Options. (line 540)
* strip debugger symbols: Options. (line 544)
* stripping all but some symbols: Options. (line 1252)
* stripping all but some symbols: Options. (line 1259)
* STUB_GROUP_SIZE: ARM. (line 177)
* SUBALIGN(SUBSECTION_ALIGN): Forced Input Alignment.
(line 6)
@@ -8388,46 +8395,46 @@
* symbol versions: VERSION. (line 6)
* symbol-only input: Options. (line 529)
* symbolic constants: Symbolic Constants. (line 6)
* symbols, from command line: Options. (line 990)
* symbols, from command line: Options. (line 997)
* symbols, relocatable and absolute: Expression Section. (line 6)
* symbols, require defined: Options. (line 588)
* symbols, retaining selectively: Options. (line 1252)
* synthesizing linker: Options. (line 1226)
* symbols, retaining selectively: Options. (line 1259)
* synthesizing linker: Options. (line 1233)
* synthesizing on H8/300: H8/300. (line 14)
* TARGET(BFDNAME): Format Commands. (line 35)
* TARGET1: ARM. (line 33)
* TARGET2: ARM. (line 38)
* text segment origin, cmd line: Options. (line 1424)
* text segment origin, cmd line: Options. (line 1431)
* thumb entry point: ARM. (line 17)
* TI COFF versions: TI COFF. (line 6)
* traditional format: Options. (line 1396)
* traditional format: Options. (line 1403)
* trampoline generation on M68HC11: M68HC11/68HC12. (line 31)
* trampoline generation on M68HC12: M68HC11/68HC12. (line 31)
* unallocated address, next: Builtin Functions. (line 157)
* undefined symbol: Options. (line 575)
* undefined symbol in linker script: Miscellaneous Commands.
(line 39)
* undefined symbols, warnings on: Options. (line 1573)
* undefined symbols, warnings on: Options. (line 1580)
* uninitialized data placement: Input Section Common.
(line 6)
* unspecified memory: Output Section Data.
(line 39)
* usage: Options. (line 1094)
* usage: Options. (line 1101)
* USE_BLX: ARM. (line 75)
* using a DEF file: WIN32. (line 57)
* using auto-export functionality: WIN32. (line 22)
* Using decorations: WIN32. (line 162)
* variables, defining: Assignments. (line 6)
* verbose[=NUMBER]: Options. (line 1467)
* verbose[=NUMBER]: Options. (line 1474)
* version: Options. (line 641)
* version script: VERSION. (line 6)
* version script, symbol versions: Options. (line 1475)
* version script, symbol versions: Options. (line 1482)
* VERSION {script text}: VERSION. (line 6)
* versions of symbols: VERSION. (line 6)
* VFP11_DENORM_FIX: ARM. (line 84)
* warnings, on combining symbols: Options. (line 1486)
* warnings, on section alignment: Options. (line 1577)
* warnings, on undefined symbols: Options. (line 1573)
* warnings, on combining symbols: Options. (line 1493)
* warnings, on section alignment: Options. (line 1584)
* warnings, on undefined symbols: Options. (line 1580)
* weak externals: WIN32. (line 407)
* what is this?: Overview. (line 6)
* wildcard file name patterns: Input Section Wildcards.
@@ -8442,87 +8449,87 @@
Node: Overview1493
Node: Invocation2607
Node: Options3015
Node: Environment103651
Node: Scripts105411
Node: Basic Script Concepts107145
Node: Script Format109853
Node: Simple Example110716
Node: Simple Commands113812
Node: Entry Point114318
Node: File Commands115251
Node: Format Commands119371
Node: REGION_ALIAS121327
Node: Miscellaneous Commands126159
Node: Assignments130783
Node: Simple Assignments131294
Node: HIDDEN133029
Node: PROVIDE133659
Node: PROVIDE_HIDDEN134852
Node: Source Code Reference135096
Node: SECTIONS139012
Node: Output Section Description140903
Node: Output Section Name142147
Node: Output Section Address143023
Node: Input Section145258
Node: Input Section Basics146059
Node: Input Section Wildcards149965
Node: Input Section Common155172
Node: Input Section Keep156654
Node: Input Section Example157144
Node: Output Section Data158112
Node: Output Section Keywords160889
Node: Output Section Discarding164458
Node: Output Section Attributes165951
Node: Output Section Type167052
Node: Output Section LMA168123
Node: Forced Output Alignment171194
Node: Forced Input Alignment171624
Node: Output Section Constraint172013
Node: Output Section Region172441
Node: Output Section Phdr172874
Node: Output Section Fill173538
Node: Overlay Description174680
Node: MEMORY179126
Node: PHDRS183503
Node: VERSION188757
Node: Expressions196850
Node: Constants197779
Node: Symbolic Constants198654
Node: Symbols199205
Node: Orphan Sections199952
Node: Location Counter201289
Node: Operators205725
Node: Evaluation206647
Node: Expression Section208011
Node: Builtin Functions211875
Node: Implicit Linker Scripts220115
Node: Machine Dependent220890
Node: H8/300222014
Node: i960224076
Node: M68HC11/68HC12225772
Node: ARM227214
Node: HPPA ELF32238234
Node: M68K239857
Node: MIPS240766
Node: MMIX241290
Node: MSP430242455
Node: NDS32243495
Node: Nios II244461
Node: PowerPC ELF32245777
Node: PowerPC64 ELF64248608
Node: SPU ELF255940
Node: TI COFF258572
Node: WIN32259098
Node: Xtensa279224
Node: BFD282189
Node: BFD outline283644
Node: BFD information loss284930
Node: Canonical format287447
Node: Reporting Bugs291804
Node: Bug Criteria292498
Node: Bug Reporting293197
Node: MRI300236
Node: GNU Free Documentation License304879
Node: LD Index330035
Node: Environment104154
Node: Scripts105914
Node: Basic Script Concepts107648
Node: Script Format110356
Node: Simple Example111219
Node: Simple Commands114315
Node: Entry Point114821
Node: File Commands115754
Node: Format Commands119874
Node: REGION_ALIAS121830
Node: Miscellaneous Commands126662
Node: Assignments131286
Node: Simple Assignments131797
Node: HIDDEN133532
Node: PROVIDE134162
Node: PROVIDE_HIDDEN135355
Node: Source Code Reference135599
Node: SECTIONS139515
Node: Output Section Description141406
Node: Output Section Name142650
Node: Output Section Address143526
Node: Input Section145761
Node: Input Section Basics146562
Node: Input Section Wildcards150468
Node: Input Section Common155675
Node: Input Section Keep157157
Node: Input Section Example157647
Node: Output Section Data158615
Node: Output Section Keywords161392
Node: Output Section Discarding164961
Node: Output Section Attributes166454
Node: Output Section Type167555
Node: Output Section LMA168626
Node: Forced Output Alignment171697
Node: Forced Input Alignment172127
Node: Output Section Constraint172516
Node: Output Section Region172944
Node: Output Section Phdr173377
Node: Output Section Fill174041
Node: Overlay Description175183
Node: MEMORY179629
Node: PHDRS184006
Node: VERSION189260
Node: Expressions197353
Node: Constants198282
Node: Symbolic Constants199157
Node: Symbols199708
Node: Orphan Sections200455
Node: Location Counter201792
Node: Operators206228
Node: Evaluation207150
Node: Expression Section208514
Node: Builtin Functions212378
Node: Implicit Linker Scripts220618
Node: Machine Dependent221393
Node: H8/300222517
Node: i960224579
Node: M68HC11/68HC12226275
Node: ARM227717
Node: HPPA ELF32238737
Node: M68K240360
Node: MIPS241269
Node: MMIX241793
Node: MSP430242958
Node: NDS32243998
Node: Nios II244964
Node: PowerPC ELF32246280
Node: PowerPC64 ELF64249111
Node: SPU ELF256443
Node: TI COFF259075
Node: WIN32259601
Node: Xtensa279727
Node: BFD282692
Node: BFD outline284147
Node: BFD information loss285433
Node: Canonical format287950
Node: Reporting Bugs292307
Node: Bug Criteria293001
Node: Bug Reporting293700
Node: MRI300739
Node: GNU Free Documentation License305382
Node: LD Index330538
End Tag Table
@@ -1325,15 +1325,21 @@
When creating a shared library, bind references to global symbols to the
definition within the shared library, if any. Normally, it is possible
for a program linked against a shared library to override the definition
within the shared library. This option is only meaningful on ELF
platforms which support shared libraries.
within the shared library. This option can also be used with the
@option{--export-dynamic} option, when creating a position independent
executable, to bind references to global symbols to the definition within
the executable. This option is only meaningful on ELF platforms which
support shared libraries and position independent executables.
@kindex -Bsymbolic-functions
@item -Bsymbolic-functions
When creating a shared library, bind references to global function
symbols to the definition within the shared library, if any.
This option can also be used with the @option{--export-dynamic} option,
when creating a position independent executable, to bind references
to global function symbols to the definition within the executable.
This option is only meaningful on ELF platforms which support shared
libraries.
libraries and position independent executables.
@kindex --dynamic-list=@var{dynamic-list-file}
@item --dynamic-list=@var{dynamic-list-file}
@@ -1586,15 +1586,14 @@
/* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data,
--dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and
--dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are
for shared libraries. -Bsymbolic overrides all others and vice
versa. */
for PIC outputs. -Bsymbolic overrides all others and vice versa. */
switch (command_line.symbolic)
{
case symbolic_unset:
break;
case symbolic:
if (bfd_link_dll (&link_info))
if (bfd_link_pic (&link_info))
{
link_info.symbolic = TRUE;
@@ -1603,8 +1602,8 @@
}
break;
case symbolic_functions:
if (bfd_link_dll (&link_info))
if (bfd_link_pic (&link_info))
command_line.dynamic_list = dynamic_list_data;
break;
}
@@ -1,3 +1,58 @@
2016-06-29 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-06-23 Peter Bergner <bergner@vnet.ibm.com>
Apply from master.
2016-06-22 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines.
(powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni,
mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool,
xor3>: New mnemonics.
<setb>: Change to a VX form instruction.
(insert_sh6): Add support for rldixor.
(extract_sh6): Likewise.
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
Backport from master
2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
PR binutils/20196
* ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
opcodes for E6500.
2016-06-01 Peter Bergner <bergner@vnet.ibm.com>
Backport from master
2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (CY): New define. Document it.
(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
2016-02-26 Alan Modra <amodra@gmail.com>
Apply from master.
2015-12-12 Alan Modra <amodra@gmail.com>
PR 19359
* ppc-opc.c (insert_fxm): Remove "ignored" from error message.
(powerpc_opcodes): Remove single-operand mfcr.
2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Parenthesize expression to prevent
truncated addresses.
(OP_J): Likewise.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -810,7 +865,7 @@
2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
* opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
* i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
direct branch.
(jmp): Likewise.
* i386-tbl.h: Regenerated.
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.64 for opcodes 2.26.
# Generated by GNU Autoconf 2.64 for opcodes 2.26.1.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@
# Identity of this package.
PACKAGE_NAME='opcodes'
PACKAGE_TARNAME='opcodes'
PACKAGE_VERSION='2.26'
PACKAGE_STRING='opcodes 2.26'
PACKAGE_VERSION='2.26.1'
PACKAGE_STRING='opcodes 2.26.1'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1319,7 +1319,7 @@
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures opcodes 2.26 to adapt to many kinds of systems.
\`configure' configures opcodes 2.26.1 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1390,7 +1390,7 @@
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of opcodes 2.26:";;
short | recursive ) echo "Configuration of opcodes 2.26.1:";;
esac
cat <<\_ACEOF
@@ -1497,7 +1497,7 @@
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
opcodes configure 2.26
opcodes configure 2.26.1
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1907,7 +1907,7 @@
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by opcodes $as_me 2.26, which was
It was created by opcodes $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3715,7 +3715,7 @@
# Define the identity of the package.
PACKAGE='opcodes'
VERSION='2.26'
VERSION='2.26.1'
cat >>confdefs.h <<_ACEOF
@@ -13223,7 +13223,7 @@
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by opcodes $as_me 2.26, which was
This file was extended by opcodes $as_me 2.26.1, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -13287,7 +13287,7 @@
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
opcodes config.status 2.26
opcodes config.status 2.26.1
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
@@ -13644,7 +13644,7 @@
if (op_index[i] != -1 && op_riprel[i])
{
(*info->fprintf_func) (info->stream, " # ");
(*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
(*info->print_address_func) ((bfd_vma) (start_pc + (codep - start_codep)
+ op_address[op_index[i]]), info);
break;
}
@@ -16158,7 +16158,7 @@
the displacement is added! */
mask = 0xffff;
if ((prefixes & PREFIX_DATA) == 0)
segment = ((start_pc + codep - start_codep)
segment = ((start_pc + (codep - start_codep))
& ~((bfd_vma) 0xffff));
}
if (address_mode != mode_64bit
@@ -238,7 +238,11 @@
#define BOE BO + 1
{ 0x1e, 21, insert_boe, extract_boe, 0 },
#define BH BOE + 1
#define RM BOE + 1
{ 0x3, 11, NULL, NULL, 0 },
#define BH RM + 1
{ 0x3, 11, NULL, NULL, PPC_OPERAND_OPTIONAL },
@@ -778,8 +782,9 @@
#define EVUIMM_8 EVUIMM_4 + 1
{ 0xf8, 8, NULL, NULL, PPC_OPERAND_PARENS },
#define WS EVUIMM_8 + 1
#define DRM WS
{ 0x7, 11, NULL, NULL, 0 },
@@ -807,7 +812,9 @@
#define X_R A_L
{ 0x1, 16, NULL, NULL, PPC_OPERAND_OPTIONAL },
#define RMC A_L + 1
#define CY RMC
{ 0x3, 9, NULL, NULL, 0 },
#define R RMC + 1
@@ -1434,7 +1441,7 @@
/* A value of -1 means we used the one operand form of
mfcr which is valid. */
if (value != -1)
*errmsg = _("ignoring invalid mfcr mask");
*errmsg = _("invalid mfcr mask");
value = 0;
}
@@ -2007,7 +2014,11 @@
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
if (PPC_OP (insn) == 4)
return insn | ((value & 0x1f) << 6) | ((value & 0x20) >> 5);
else
return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
}
static long
@@ -2015,7 +2026,11 @@
ppc_cpu_t dialect ATTRIBUTE_UNUSED,
int *invalid ATTRIBUTE_UNUSED)
{
return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
if (PPC_OP (insn) == 4)
return ((insn >> 6) & 0x1f) | ((insn << 5) & 0x20);
else
return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
}
/* The SPR field in an XFX form instruction. This is flipped--the
@@ -2598,6 +2613,9 @@
#define VXVA(op, xop, vaop) (VX(op,xop) | (((vaop) & 0x1f) << 16))
#define VXASH(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1))
#define VXASH_MASK VXASH (0x3f, 0x1f)
#define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1))
@@ -2634,6 +2652,9 @@
#define XVARC(op, xop, vaop, rc) (XVA ((op), (xop), (vaop)) | ((rc) & 1))
#define XMMF(op, xop, mop0, mop1) (X ((op), (xop)) | ((mop0) & 3) << 19 | ((mop1) & 7) << 16)
#define ZRC(op, xop, rc) (Z ((op), (xop)) | ((rc) & 1))
@@ -2685,6 +2706,9 @@
#define XWC_MASK (XRC (0x3f, 0x3ff, 1) | (7 << 23) | RA_MASK | RB_MASK)
#define XMMF_MASK (XMMF (0x3f, 0x3ff, 3, 7) | (1))
#define Z_MASK ZRC (0x3f, 0x1ff, 1)
@@ -3130,6 +3154,7 @@
{"machhwu.", XO (4, 12,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_muls1", A (4, 13,0), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
{"ps_muls1.", A (4, 13,1), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
{"rldixor", VXASH(4,26), VXASH_MASK, POWER9, PPCNONE, {RA, RS, SH6, RB}},
{"ps_madds0", A (4, 14,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_madds0.", A (4, 14,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_madds1", A (4, 15,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
@@ -3137,6 +3162,7 @@
{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}},
{"ps_div", A (4, 18,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_div.", A (4, 18,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
@@ -3175,6 +3201,8 @@
{"ps_nmadd", A (4, 31,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_nmadd.", A (4, 31,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, PPCNONE, {BF, FRA, FRB}},
{"xor3", VXA(4, 54), VXA_MASK, POWER9, PPCNONE, {RA, RS, RB, RC}},
{"nandxor", VXA(4, 55), VXA_MASK, POWER9, PPCNONE, {RA, RS, RB, RC}},
{"vpermr", VXA(4, 59), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}},
{"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}},
{"vaddecuq", VXA(4, 61), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}},
@@ -4742,8 +4770,7 @@
{"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}},
{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}},
{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}},
{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}},
{"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
@@ -4814,7 +4841,7 @@
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
{"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}},
{"lbarx", X(31,52), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"lbarx", X(31,52), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"ldux", X(31,53), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}},
@@ -4894,7 +4921,7 @@
{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
{"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}},
{"lharx", X(31,116), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"lharx", X(31,116), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}},
@@ -4909,7 +4936,8 @@
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}},
{"setb", X(31,128), XRB_MASK|(3<<16), POWER9, PPCNONE, {RT, BFA}},
{"setb", VX(31,256), VXVB_MASK|(3<<16), POWER9, PPCNONE, {RT, BFA}},
{"setbool", VX(31,257), VXVB_MASK, POWER9, PPCNONE, {RT, BA}},
{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {RS}},
@@ -4959,6 +4987,8 @@
{"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2|PPC476, PPCNONE, {RA, RS}},
{"brw", X(31,155), XRB_MASK, POWER9, PPCNONE, {RA, RS}},
{"stdepx", X(31,157), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}},
{"stwepx", X(31,159), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}},
@@ -4970,6 +5000,9 @@
{"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA0, RB}},
{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
{"addex", ZRC(31,170,0), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
{"addex.", ZRC(31,170,1), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
{"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}},
{"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
@@ -4992,6 +5025,8 @@
{"sliq.", XRC(31,184,1), X_MASK, M601, PPCNONE, {RA, RS, SH}},
{"prtyd", X(31,186), XRB_MASK, POWER6|PPCA2, PPCNONE, {RA, RS}},
{"brd", X(31,187), XRB_MASK, POWER9, PPCNONE, {RA, RS}},
{"cmprb", X(31,192), XCMP_MASK, POWER9, PPCNONE, {BF, L, RA, RB}},
@@ -5031,6 +5066,8 @@
{"sleq", XRC(31,217,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"sleq.", XRC(31,217,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"brh", X(31,219), XRB_MASK, POWER9, PPCNONE, {RA, RS}},
{"stbepx", X(31,223), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}},
{"cmpeqb", X(31,224), XCMPL_MASK, POWER9, PPCNONE, {BF, RA, RB}},
@@ -5497,6 +5534,8 @@
{"mtvsrdd", X(31,435), XX1_MASK, PPCVSX3, PPCNONE, {XT6, RA0, RB}},
{"lwzmx", X(31,437), X_MASK, POWER9, PPCNONE, {RT, RA0, RB}},
{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
{"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
@@ -5939,7 +5978,7 @@
{"tendall.", XRC(31,686,1)|(1<<25), XRTRARB_MASK, PPCHTM, PPCNONE, {0}},
{"tend.", XRC(31,686,1), XRTARARB_MASK, PPCHTM, PPCNONE, {HTM_A}},
{"stbcx.", XRC(31,694,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
{"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}},
{"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
@@ -5971,7 +6010,7 @@
{"stswi", X(31,725), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, NB}},
{"stsi", X(31,725), X_MASK, PWRCOM, PPCNONE, {RS, RA0, NB}},
{"sthcx.", XRC(31,726,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
{"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}},
{"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
@@ -6899,6 +6938,13 @@
{"mffs", XRC(63,583,0), XRARB_MASK, COM, PPCEFS, {FRT}},
{"mffs.", XRC(63,583,1), XRARB_MASK, COM, PPCEFS, {FRT}},
{"mffsce", XMMF(63,583,0,1), XMMF_MASK|RB_MASK, POWER9, PPCNONE, {FRT}},
{"mffscdrn", XMMF(63,583,2,4), XMMF_MASK, POWER9, PPCNONE, {FRT, FRB}},
{"mffscdrni", XMMF(63,583,2,5), XMMF_MASK|(3<<14), POWER9, PPCNONE, {FRT, DRM}},
{"mffscrn", XMMF(63,583,2,6), XMMF_MASK, POWER9, PPCNONE, {FRT, FRB}},
{"mffscrni", XMMF(63,583,2,7), XMMF_MASK|(7<<13), POWER9, PPCNONE, {FRT, RM}},
{"mffsl", XMMF(63,583,3,0), XMMF_MASK|RB_MASK, POWER9, PPCNONE, {FRT}},
{"dcmpuq", X(63,642), X_MASK, POWER6, PPCNONE, {BF, FRAp, FRBp}},
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "ADDR2LINE 1"
.TH ADDR2LINE 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH ADDR2LINE 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "AR 1"
.TH AR 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH AR 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -1627,7 +1627,7 @@
`--compress-debug-sections=zlib-gabi'
For ELF files, these options control how DWARF debug sections are
compressed. `--compress-debug-sections=none' is equivalent to
`--nocompress-debug-sections'. `--compress-debug-sections=zlib'
`--decompress-debug-sections'. `--compress-debug-sections=zlib'
and `--compress-debug-sections=zlib-gabi' are equivalent to
`--compress-debug-sections'. `--compress-debug-sections=zlib-gnu'
compresses DWARF debug sections using zlib. The debug sections
@@ -1872,7 +1872,7 @@
@itemx --compress-debug-sections=zlib-gabi
For ELF files, these options control how DWARF debug sections are
compressed. @option{--compress-debug-sections=none} is equivalent
to @option{--nocompress-debug-sections}.
to @option{--decompress-debug-sections}.
@option{--compress-debug-sections=zlib} and
@option{--compress-debug-sections=zlib-gabi} are equivalent to
@option{--compress-debug-sections}.
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "C++FILT 1"
.TH C++FILT 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH C++FILT 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "DLLTOOL 1"
.TH DLLTOOL 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH DLLTOOL 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "NLMCONV 1"
.TH NLMCONV 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH NLMCONV 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "NM 1"
.TH NM 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH NM 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "OBJCOPY 1"
.TH OBJCOPY 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH OBJCOPY 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -1070,7 +1070,7 @@
.PD
For \s-1ELF\s0 files, these options control how \s-1DWARF\s0 debug sections are
compressed. \fB\-\-compress\-debug\-sections=none\fR is equivalent
to \fB\-\-nocompress\-debug\-sections\fR.
to \fB\-\-decompress\-debug\-sections\fR.
\&\fB\-\-compress\-debug\-sections=zlib\fR and
\&\fB\-\-compress\-debug\-sections=zlib\-gabi\fR are equivalent to
\&\fB\-\-compress\-debug\-sections\fR.
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "OBJDUMP 1"
.TH OBJDUMP 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH OBJDUMP 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "RANLIB 1"
.TH RANLIB 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH RANLIB 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "READELF 1"
.TH READELF 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH READELF 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "SIZE 1"
.TH SIZE 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH SIZE 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "STRINGS 1"
.TH STRINGS 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH STRINGS 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "STRIP 1"
.TH STRIP 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH STRIP 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "WINDMC 1"
.TH WINDMC 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH WINDMC 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "WINDRES 1"
.TH WINDRES 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH WINDRES 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -90,7 +90,7 @@
* binutils-all/localize-hidden-1.d: Allow for extra symbols in the
output.
* binutils-all/strip-11.d: Skip for the RL78.
* binutils-all/strip-11.d: Skip for the RL78.
2015-07-14 H.J. Lu <hongjiu.lu@intel.com>
@@ -98,9 +98,9 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/18656
* binutils-all/compress.exp (convert_test): New proc.
Run conversion tests between x86-64 and x32.
PR binutils/18656
* binutils-all/compress.exp (convert_test): New proc.
Run conversion tests between x86-64 and x32.
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
@@ -1747,6 +1747,7 @@
case OPTION_RTSC:
case OPTION_FPUDA:
break;
default:
return 0;
@@ -552,6 +552,10 @@
specified explicitly. */
static int omit_lock_prefix = 0;
static int generate_relax_relocations
= DEFAULT_GENERATE_X86_RELAX_RELOCATIONS;
static enum check_kind
{
check_none = 0,
@@ -1870,6 +1874,9 @@
if (r->reg_flags & RegRex)
nr += 8;
if (r->reg_flags & RegVRex)
nr += 16;
return nr;
}
@@ -4557,7 +4564,9 @@
&& i.op[op].disps->X_op == O_constant)
{
offsetT value = i.op[op].disps->X_add_number;
int vec_disp8_ok = fits_in_vec_disp8 (value);
int vec_disp8_ok
= (i.disp_encoding != disp_encoding_32bit
&& fits_in_vec_disp8 (value));
if (t->operand_types [op].bitfield.vec_disp8)
{
if (vec_disp8_ok)
@@ -7241,9 +7250,14 @@
/* Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop
is one of adc, add, and, cmp, or, sbb, sub, xor
instructions. */
if ((i.rm.mode == 2
|| (i.rm.mode == 0 && i.rm.regmem == 5))
instructions. Always generate R_386_GOT32X for
"sym*GOT" operand in 32-bit mode. */
if ((generate_relax_relocations
|| (!object_64bit
&& i.rm.mode == 0
&& i.rm.regmem == 5))
&& (i.rm.mode == 2
|| (i.rm.mode == 0 && i.rm.regmem == 5))
&& ((i.operands == 1
&& i.tm.base_opcode == 0xff
&& (i.rm.reg == 2 || i.rm.reg == 4))
@@ -9616,6 +9630,7 @@
#define OPTION_MSHARED (OPTION_MD_BASE + 21)
#define OPTION_MAMD64 (OPTION_MD_BASE + 22)
#define OPTION_MINTEL64 (OPTION_MD_BASE + 23)
#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 24)
struct option md_longopts[] =
{
@@ -9647,6 +9662,7 @@
{"mbig-obj", no_argument, NULL, OPTION_MBIG_OBJ},
#endif
{"momit-lock-prefix", required_argument, NULL, OPTION_OMIT_LOCK_PREFIX},
{"mrelax-relocations", required_argument, NULL, OPTION_MRELAX_RELOCATIONS},
{"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG},
{"mamd64", no_argument, NULL, OPTION_MAMD64},
{"mintel64", no_argument, NULL, OPTION_MINTEL64},
@@ -9964,6 +9980,15 @@
omit_lock_prefix = 0;
else
as_fatal (_("invalid -momit-lock-prefix= option: `%s'"), arg);
break;
case OPTION_MRELAX_RELOCATIONS:
if (strcasecmp (arg, "yes") == 0)
generate_relax_relocations = 1;
else if (strcasecmp (arg, "no") == 0)
generate_relax_relocations = 0;
else
as_fatal (_("invalid -mrelax-relocations= option: `%s'"), arg);
break;
case OPTION_MAMD64:
@@ -10145,6 +10170,9 @@
fprintf (stream, _("\
-momit-lock-prefix=[no|yes]\n\
strip all lock prefixes\n"));
fprintf (stream, _("\
-mrelax-relocations=[no|yes]\n\
generate relax relocations\n"));
fprintf (stream, _("\
-mamd64 accept only AMD64 ISA\n"));
fprintf (stream, _("\
@@ -15506,10 +15506,29 @@
static struct mips_option_stack *mips_opts_stack;
static bfd_boolean
enum code_option_type
{
OPTION_TYPE_BAD = -1,
OPTION_TYPE_NORMAL,
OPTION_TYPE_ISA
};
/* Handle common .set/.module options. Return status indicating option
type. */
static enum code_option_type
parse_code_option (char * name)
{
bfd_boolean isa_set = FALSE;
const struct mips_ase *ase;
if (strncmp (name, "at=", 3) == 0)
{
char *s = name + 3;
@@ -15582,6 +15601,7 @@
{
mips_opts.arch = p->cpu;
mips_opts.isa = p->isa;
isa_set = TRUE;
}
}
else if (strncmp (name, "mips", 4) == 0)
@@ -15595,6 +15615,7 @@
{
mips_opts.arch = p->cpu;
mips_opts.isa = p->isa;
isa_set = TRUE;
}
}
else
@@ -15613,8 +15634,9 @@
else if (strcmp (name, "nosym32") == 0)
mips_opts.sym32 = FALSE;
else
return FALSE;
return TRUE;
return OPTION_TYPE_BAD;
return isa_set ? OPTION_TYPE_ISA : OPTION_TYPE_NORMAL;
}
@@ -15622,8 +15644,8 @@
static void
s_mipsset (int x ATTRIBUTE_UNUSED)
{
enum code_option_type type = OPTION_TYPE_NORMAL;
char *name = input_line_pointer, ch;
int prev_isa = mips_opts.isa;
file_mips_check_options ();
@@ -15699,13 +15721,17 @@
mips_opts_stack = s->next;
free (s);
}
}
else
{
type = parse_code_option (name);
if (type == OPTION_TYPE_BAD)
as_warn (_("tried to set unrecognized symbol: %s\n"), name);
}
else if (!parse_code_option (name))
as_warn (_("tried to set unrecognized symbol: %s\n"), name);
/* The use of .set [arch|cpu]= historically 'fixes' the width of gp and fp
registers based on what is supported by the arch/cpu. */
if (mips_opts.isa != prev_isa)
if (type == OPTION_TYPE_ISA)
{
switch (mips_opts.isa)
{
@@ -15772,7 +15798,7 @@
if (!file_mips_opts_checked)
{
if (!parse_code_option (name))
if (parse_code_option (name) == OPTION_TYPE_BAD)
as_bad (_(".module used with unrecognized symbol: %s\n"), name);
@@ -133,7 +133,7 @@
.\" ========================================================================
.\"
.IX Title "AS 1"
.TH AS 1 "2016-01-25" "binutils-2.26" "GNU Development Tools"
.TH AS 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
.\" way too many mistakes in technical documents.
.if n .ad l
@@ -1274,6 +1274,19 @@
\&\fB\-momit\-lock\-prefix=\fR\fIyes\fR will omit all lock prefixes.
\&\fB\-momit\-lock\-prefix=\fR\fIno\fR will encode lock prefix as usual,
which is the default.
.IP "\fB\-mrelax\-relocations=\fR\fIno\fR" 4
.IX Item "-mrelax-relocations=no"
.PD 0
.IP "\fB\-mrelax\-relocations=\fR\fIyes\fR" 4
.IX Item "-mrelax-relocations=yes"
.PD
These options control whether the assembler should generate relax
relocations, R_386_GOT32X, in 32\-bit mode, or R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX, in 64\-bit mode.
\&\fB\-mrelax\-relocations=\fR\fIyes\fR will generate relax relocations.
\&\fB\-mrelax\-relocations=\fR\fIno\fR will not generate relax
relocations. The default can be controlled by a configure option
\&\fB\-\-enable\-x86\-relax\-relocations\fR.
.IP "\fB\-mevexrcig=\fR\fIrne\fR" 4
.IX Item "-mevexrcig=rne"
.PD 0
@@ -10710,6 +10710,16 @@
omit all lock prefixes. `-momit-lock-prefix=NO' will encode lock
prefix as usual, which is the default.
`-mrelax-relocations=NO'
`-mrelax-relocations=YES'
These options control whether the assembler should generate relax
relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX
and R_X86_64_REX_GOTPCRELX, in 64-bit mode.
`-mrelax-relocations=YES' will generate relax relocations.
`-mrelax-relocations=NO' will not generate relax relocations. The
default can be controlled by a configure option
`--enable-x86-relax-relocations'.
`-mevexrcig=RNE'
`-mevexrcig=RD'
`-mevexrcig=RU'
@@ -24009,11 +24019,11 @@
* #: Comments. (line 33)
* #APP: Preprocessing. (line 27)
* #NO_APP: Preprocessing. (line 27)
* $ in symbol names <1>: D10V-Chars. (line 53)
* $ in symbol names <2>: Meta-Chars. (line 10)
* $ in symbol names <3>: SH64-Chars. (line 15)
* $ in symbol names <4>: SH-Chars. (line 15)
* $ in symbol names: D30V-Chars. (line 70)
* $ in symbol names <1>: SH64-Chars. (line 15)
* $ in symbol names <2>: SH-Chars. (line 15)
* $ in symbol names <3>: D30V-Chars. (line 70)
* $ in symbol names <4>: Meta-Chars. (line 10)
* $ in symbol names: D10V-Chars. (line 53)
* $a: ARM Mapping Symbols. (line 9)
* $acos math builtin, TIC54X: TIC54X-Builtins. (line 10)
* $asin math builtin, TIC54X: TIC54X-Builtins. (line 13)
@@ -24198,8 +24208,8 @@
* -EL option, TILE-Gx: TILE-Gx Options. (line 11)
* -f: f. (line 6)
* -F command line option, Alpha: Alpha Options. (line 57)
* -g command line option, Alpha: Alpha Options. (line 47)
* -G command line option, Alpha: Alpha Options. (line 53)
* -g command line option, Alpha: Alpha Options. (line 47)
* -G option (MIPS): MIPS Options. (line 8)
* -h option, VAX/VMS: VAX-Opts. (line 45)
* -H option, VAX/VMS: VAX-Opts. (line 81)
@@ -24271,7 +24281,7 @@
* -mall-enabled command line option, LM32: LM32 Options. (line 30)
* -mall-extensions: PDP-11-Options. (line 26)
* -mall-opcodes command line option, AVR: AVR Options. (line 109)
* -mamd64 option, x86-64: i386-Options. (line 165)
* -mamd64 option, x86-64: i386-Options. (line 175)
* -mapcs-26 command line option, ARM: ARM Options. (line 134)
* -mapcs-32 command line option, ARM: ARM Options. (line 134)
* -mapcs-float command line option, ARM: ARM Options. (line 148)
@@ -24317,8 +24327,8 @@
* -mesa option, s390: s390 Options. (line 17)
* -mevexlig= option, i386: i386-Options. (line 94)
* -mevexlig= option, x86-64: i386-Options. (line 94)
* -mevexrcig= option, i386: i386-Options. (line 155)
* -mevexrcig= option, x86-64: i386-Options. (line 155)
* -mevexrcig= option, i386: i386-Options. (line 165)
* -mevexrcig= option, x86-64: i386-Options. (line 165)
* -mevexwig= option, i386: i386-Options. (line 104)
* -mevexwig= option, x86-64: i386-Options. (line 104)
* -mf option, far-mode: TIC54X-Opts. (line 8)
@@ -24337,7 +24347,7 @@
* -micache-enabled command line option, LM32: LM32 Options. (line 21)
* -mimplicit-it command line option, ARM: ARM Options. (line 118)
* -mint-register: RX-Opts. (line 57)
* -mintel64 option, x86-64: i386-Options. (line 165)
* -mintel64 option, x86-64: i386-Options. (line 175)
* -mip2022 option, IP2K: IP2K-Opts. (line 14)
* -mip2022ext option, IP2022: IP2K-Opts. (line 9)
* -mj11: PDP-11-Options. (line 126)
@@ -24356,10 +24366,10 @@
* -mlimited-eis: PDP-11-Options. (line 64)
* -mlink-relax command line option, AVR: AVR Options. (line 121)
* -mlittle-endian: RX-Opts. (line 26)
* -mlong <1>: XGATE-Opts. (line 13)
* -mlong: M68HC11-Opts. (line 45)
* -mlong-double <1>: XGATE-Opts. (line 21)
* -mlong-double: M68HC11-Opts. (line 53)
* -mlong <1>: M68HC11-Opts. (line 45)
* -mlong: XGATE-Opts. (line 13)
* -mlong-double <1>: M68HC11-Opts. (line 53)
* -mlong-double: XGATE-Opts. (line 21)
* -mm9s12x: M68HC11-Opts. (line 27)
* -mm9s12xg: M68HC11-Opts. (line 32)
* -mmcu= command line option, AVR: AVR Options. (line 6)
@@ -24409,6 +24419,8 @@
* -mpid= command line option, TIC6X: TIC6X Options. (line 23)
* -mregnames option, s390: s390 Options. (line 33)
* -mrelax command line option, V850: V850 Options. (line 72)
* -mrelax-relocations= option, i386: i386-Options. (line 155)
* -mrelax-relocations= option, x86-64: i386-Options. (line 155)
* -mrh850-abi command line option, V850: V850 Options. (line 82)
* -mrmw command line option, AVR: AVR Options. (line 118)
* -mrx-abi: RX-Opts. (line 69)
@@ -24474,8 +24486,8 @@
* -relax command line option, Alpha: Alpha Options. (line 32)
* -replace command line option, Alpha: Alpha Options. (line 40)
* -S, ignored on VAX: VAX-Opts. (line 11)
* -t, ignored on VAX: VAX-Opts. (line 36)
* -T, ignored on VAX: VAX-Opts. (line 11)
* -t, ignored on VAX: VAX-Opts. (line 36)
* -v: v. (line 6)
* -V, redundant on VAX: VAX-Opts. (line 22)
* -version: v. (line 6)
@@ -25243,8 +25255,8 @@
* float directive, XGATE: XGATE-Float. (line 10)
* floating point numbers: Flonums. (line 6)
* floating point numbers (double): Double. (line 6)
* floating point numbers (single) <1>: Float. (line 6)
* floating point numbers (single): Single. (line 6)
* floating point numbers (single) <1>: Single. (line 6)
* floating point numbers (single): Float. (line 6)
* floating point, AArch64 (IEEE): AArch64 Floating Point.
(line 6)
* floating point, Alpha (IEEE): Alpha Floating Point.
@@ -25468,7 +25480,7 @@
* Interrupt Vector Base address, ARC: ARC-Regs. (line 67)
* invalid input: Bug Criteria. (line 14)
* invocation summary: Overview. (line 6)
* IP2K architecture options: IP2K-Opts. (line 14)
* IP2K architecture options: IP2K-Opts. (line 9)
* IP2K line comment character: IP2K-Chars. (line 6)
* IP2K line separator: IP2K-Chars. (line 14)
* IP2K options: IP2K-Opts. (line 6)
@@ -25496,8 +25508,8 @@
* label (:): Statements. (line 31)
* label directive, TIC54X: TIC54X-Directives. (line 123)
* labels: Labels. (line 6)
* lcomm directive <1>: Lcomm. (line 6)
* lcomm directive: ARC Directives. (line 9)
* lcomm directive <1>: ARC Directives. (line 9)
* lcomm directive: Lcomm. (line 6)
* lcomm directive, COFF: i386-Directives. (line 6)
* lcommon directive: ARC Directives. (line 24)
* ld: Object. (line 15)
@@ -26227,11 +26239,11 @@
* section directive, V850: V850 Directives. (line 9)
* section name substitution: Section. (line 80)
* section override prefixes, i386: i386-Prefixes. (line 23)
* Section Stack <1>: PopSection. (line 6)
* Section Stack <2>: Previous. (line 6)
* Section Stack <3>: PushSection. (line 6)
* Section Stack <1>: PushSection. (line 6)
* Section Stack <2>: Section. (line 71)
* Section Stack <3>: Previous. (line 6)
* Section Stack <4>: SubSection. (line 6)
* Section Stack: Section. (line 71)
* Section Stack: PopSection. (line 6)
* section-relative addressing: Secs Background. (line 68)
* sections: Sections. (line 6)
* sections in messages, internal: As Sections. (line 6)
@@ -26417,17 +26429,17 @@
* symbol attributes, SOM: SOM Symbols. (line 6)
* symbol descriptor, COFF: Desc. (line 6)
* symbol modifiers <1>: M32C-Modifiers. (line 11)
* symbol modifiers <2>: LM32-Modifiers. (line 12)
* symbol modifiers <2>: M68HC11-Modifiers. (line 12)
* symbol modifiers <3>: AVR-Modifiers. (line 12)
* symbol modifiers: M68HC11-Modifiers. (line 12)
* symbol modifiers: LM32-Modifiers. (line 12)
* symbol modifiers, TILE-Gx: TILE-Gx Modifiers. (line 6)
* symbol modifiers, TILEPro: TILEPro Modifiers. (line 6)
* symbol names: Symbol Names. (line 6)
* symbol names, $ in <1>: Meta-Chars. (line 10)
* symbol names, $ in <2>: D30V-Chars. (line 70)
* symbol names, $ in <3>: D10V-Chars. (line 53)
* symbol names, $ in <4>: SH-Chars. (line 15)
* symbol names, $ in: SH64-Chars. (line 15)
* symbol names, $ in <1>: D30V-Chars. (line 70)
* symbol names, $ in <2>: SH64-Chars. (line 15)
* symbol names, $ in <3>: Meta-Chars. (line 10)
* symbol names, $ in <4>: D10V-Chars. (line 53)
* symbol names, $ in: SH-Chars. (line 15)
* symbol names, local: Symbol Names. (line 30)
* symbol names, temporary: Symbol Names. (line 43)
* symbol prefix character, ARC: ARC-Chars. (line 20)
@@ -26458,8 +26470,8 @@
* syntax, D30V: D30V-Syntax. (line 6)
* syntax, LM32: LM32-Modifiers. (line 6)
* syntax, M680x0: M68K-Syntax. (line 8)
* syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6)
* syntax, M68HC11: M68HC11-Syntax. (line 6)
* syntax, M68HC11 <1>: M68HC11-Syntax. (line 6)
* syntax, M68HC11: M68HC11-Modifiers. (line 6)
* syntax, machine-independent: Syntax. (line 6)
* syntax, RL78: RL78-Modifiers. (line 6)
* syntax, RX: RX-Modifiers. (line 6)
@@ -26472,7 +26484,7 @@
* tab (\t): Strings. (line 27)
* tab directive, TIC54X: TIC54X-Directives. (line 247)
* tag directive: Tag. (line 6)
* tag directive, TIC54X: TIC54X-Directives. (line 250)
* tag directive, TIC54X: TIC54X-Directives. (line 216)
* TBM, i386: i386-TBM. (line 6)
* TBM, x86-64: i386-TBM. (line 6)
* tdaoff pseudo-op, V850: V850 Opcodes. (line 81)
@@ -26576,9 +26588,9 @@
* versions of symbols: Symver. (line 6)
* Virtualization instruction generation override: MIPS ASE Instruction Generation Overrides.
(line 47)
* visibility <1>: Internal. (line 6)
* visibility <2>: Protected. (line 6)
* visibility: Hidden. (line 6)
* visibility <1>: Protected. (line 6)
* visibility <2>: Hidden. (line 6)
* visibility: Internal. (line 6)
* Visium line comment character: Visium Characters. (line 6)
* Visium line separator: Visium Characters. (line 14)
* Visium options: Visium Options. (line 6)
@@ -26991,348 +27003,348 @@
Node: ESA/390 Opcodes376912
Node: i386-Dependent377174
Node: i386-Options378504
Node: i386-Directives385840
Node: i386-Syntax386578
Node: i386-Variations386883
Node: i386-Chars389424
Node: i386-Mnemonics390153
Node: i386-Regs393517
Node: i386-Prefixes395562
Node: i386-Memory398322
Node: i386-Jumps401259
Node: i386-Float402380
Node: i386-SIMD404209
Node: i386-LWP405318
Node: i386-BMI406152
Node: i386-TBM406530
Node: i386-16bit407060
Node: i386-Arch409131
Node: i386-Bugs412249
Node: i386-Notes413003
Node: i860-Dependent413861
Node: Notes-i860414301
Node: Options-i860415206
Node: Directives-i860416569
Node: Opcodes for i860417638
Node: Syntax of i860419828
Node: i860-Chars420012
Node: i960-Dependent420571
Node: Options-i960421018
Node: Floating Point-i960424903
Node: Directives-i960425171
Node: Opcodes for i960427205
Node: callj-i960427845
Node: Compare-and-branch-i960428334
Node: Syntax of i960430238
Node: i960-Chars430438
Node: IA-64-Dependent430981
Node: IA-64 Options431282
Node: IA-64 Syntax434433
Node: IA-64-Chars434839
Node: IA-64-Regs435069
Node: IA-64-Bits435995
Node: IA-64-Relocs436525
Node: IA-64 Opcodes436997
Node: IP2K-Dependent437269
Node: IP2K-Opts437541
Node: IP2K-Syntax438041
Node: IP2K-Chars438215
Node: LM32-Dependent438758
Node: LM32 Options439053
Node: LM32 Syntax439687
Node: LM32-Regs439983
Node: LM32-Modifiers440942
Node: LM32-Chars442317
Node: LM32 Opcodes442825
Node: M32C-Dependent443129
Node: M32C-Opts443638
Node: M32C-Syntax444058
Node: M32C-Modifiers444293
Node: M32C-Chars446082
Node: M32R-Dependent446648
Node: M32R-Opts446969
Node: M32R-Directives451132
Node: M32R-Warnings455107
Node: M68K-Dependent458113
Node: M68K-Opts458580
Node: M68K-Syntax465953
Node: M68K-Moto-Syntax467793
Node: M68K-Float470383
Node: M68K-Directives470903
Node: M68K-opcodes472231
Node: M68K-Branch472457
Node: M68K-Chars476655
Node: M68HC11-Dependent477518
Node: M68HC11-Opts478049
Node: M68HC11-Syntax482354
Node: M68HC11-Modifiers485145
Node: M68HC11-Directives486973
Node: M68HC11-Float488349
Node: M68HC11-opcodes488877
Node: M68HC11-Branch489059
Node: Meta-Dependent491508
Node: Meta Options491793
Node: Meta Syntax492455
Node: Meta-Chars492667
Node: Meta-Regs492967
Node: MicroBlaze-Dependent493243
Node: MicroBlaze Directives493932
Node: MicroBlaze Syntax495315
Node: MicroBlaze-Chars495547
Node: MIPS-Dependent496099
Node: MIPS Options497536
Node: MIPS Macros512242
Ref: MIPS Macros-Footnote-1514956
Node: MIPS Symbol Sizes515099
Node: MIPS Small Data516771
Node: MIPS ISA518934
Node: MIPS assembly options520719
Node: MIPS autoextend521852
Node: MIPS insn522586
Node: MIPS FP ABIs523866
Node: MIPS FP ABI History524318
Node: MIPS FP ABI Variants525078
Node: MIPS FP ABI Selection527632
Node: MIPS FP ABI Compatibility528696
Node: MIPS NaN Encodings529506
Node: MIPS Option Stack531469
Node: MIPS ASE Instruction Generation Overrides532254
Node: MIPS Floating-Point534968
Node: MIPS Syntax535874
Node: MIPS-Chars536136
Node: MMIX-Dependent536678
Node: MMIX-Opts537058
Node: MMIX-Expand540662
Node: MMIX-Syntax541977
Ref: mmixsite542334
Node: MMIX-Chars543175
Node: MMIX-Symbols544049
Node: MMIX-Regs546117
Node: MMIX-Pseudos547142
Ref: MMIX-loc547283
Ref: MMIX-local548363
Ref: MMIX-is548895
Ref: MMIX-greg549166
Ref: GREG-base550085
Ref: MMIX-byte551402
Ref: MMIX-constants551873
Ref: MMIX-prefix552519
Ref: MMIX-spec552893
Node: MMIX-mmixal553227
Node: MSP430-Dependent556725
Node: MSP430 Options557194
Node: MSP430 Syntax560373
Node: MSP430-Macros560689
Node: MSP430-Chars561420
Node: MSP430-Regs562135
Node: MSP430-Ext562695
Node: MSP430 Floating Point564516
Node: MSP430 Directives564740
Node: MSP430 Opcodes566061
Node: MSP430 Profiling Capability566456
Node: NDS32-Dependent568785
Node: NDS32 Options569397
Node: NDS32 Syntax571298
Node: NDS32-Chars571566
Node: NDS32-Regs572033
Node: NDS32-Ops572887
Node: NiosII-Dependent576482
Node: Nios II Options576901
Node: Nios II Syntax578139
Node: Nios II Chars578345
Node: Nios II Relocations578536
Node: Nios II Directives580108
Node: Nios II Opcodes581671
Node: NS32K-Dependent581946
Node: NS32K Syntax582173
Node: NS32K-Chars582322
Node: PDP-11-Dependent583062
Node: PDP-11-Options583452
Node: PDP-11-Pseudos588523
Node: PDP-11-Syntax588868
Node: PDP-11-Mnemonics589700
Node: PDP-11-Synthetic590002
Node: PJ-Dependent590220
Node: PJ Options590483
Node: PJ Syntax590778
Node: PJ-Chars590943
Node: PPC-Dependent591492
Node: PowerPC-Opts591825
Node: PowerPC-Pseudo595452
Node: PowerPC-Syntax596074
Node: PowerPC-Chars596264
Node: RL78-Dependent597015
Node: RL78-Opts597413
Node: RL78-Modifiers598180
Node: RL78-Directives598956
Node: RL78-Syntax599561
Node: RL78-Chars599757
Node: RX-Dependent600313
Node: RX-Opts600744
Node: RX-Modifiers604969
Node: RX-Directives606073
Node: RX-Float606813
Node: RX-Syntax607454
Node: RX-Chars607633
Node: S/390-Dependent608185
Node: s390 Options608906
Node: s390 Characters610474
Node: s390 Syntax610995
Node: s390 Register611896
Node: s390 Mnemonics612709
Node: s390 Operands615729
Node: s390 Formats618348
Node: s390 Aliases626219
Node: s390 Operand Modifier630116
Node: s390 Instruction Marker633917
Node: s390 Literal Pool Entries634933
Node: s390 Directives636856
Node: s390 Floating Point642299
Node: SCORE-Dependent642745
Node: SCORE-Opts643047
Node: SCORE-Pseudo644335
Node: SCORE-Syntax646412
Node: SCORE-Chars646594
Node: SH-Dependent647152
Node: SH Options647563
Node: SH Syntax648618
Node: SH-Chars648891
Node: SH-Regs649434
Node: SH-Addressing650048
Node: SH Floating Point650957
Node: SH Directives652051
Node: SH Opcodes652452
Node: SH64-Dependent656774
Node: SH64 Options657136
Node: SH64 Syntax658933
Node: SH64-Chars659216
Node: SH64-Regs659765
Node: SH64-Addressing660861
Node: SH64 Directives662044
Node: SH64 Opcodes663029
Node: Sparc-Dependent663745
Node: Sparc-Opts664156
Node: Sparc-Aligned-Data669170
Node: Sparc-Syntax670002
Node: Sparc-Chars670576
Node: Sparc-Regs671139
Node: Sparc-Constants676623
Node: Sparc-Relocs681383
Node: Sparc-Size-Translations686519
Node: Sparc-Float688168
Node: Sparc-Directives688363
Node: TIC54X-Dependent690323
Node: TIC54X-Opts691086
Node: TIC54X-Block692129
Node: TIC54X-Env692489
Node: TIC54X-Constants692837
Node: TIC54X-Subsyms693239
Node: TIC54X-Locals695148
Node: TIC54X-Builtins695892
Node: TIC54X-Ext698363
Node: TIC54X-Directives698934
Node: TIC54X-Macros709835
Node: TIC54X-MMRegs711946
Node: TIC54X-Syntax712184
Node: TIC54X-Chars712374
Node: TIC6X-Dependent713065
Node: TIC6X Options713368
Node: TIC6X Syntax715369
Node: TIC6X Directives716471
Node: TILE-Gx-Dependent718756
Node: TILE-Gx Options719066
Node: TILE-Gx Syntax719416
Node: TILE-Gx Opcodes721650
Node: TILE-Gx Registers721938
Node: TILE-Gx Modifiers722710
Node: TILE-Gx Directives727682
Node: TILEPro-Dependent728586
Node: TILEPro Options728895
Node: TILEPro Syntax729079
Node: TILEPro Opcodes731313
Node: TILEPro Registers731604
Node: TILEPro Modifiers732374
Node: TILEPro Directives737139
Node: V850-Dependent738043
Node: V850 Options738439
Node: V850 Syntax742719
Node: V850-Chars742959
Node: V850-Regs743503
Node: V850 Floating Point745071
Node: V850 Directives745277
Node: V850 Opcodes747344
Node: Vax-Dependent753236
Node: VAX-Opts753820
Node: VAX-float757555
Node: VAX-directives758187
Node: VAX-opcodes759048
Node: VAX-branch759437
Node: VAX-operands761944
Node: VAX-no762707
Node: VAX-Syntax762963
Node: VAX-Chars763129
Node: Visium-Dependent763683
Node: Visium Options763990
Node: Visium Syntax764456
Node: Visium Characters764701
Node: Visium Registers765282
Node: Visium Opcodes765554
Node: XGATE-Dependent765980
Node: XGATE-Opts766402
Node: XGATE-Syntax767393
Node: XGATE-Directives769472
Node: XGATE-Float769711
Node: XGATE-opcodes770208
Node: XSTORMY16-Dependent770320
Node: XStormy16 Syntax770666
Node: XStormy16-Chars770856
Node: XStormy16 Directives771469
Node: XStormy16 Opcodes772124
Node: Xtensa-Dependent773180
Node: Xtensa Options773914
Node: Xtensa Syntax778185
Node: Xtensa Opcodes780329
Node: Xtensa Registers782123
Node: Xtensa Optimizations782756
Node: Density Instructions783208
Node: Xtensa Automatic Alignment784310
Node: Xtensa Relaxation786757
Node: Xtensa Branch Relaxation787722
Node: Xtensa Call Relaxation789094
Node: Xtensa Jump Relaxation790875
Node: Xtensa Immediate Relaxation792975
Node: Xtensa Directives795549
Node: Schedule Directive797258
Node: Longcalls Directive797598
Node: Transform Directive798142
Node: Literal Directive798884
Ref: Literal Directive-Footnote-1802423
Node: Literal Position Directive802565
Node: Literal Prefix Directive804264
Node: Absolute Literals Directive805162
Node: Z80-Dependent806469
Node: Z80 Options806857
Node: Z80 Syntax808280
Node: Z80-Chars808952
Node: Z80-Regs809802
Node: Z80-Case810154
Node: Z80 Floating Point810599
Node: Z80 Directives810793
Node: Z80 Opcodes812418
Node: Z8000-Dependent813762
Node: Z8000 Options814701
Node: Z8000 Syntax814918
Node: Z8000-Chars815208
Node: Z8000-Regs815690
Node: Z8000-Addressing816480
Node: Z8000 Directives817597
Node: Z8000 Opcodes819206
Node: Reporting Bugs829148
Node: Bug Criteria829874
Node: Bug Reporting830641
Node: Acknowledgements837290
Ref: Acknowledgements-Footnote-1842255
Node: GNU Free Documentation License842281
Node: AS Index867450
Node: i386-Directives386310
Node: i386-Syntax387048
Node: i386-Variations387353
Node: i386-Chars389894
Node: i386-Mnemonics390623
Node: i386-Regs393987
Node: i386-Prefixes396032
Node: i386-Memory398792
Node: i386-Jumps401729
Node: i386-Float402850
Node: i386-SIMD404679
Node: i386-LWP405788
Node: i386-BMI406622
Node: i386-TBM407000
Node: i386-16bit407530
Node: i386-Arch409601
Node: i386-Bugs412719
Node: i386-Notes413473
Node: i860-Dependent414331
Node: Notes-i860414771
Node: Options-i860415676
Node: Directives-i860417039
Node: Opcodes for i860418108
Node: Syntax of i860420298
Node: i860-Chars420482
Node: i960-Dependent421041
Node: Options-i960421488
Node: Floating Point-i960425373
Node: Directives-i960425641
Node: Opcodes for i960427675
Node: callj-i960428315
Node: Compare-and-branch-i960428804
Node: Syntax of i960430708
Node: i960-Chars430908
Node: IA-64-Dependent431451
Node: IA-64 Options431752
Node: IA-64 Syntax434903
Node: IA-64-Chars435309
Node: IA-64-Regs435539
Node: IA-64-Bits436465
Node: IA-64-Relocs436995
Node: IA-64 Opcodes437467
Node: IP2K-Dependent437739
Node: IP2K-Opts438011
Node: IP2K-Syntax438511
Node: IP2K-Chars438685
Node: LM32-Dependent439228
Node: LM32 Options439523
Node: LM32 Syntax440157
Node: LM32-Regs440453
Node: LM32-Modifiers441412
Node: LM32-Chars442787
Node: LM32 Opcodes443295
Node: M32C-Dependent443599
Node: M32C-Opts444108
Node: M32C-Syntax444528
Node: M32C-Modifiers444763
Node: M32C-Chars446552
Node: M32R-Dependent447118
Node: M32R-Opts447439
Node: M32R-Directives451602
Node: M32R-Warnings455577
Node: M68K-Dependent458583
Node: M68K-Opts459050
Node: M68K-Syntax466423
Node: M68K-Moto-Syntax468263
Node: M68K-Float470853
Node: M68K-Directives471373
Node: M68K-opcodes472701
Node: M68K-Branch472927
Node: M68K-Chars477125
Node: M68HC11-Dependent477988
Node: M68HC11-Opts478519
Node: M68HC11-Syntax482824
Node: M68HC11-Modifiers485615
Node: M68HC11-Directives487443
Node: M68HC11-Float488819
Node: M68HC11-opcodes489347
Node: M68HC11-Branch489529
Node: Meta-Dependent491978
Node: Meta Options492263
Node: Meta Syntax492925
Node: Meta-Chars493137
Node: Meta-Regs493437
Node: MicroBlaze-Dependent493713
Node: MicroBlaze Directives494402
Node: MicroBlaze Syntax495785
Node: MicroBlaze-Chars496017
Node: MIPS-Dependent496569
Node: MIPS Options498006
Node: MIPS Macros512712
Ref: MIPS Macros-Footnote-1515426
Node: MIPS Symbol Sizes515569
Node: MIPS Small Data517241
Node: MIPS ISA519404
Node: MIPS assembly options521189
Node: MIPS autoextend522322
Node: MIPS insn523056
Node: MIPS FP ABIs524336
Node: MIPS FP ABI History524788
Node: MIPS FP ABI Variants525548
Node: MIPS FP ABI Selection528102
Node: MIPS FP ABI Compatibility529166
Node: MIPS NaN Encodings529976
Node: MIPS Option Stack531939
Node: MIPS ASE Instruction Generation Overrides532724
Node: MIPS Floating-Point535438
Node: MIPS Syntax536344
Node: MIPS-Chars536606
Node: MMIX-Dependent537148
Node: MMIX-Opts537528
Node: MMIX-Expand541132
Node: MMIX-Syntax542447
Ref: mmixsite542804
Node: MMIX-Chars543645
Node: MMIX-Symbols544519
Node: MMIX-Regs546587
Node: MMIX-Pseudos547612
Ref: MMIX-loc547753
Ref: MMIX-local548833
Ref: MMIX-is549365
Ref: MMIX-greg549636
Ref: GREG-base550555
Ref: MMIX-byte551872
Ref: MMIX-constants552343
Ref: MMIX-prefix552989
Ref: MMIX-spec553363
Node: MMIX-mmixal553697
Node: MSP430-Dependent557195
Node: MSP430 Options557664
Node: MSP430 Syntax560843
Node: MSP430-Macros561159
Node: MSP430-Chars561890
Node: MSP430-Regs562605
Node: MSP430-Ext563165
Node: MSP430 Floating Point564986
Node: MSP430 Directives565210
Node: MSP430 Opcodes566531
Node: MSP430 Profiling Capability566926
Node: NDS32-Dependent569255
Node: NDS32 Options569867
Node: NDS32 Syntax571768
Node: NDS32-Chars572036
Node: NDS32-Regs572503
Node: NDS32-Ops573357
Node: NiosII-Dependent576952
Node: Nios II Options577371
Node: Nios II Syntax578609
Node: Nios II Chars578815
Node: Nios II Relocations579006
Node: Nios II Directives580578
Node: Nios II Opcodes582141
Node: NS32K-Dependent582416
Node: NS32K Syntax582643
Node: NS32K-Chars582792
Node: PDP-11-Dependent583532
Node: PDP-11-Options583922
Node: PDP-11-Pseudos588993
Node: PDP-11-Syntax589338
Node: PDP-11-Mnemonics590170
Node: PDP-11-Synthetic590472
Node: PJ-Dependent590690
Node: PJ Options590953
Node: PJ Syntax591248
Node: PJ-Chars591413
Node: PPC-Dependent591962
Node: PowerPC-Opts592295
Node: PowerPC-Pseudo595922
Node: PowerPC-Syntax596544
Node: PowerPC-Chars596734
Node: RL78-Dependent597485
Node: RL78-Opts597883
Node: RL78-Modifiers598650
Node: RL78-Directives599426
Node: RL78-Syntax600031
Node: RL78-Chars600227
Node: RX-Dependent600783
Node: RX-Opts601214
Node: RX-Modifiers605439
Node: RX-Directives606543
Node: RX-Float607283
Node: RX-Syntax607924
Node: RX-Chars608103
Node: S/390-Dependent608655
Node: s390 Options609376
Node: s390 Characters610944
Node: s390 Syntax611465
Node: s390 Register612366
Node: s390 Mnemonics613179
Node: s390 Operands616199
Node: s390 Formats618818
Node: s390 Aliases626689
Node: s390 Operand Modifier630586
Node: s390 Instruction Marker634387
Node: s390 Literal Pool Entries635403
Node: s390 Directives637326
Node: s390 Floating Point642769
Node: SCORE-Dependent643215
Node: SCORE-Opts643517
Node: SCORE-Pseudo644805
Node: SCORE-Syntax646882
Node: SCORE-Chars647064
Node: SH-Dependent647622
Node: SH Options648033
Node: SH Syntax649088
Node: SH-Chars649361
Node: SH-Regs649904
Node: SH-Addressing650518
Node: SH Floating Point651427
Node: SH Directives652521
Node: SH Opcodes652922
Node: SH64-Dependent657244
Node: SH64 Options657606
Node: SH64 Syntax659403
Node: SH64-Chars659686
Node: SH64-Regs660235
Node: SH64-Addressing661331
Node: SH64 Directives662514
Node: SH64 Opcodes663499
Node: Sparc-Dependent664215
Node: Sparc-Opts664626
Node: Sparc-Aligned-Data669640
Node: Sparc-Syntax670472
Node: Sparc-Chars671046
Node: Sparc-Regs671609
Node: Sparc-Constants677093
Node: Sparc-Relocs681853
Node: Sparc-Size-Translations686989
Node: Sparc-Float688638
Node: Sparc-Directives688833
Node: TIC54X-Dependent690793
Node: TIC54X-Opts691556
Node: TIC54X-Block692599
Node: TIC54X-Env692959
Node: TIC54X-Constants693307
Node: TIC54X-Subsyms693709
Node: TIC54X-Locals695618
Node: TIC54X-Builtins696362
Node: TIC54X-Ext698833
Node: TIC54X-Directives699404
Node: TIC54X-Macros710305
Node: TIC54X-MMRegs712416
Node: TIC54X-Syntax712654
Node: TIC54X-Chars712844
Node: TIC6X-Dependent713535
Node: TIC6X Options713838
Node: TIC6X Syntax715839
Node: TIC6X Directives716941
Node: TILE-Gx-Dependent719226
Node: TILE-Gx Options719536
Node: TILE-Gx Syntax719886
Node: TILE-Gx Opcodes722120
Node: TILE-Gx Registers722408
Node: TILE-Gx Modifiers723180
Node: TILE-Gx Directives728152
Node: TILEPro-Dependent729056
Node: TILEPro Options729365
Node: TILEPro Syntax729549
Node: TILEPro Opcodes731783
Node: TILEPro Registers732074
Node: TILEPro Modifiers732844
Node: TILEPro Directives737609
Node: V850-Dependent738513
Node: V850 Options738909
Node: V850 Syntax743189
Node: V850-Chars743429
Node: V850-Regs743973
Node: V850 Floating Point745541
Node: V850 Directives745747
Node: V850 Opcodes747814
Node: Vax-Dependent753706
Node: VAX-Opts754290
Node: VAX-float758025
Node: VAX-directives758657
Node: VAX-opcodes759518
Node: VAX-branch759907
Node: VAX-operands762414
Node: VAX-no763177
Node: VAX-Syntax763433
Node: VAX-Chars763599
Node: Visium-Dependent764153
Node: Visium Options764460
Node: Visium Syntax764926
Node: Visium Characters765171
Node: Visium Registers765752
Node: Visium Opcodes766024
Node: XGATE-Dependent766450
Node: XGATE-Opts766872
Node: XGATE-Syntax767863
Node: XGATE-Directives769942
Node: XGATE-Float770181
Node: XGATE-opcodes770678
Node: XSTORMY16-Dependent770790
Node: XStormy16 Syntax771136
Node: XStormy16-Chars771326
Node: XStormy16 Directives771939
Node: XStormy16 Opcodes772594
Node: Xtensa-Dependent773650
Node: Xtensa Options774384
Node: Xtensa Syntax778655
Node: Xtensa Opcodes780799
Node: Xtensa Registers782593
Node: Xtensa Optimizations783226
Node: Density Instructions783678
Node: Xtensa Automatic Alignment784780
Node: Xtensa Relaxation787227
Node: Xtensa Branch Relaxation788192
Node: Xtensa Call Relaxation789564
Node: Xtensa Jump Relaxation791345
Node: Xtensa Immediate Relaxation793445
Node: Xtensa Directives796019
Node: Schedule Directive797728
Node: Longcalls Directive798068
Node: Transform Directive798612
Node: Literal Directive799354
Ref: Literal Directive-Footnote-1802893
Node: Literal Position Directive803035
Node: Literal Prefix Directive804734
Node: Absolute Literals Directive805632
Node: Z80-Dependent806939
Node: Z80 Options807327
Node: Z80 Syntax808750
Node: Z80-Chars809422
Node: Z80-Regs810272
Node: Z80-Case810624
Node: Z80 Floating Point811069
Node: Z80 Directives811263
Node: Z80 Opcodes812888
Node: Z8000-Dependent814232
Node: Z8000 Options815171
Node: Z8000 Syntax815388
Node: Z8000-Chars815678
Node: Z8000-Regs816160
Node: Z8000-Addressing816950
Node: Z8000 Directives818067
Node: Z8000 Opcodes819676
Node: Reporting Bugs829618
Node: Bug Criteria830344
Node: Bug Reporting831111
Node: Acknowledgements837760
Ref: Acknowledgements-Footnote-1842725
Node: GNU Free Documentation License842751
Node: AS Index867920
End Tag Table
@@ -327,6 +327,18 @@
@option{-momit-lock-prefix=@var{no}} will encode lock prefix as usual,
which is the default.
@cindex @samp{-mrelax-relocations=} option, i386
@cindex @samp{-mrelax-relocations=} option, x86-64
@item -mrelax-relocations=@var{no}
@itemx -mrelax-relocations=@var{yes}
These options control whether the assembler should generate relax
relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX, in 64-bit mode.
@option{-mrelax-relocations=@var{yes}} will generate relax relocations.
@option{-mrelax-relocations=@var{no}} will not generate relax
relocations. The default can be controlled by a configure option
@option{--enable-x86-relax-relocations}.
@cindex @samp{-mevexrcig=} option, i386
@cindex @samp{-mevexrcig=} option, x86-64
@item -mevexrcig=@var{rne}
@@ -15,6 +15,13 @@
* gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
<ldah>: ... to this.
2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* gas/arm/armv8a-automatic-hlt.d: New test.
* gas/arm/armv8a-automatic-hlt.s: New test.
* gas/arm/armv8a-automatic-lda.d: New test.
* gas/arm/armv8a-automatic-lda.s: New test.
2015-12-15 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
@@ -153,7 +160,7 @@
Apply from master.
2015-11-19 Alan Modra <amodra@gmail.com>
* gas/ppc/altivec3.d: Allow for padding at end of section.
* gas/testsuite/gas/ppc/power9.d: Likewise.
* gas/ppc/power9.d: Likewise.
2015-12-09 H.J. Lu <hongjiu.lu@intel.com>
@@ -207,8 +214,8 @@
2015-10-28 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gas/arm/pinsn.s: New.
* gas/arm/pinsn.d: Likewise.
* gas/arm/pinsn.s: New.
* gas/arm/pinsn.d: Likewise.
2015-10-27 Nick Clifton <nickc@redhat.com>
@@ -385,8 +392,8 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 Renlin Li <renlin.li@arm.com>
@@ -958,9 +965,7 @@
2015-05-28 Catherine Moore <clm@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com>
gas/testsuite/
* gas/mips/mips.exp: Run new tests.
* gas/mips/compact-eh-1.s: New file.
* gas/mips/compact-eh-2.s: New file.
* gas/mips/compact-eh-3.s: New file.
@@ -6,6 +6,10 @@
Update copyright years.
2012-12-17 Nick Clifton <nickc@redhat.com>
* hppa.h: Add copyright notice.
2010-04-15 Nick Clifton <nickc@redhat.com>
* adobe.h: Update copyright notice to use GPLv3.
@@ -58,6 +58,18 @@
* aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define.
2015-07-16 Jiong Wang <jiong.wang@arm.com>
* aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration.
2015-07-09 Catherine Moore <clm@codesourcery.com>
* mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* avr.h: Add new 32 bit PC relative relocation.
2015-07-01 Sandra Loosemore <sandra@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
@@ -80,12 +92,20 @@
Cesar Philippidis <cesar@codesourcery.com>
* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.
2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com>
* mips.h (DT_MIPS_RLD_MAP_REL): New macro.
2015-05-29 Roland McGrath <mcgrathr@google.com>
* common.h (GNU_ABI_TAG_SYLLABLE): New macro.
(GNU_ABI_TAG_NACL): New macro.
2015-05-12 Jiong Wang <jiong.wang@arm.com>
* aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_486): Renamed to ...
@@ -132,7 +152,12 @@
* rl78.h (E_FLAG_RL78_G10): Redefine.
(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
E_FLAG_RL78_G14): New flags.
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
PR ld/16572
* arm.h (EF_ARM_HASENTRY): Remove.
2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
* aarch64.h (R_AARCH64_P32_TLSGD_ADR_PREL21): Add.
@@ -187,7 +212,16 @@
2014-11-13 H.J. Lu <hongjiu.lu@intel.com>
* x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete.
2014-10-30 Andrew Pinski <apinski@cavium.com>
* mips.h (AFL_EXT_OCTEON3): Define.
(INSN_OCTEON3, CPU_OCTEON3): Define.
2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com>
* mips.h (AFL_ASE_MASK): Define.
2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved.
@@ -226,6 +260,28 @@
2014-08-26 DJ Delorie <dj@redhat.com>
* rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits
2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
* mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
(Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
(Val_GNU_MIPS_ABI_FP_64): Redefine.
(Val_GNU_MIPS_ABI_FP_XX): Define.
(Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
(AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
(AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
(AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
(AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
(AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
(AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
(AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
(AFL_EXT_LOONGSON_2F): Likewise.
(bfd_mips_elf_swap_abiflags_v0_in): Prototype.
(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
(bfd_mips_isa_ext): Likewise.
2014-07-07 Barney Stratford <barney_stratford@fastmail.fm>
@@ -252,6 +308,10 @@
* openrisc.h: Delete.
* or32.h: Delete.
2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* avr.h: Add new DIFF relocs.
2014-03-05 Alan Modra <amodra@gmail.com>
Update copyright years.
@@ -394,7 +454,11 @@
(EM_INTEL207): Likewise.
(EM_INTEL208): Likewise.
(EM_INTEL209): Likewise.
2013-05-06 Paul Brook <paul@codesourcery.com>
* mips.h (R_MIPS_PC32): Update comment.
2013-05-02 Nick Clifton <nickc@redhat.com>
* msp430.h: Add MSP430X relocs.
@@ -442,6 +506,10 @@
* mips.h: Add MIPS machine variant number for r5900 which is
compatible with old Playstation 2 software.
2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-11-16 H.J. Lu <hongjiu.lu@intel.com>
@@ -477,13 +545,17 @@
2012-10-30 Steve McIntyre <steve.mcintyre@linaro.org>
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
* arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
2012-10-23 Tom Tromey <tromey@redhat.com>
* common.h (NT_SIGINFO, NT_FILE): New defines.
2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
* aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
2012-08-27 Walter Lee <walt@tilera.com>
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
@@ -501,6 +573,11 @@
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
@@ -515,7 +592,15 @@
* aarch64.h: New file.
* common.h (EM_res183): Rename to EM_AARCH64.
(EM_res184): Rename to EM_ARM184.
2012-08-02 Sean Keys <skeys@ipdatasys.com>
* m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
2012-06-28 Iain Sandoe <iain@codesourcery.com>
* common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE,
@@ -565,7 +650,7 @@
2012-05-11 Georg-Johann Lay <avr@gjlay.de
PR target/13503
* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
* avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-03 Sean Keys <skeys@ipdatasys.com>
@@ -577,6 +662,10 @@
* sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto,
pause, and compare-and-branch instructions.
2012-04-12 David S. Miller <davem@davemloft.net>
* sparc.h (R_SPARC_WDISP10): New reloc.
2012-03-07 Nick Clifton <nickc@redhat.com>
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
@@ -1096,13 +1185,13 @@
2009-08-09 Michael Eager <eager@eagercon.com>
* elf/common.h: Define EM_resnnn reserved values. Add EM_AVR32,
* common.h: Define EM_resnnn reserved values. Add EM_AVR32,
EM_STM8, EM_TILE64, EM_TILEPRO. Change EM_MICROBLAZE.
2009-08-06 Michael Eager <eager@eagercon.com>
* elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* elf/microblaze.h: New reloc definitions.
* common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* microblaze.h: New reloc definitions.
2009-07-30 Alan Modra <amodra@bigpond.net.au>
@@ -1171,7 +1260,7 @@
2009-04-24 Cary Coutant <ccoutant@google.com>
* dwarf2.h (DW_LNE_set_discriminator): New enum value.
* dwarf2.h (DW_LNE_set_discriminator): New enum value.
2009-04-15 Anthony Green <green@moxielogic.com>
@@ -1302,12 +1391,22 @@
(R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD)
(R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL)
(R_CRIS_16_TPREL): New relocations.
2008-09-24 Richard Henderson <rth@redhat.com>
* dwarf2.h (DW_OP_GNU_encoded_addr): New.
2008-08-20 Bob Wilson <bob.wilson@acm.org>
* xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
(R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
(R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
2008-08-08 Anatoly Sokolov <aesok@post.ru>
* avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
@@ -1328,6 +1427,18 @@
2008-07-21 Luis Machado <luisgpm@br.ibm.com>
* common.h: Define NT_PPC_VSX.
2008-07-12 Jie Zhang <jie.zhang@analog.com>
Revert
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
@@ -1366,7 +1477,7 @@
2008-04-16 David S. Miller <davem@davemloft.net>
* elf/sparc.h (R_SPARC_GOTDATA_HIX22,
* sparc.h (R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22,
R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP,
R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.
@@ -1689,6 +1800,7 @@
2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
Randolph Chung <randolph@tausq.org>
* hppa.h (R_PARISC_TLS_GD21L, R_PARISC_TLS_GD14R, R_PARISC_TLS_GDCALL,
R_PARISC_TLS_LDM21L, R_PARISC_TLS_LDM14R, R_PARISC_TLS_LDMCALL,
R_PARISC_TLS_LDO21L, R_PARISC_TLS_LDO14R, R_PARISC_TLS_DTPMOD32,
@@ -51,9 +51,13 @@
* section-scripts.h: New file.
2013-10-22 Sterling Augustine <saugustine@google.com>
* gdb-index.h: Merge from gdb tree.
2013-03-15 Steve Ellcey <sellcey@mips.com>
* gdb/remote-sim.h (sim_command_completer): Make char arguments const.
* remote-sim.h (sim_command_completer): Make char arguments const.
2013-01-01 Joel Brobecker <brobecker@adacore.com>
@@ -218,7 +222,7 @@
2003-06-10 Corinna Vinschen <vinschen@redhat.com>
* gdb/fileio.h: New file.
* fileio.h: New file.
2003-05-07 Andrew Cagney <cagney@redhat.com>
@@ -256,7 +260,7 @@
2002-07-29 Andrey Volkov <avolkov@transas.com>
* sim-h8300.h: Rename all enums from H8300_ to SIM_H8300_
prefix.
prefix.
2002-07-23 Andrey Volkov <avolkov@transas.com>
@@ -95,10 +95,10 @@
* aarch64.h [__cplusplus]: Wrap in extern "C".
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com>
Cupertino Miranda <cmiranda@synopsys.com>
Cupertino Miranda <cmiranda@synopsys.com>
* arc-func.h: New file.
* arc.h: Likewise.
* arc-func.h: New file.
* arc.h: Likewise.
2015-10-02 Yao Qi <yao.qi@linaro.org>
@@ -114,7 +114,11 @@
* s390.h (S390_INSTR_FLAG_HTM): New flag.
(S390_INSTR_FLAG_VX): New flag.
(S390_INSTR_FLAG_FACILITY_MASK): New flag mask.
2015-09-26 James Bowman <james.bowman@ftdichip.com>
* ft32.h: Add instruction macros FT32_*()
2015-09-23 Nick Clifton <nickc@redhat.com>
* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
@@ -257,7 +261,15 @@
* nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete.
(NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete.
(NIOS2_INSN_OPTARG): Renumber.
2014-11-21 Terry Guo <terry.guo@arm.com>
* arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
(FPU_VFP_V5D16): Likewise.
(FPU_VFP_V5_SP_D16): Likewise.
(FPU_ARCH_VFP_V5D16): Likewise.
(FPU_ARCH_VFP_V5_SP_D16): Likewise.
2014-11-06 Sandra Loosemore <sandra@codesourcery.com>
* nios2.h (nios2_find_opcode_hash): Add mach parameter to
@@ -347,7 +359,7 @@
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
+I, +O, +R, +:, +\, +", +;
+I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
@@ -424,7 +436,11 @@
2014-05-01 Richard Sandiford <rdsandiford@googlemail.com>
* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values.
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
* mips.h (ASE_XPA): New define.
2014-04-22 Christian Svensson <blue@cmd.nu>
* or32.h: Delete.
@@ -471,6 +487,11 @@
* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
(aarch64_sys_reg_writeonly_p): Ditto.
2013-11-11 Catherine Moore <clm@codesourcery.com>
* mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
(INSN_LOAD_MEMORY): ...this.
2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
@@ -514,6 +535,11 @@
* mips.h (OP_OPTIONAL_REG): New mips_operand_type.
(mips_optional_operand_p): New function.
2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
Konrad Eisele <konrad@gaisler.com>
* sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
Richard Sandiford <rdsandiford@googlemail.com>
@@ -676,6 +702,21 @@
2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
* nios2.h (OP_MATCH_ERET): Correct eret encoding.
2013-06-08 Catherine Moore <clm@codesourcery.com>
* mips.h (mips_opcode): Add ase field.
(INSN_ASE_MASK): Delete.
(INSN_DSP): Rename to ASE_DSP. Provide new value.
(INSN_DSPR2): Rename to ASE_DSPR2. Provide new value.
(INSN_MCU): Rename to ASE_MCU. Provide new value.
(INSN_MDMX): Rename to ASE_MDMX. Provide new value.
(INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value.
(INSN_MT): Rename to ASE_MT. Provide new value.
(INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value.
(INSN_VIRT): Rename to ASE_VIRT. Provide new value.
(INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
(opcode_is_member): Add ase argument. Check ase.
2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
@@ -740,7 +781,21 @@
encode the opcodes in the same way as TI assembler does.
* tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp
and rsqrdp opcodes to use the new field coding types.
2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
* nios2.h: Edit comment.
2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* nios2.h (OPX_WRPRS): New define.
(OP_MATCH_WRPRS): Likewise.
2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* nios2.h (OP_RDPRS): New define.
(OP_MATCH_RDPRS): Likewise.
2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* arm.h (CRC_EXT_ARMV8): New constant.
@@ -797,6 +852,10 @@
* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
(make_instruction,match_opcode): Added function prototypes.
(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
2012-12-17 Nick Clifton <nickc@redhat.com>
* tahoe.h: Add copyright notice.
2012-11-23 Alan Modra <amodra@gmail.com>
@@ -811,10 +870,36 @@
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-09-27 Anthony Green <green@moxielogic.com>
* moxie.h (MOXIE_BAD): New define.
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
2012-08-21 David S. Miller <davem@davemloft.net>
* sparc.h (F3F4): New macro.
@@ -858,6 +943,10 @@
2012-07-06 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h: Fix a typo in description.
2012-07-05 Sean Keys <skeys@ipdatasys.com>
* xgate.h: Changed the format string for mode XGATE_OP_DYA_MON.
2012-06-07 Georg-Johann Lay <avr@gjlay.de>
@@ -906,6 +995,10 @@
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
2012-04-12 David S. Miller <davem@davemloft.net>
* sparc.h: Define '=' as generating R_SPARC_WDISP10.
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
@@ -1274,7 +1367,15 @@
* cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_.
(CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise.
2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
* tic6x-control-registers.h (tscl): Now read_write.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_VIRT): New define.
@@ -1305,7 +1406,17 @@
2010-09-21 Mike Frysinger <vapier@gentoo.org>
* bfin.h: Strip trailing whitespace.
2009-09-04 Jie Zhang <jie.zhang@analog.com>
* bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
2010-07-29 DJ Delorie <dj@redhat.com>
* rx.h (RX_Operand_Type): Add TwoReg.
@@ -1358,7 +1469,7 @@
2010-05-26 Catherine Moore <clm@codesourcery.com>
* opcode/mips.h (INSN_MIPS16): Remove.
* mips.h (INSN_MIPS16): Remove.
2010-04-21 Joseph Myers <joseph@codesourcery.com>
@@ -1428,7 +1539,7 @@
2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
* ppc.h (PPC_OPCODE_TITAN): Define.
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
@@ -1552,7 +1663,7 @@
2009-01-28 Doug Evans <dje@google.com>
* opcode/i386.h: Add multiple inclusion protection.
* i386.h: Add multiple inclusion protection.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
(EDI_REG_NUM): New macros.
(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
@@ -1582,6 +1693,14 @@
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
2008-08-08 Anatoly Sokolov <aesok@post.ru>
* avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
@@ -2039,7 +2158,7 @@
2005-07-28 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/336
* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
and pitlb.
2005-07-27 Jan Beulich <jbeulich@novell.com>
@@ -1946,25 +1946,32 @@
return os;
}
flags = s->flags;
if (!bfd_link_relocatable (&link_info))
{
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))
!= NULL)
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms)
&& _bfd_elf_match_sections_by_type (nexts->owner, nexts,
s->owner, s))
flags = (((flags ^ SEC_READONLY)
| (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
}
/* Decide which segment the section should go in based on the
section name and section flags. We put loadable .note sections
right after the .interp section, so that the PT_NOTE segment is
stored right after the program headers where the OS can read it
in the first page. */
flags = s->flags;
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL)
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms)
&& _bfd_elf_match_sections_by_type (nexts->owner, nexts, s->owner, s))
flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
place = NULL;
if ((flags & (SEC_ALLOC | SEC_DEBUGGING)) == 0)
place = &hold[orphan_nonalloc];
@@ -107,22 +107,28 @@
return os;
}
flags = s->flags;
if (!bfd_link_relocatable (&link_info))
{
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))
!= NULL)
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
}
/* Check for matching section type flags for sections we care about.
A section without contents can have SEC_LOAD == 0, but we still
want it attached to a sane section so the symbols appear as
expected. */
flags = s->flags;
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL)
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
if ((flags & (SEC_ALLOC | SEC_READONLY)) != SEC_READONLY)
for (i = 0; i < sizeof (holds) / sizeof (holds[0]); i++)
if ((flags & holds[i].nonzero_flags) != 0)
@@ -2225,21 +2225,27 @@
orphan_init_done = 1;
}
flags = s->flags;
if (!bfd_link_relocatable (&link_info))
{
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner,
nexts)))
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY)
| (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
}
/* Try to put the new output section in a reasonable place based
on the section name and section flags. */
flags = s->flags;
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)))
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
place = NULL;
if ((flags & SEC_ALLOC) == 0)
;
@@ -1996,21 +1996,27 @@
orphan_init_done = 1;
}
flags = s->flags;
if (!bfd_link_relocatable (&link_info))
{
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner,
nexts)))
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY)
| (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
}
/* Try to put the new output section in a reasonable place based
on the section name and section flags. */
flags = s->flags;
nexts = s;
while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)))
if (nexts->output_section == NULL
&& (nexts->flags & SEC_EXCLUDE) == 0
&& ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
&& (nexts->owner->flags & DYNAMIC) == 0
&& nexts->owner->usrdata != NULL
&& !(((lang_input_statement_type *) nexts->owner->usrdata)
->flags.just_syms))
flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
^ SEC_READONLY);
place = NULL;
if ((flags & SEC_ALLOC) == 0)
;
@@ -117,13 +117,13 @@
* ld-x86-64/plt-main3.rd: Also check GOTPCRELX.
2015-10-29 Catherine Moore <clm@codesourcery.com>
* ld-mips-elf/mips16-fp-stub-1.s: New.
* ld-mips-elf/mips16-fp-stub-2.s: New.
* ld-mips-elf/mips16-fp-stub.d: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/mips16-intermix.d: Update expected output.
* ld-mips-elf/mips16-fp-stub-1.s: New.
* ld-mips-elf/mips16-fp-stub-2.s: New.
* ld-mips-elf/mips16-fp-stub.d: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/mips16-intermix.d: Update expected output.
2015-10-28 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19162
@@ -133,7 +133,7 @@
* ld-x86-64/pr19162b.s: Likewise.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
Christophe Monat <christophe.monat@st.com>
Christophe Monat <christophe.monat@st.com>
* ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
@@ -1069,7 +1069,6 @@
2015-05-28 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-mips-elf/compact-eh.ld: New linker script.
* ld-mips-elf/compact-eh1.d: New.
* ld-mips-elf/compact-eh1.s: New.
@@ -555,6 +555,45 @@
pass $testname
}
# PR 19775: Test creating and listing archives with an empty element.
proc empty_archive { } {
global AR
global srcdir
global subdir
set testname "archive with empty element"
# FIXME: There ought to be a way to dynamically create an empty file.
set empty $srcdir/$subdir/empty
if [is_remote host] {
set archive artest.a
set objfile [remote_download host $empty]
remote_file host delete $archive
} else {
set archive tmpdir/artest.a
set objfile $empty
}
remote_file build delete tmpdir/artest.a
set got [binutils_run $AR "-r -c $archive ${objfile}"]
if ![string match "" $got] {
fail $testname
return
}
# This commmand used to fail with: "Malformed archive".
set got [binutils_run $AR "-t $archive"]
if ![string match "empty
" $got] {
fail $testname
return
}
pass $testname
}
# Run the tests.
# Only run the bfdtest checks if the programs exist. Since these
@@ -574,6 +613,7 @@
deterministic_archive
delete_an_element
move_an_element
empty_archive
if { [is_elf_format]
&& ![istarget "*-*-hpux*"]
@@ -667,4 +667,97 @@
set testname "Convert x32 object to x86-64 (3)"
convert_test "$testname" "--nocompress-debug-sections --x32" "-O elf64-x86-64 --compress-debug-sections=zlib-gnu"
}
}
proc test_gnu_debuglink {} {
global srcdir
global subdir
global env
global CC_FOR_TARGET
global STRIP
global OBJCOPY
global OBJDUMP
set test "gnu-debuglink"
if {![info exists CC_FOR_TARGET]} {
set CC_FOR_TARGET $env(CC)
}
if { $CC_FOR_TARGET == "" } {
unsupported $test
return
}
if { [target_compile $srcdir/$subdir/testprog.c tmpdir/testprog exectuable debug] != "" } {
fail "$test (build)"
return
}
set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.dump"]
if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
fail "$test (objcopy dump)"
return
}
if { [binutils_run $STRIP "--strip-debug --remove-section=.comment --remove-section=.note tmpdir/testprog -o tmpdir/testprog.strip"] != "" } {
fail "$test (strip)"
return
}
if { [binutils_run $OBJCOPY "--only-keep-debug --decompress-debug-sections tmpdir/testprog tmpdir/testprog.decompress"] != "" } {
fail "$test (objcopy decompress)"
return
}
if { [binutils_run $OBJCOPY "--only-keep-debug --compress-debug-sections tmpdir/testprog tmpdir/testprog.compress"] != "" } {
fail "$test (objcopy compress)"
return
}
if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.decompress tmpdir/testprog.strip tmpdir/testprog"] != "" } {
fail "$test (objcopy link decompress)"
return
}
set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.decompress.dump"]
if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
fail "$test (objcopy dump decompress)"
return
}
if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.compress tmpdir/testprog.strip tmpdir/testprog"] != "" } {
fail "$test (objcopy link compress)"
return
}
set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.compress.dump"]
if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
fail "$test (objcopy dump compress)"
return
}
set src1 tmpdir/testprog.dump
set src2 tmpdir/testprog.compress.dump
send_log "cmp ${src1} ${src2}\n"
verbose "cmp ${src1} ${src2}"
set status [remote_exec build cmp "${src1} ${src2}"]
set exec_output [lindex $status 1]
set exec_output [prune_warnings $exec_output]
if ![string match "" $exec_output] then {
send_log "$exec_output\n"
verbose "$exec_output" 1
fail "$test (objdump 1)"
} else {
pass "$test (objdump 1)"
}
set src1 tmpdir/testprog.decompress.dump
set src2 tmpdir/testprog.compress.dump
send_log "cmp ${src1} ${src2}\n"
verbose "cmp ${src1} ${src2}"
set status [remote_exec build cmp "${src1} ${src2}"]
set exec_output [lindex $status 1]
set exec_output [prune_warnings $exec_output]
if ![string match "" $exec_output] then {
send_log "$exec_output\n"
verbose "$exec_output" 1
fail "$test (objdump 2)"
} else {
pass "$test (objdump 2)"
}
}
if {[isnative] && [is_elf_format]} then {
test_gnu_debuglink
}
@@ -170,7 +170,6 @@
run_dump_test "limit-b"
run_dump_test "limit-bl"
run_dump_test "farcall-section"
run_dump_test "farcall-back"
run_dump_test "farcall-b-defsym"
run_dump_test "farcall-bl-defsym"
@@ -181,6 +180,8 @@
run_dump_test "farcall-b"
run_dump_test "farcall-b-none-function"
run_dump_test "farcall-bl-none-function"
run_dump_test "farcall-b-section"
run_dump_test "farcall-bl-section"
run_dump_test "tls-relax-all"
run_dump_test "tls-relax-gd-le"
@@ -1,5 +1,24 @@
#name: aarch64-farcall-b-none-function
#source: farcall-b-none-function.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar'.*
#objdump: -dr
#...
Disassembly of section .text:
.* <_start>:
1000: 14000003 b 100c <__bar_veneer>
1004: d65f03c0 ret
1008: 14000007 b 1024 <__bar_veneer\+0x18>
.* <__bar_veneer>:
100c: 90040010 adrp x16, 8001000 <bar>
1010: 91000210 add x16, x16, #0x0
1014: d61f0200 br x16
...
Disassembly of section .foo:
.* <bar>:
8001000: d65f03c0 ret
@@ -1,0 +1,34 @@
#name: aarch64-farcall-b-section
#source: farcall-b-section.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
#objdump: -dr
#...
Disassembly of section .text:
.* <_start>:
1000: 14000008 b 1020 <___veneer>
1004: 14000003 b 1010 <___veneer>
1008: d65f03c0 ret
100c: 1400000d b 1040 <___veneer\+0x20>
.* <___veneer>:
1010: 90040010 adrp x16, 8001000 <bar>
1014: 91001210 add x16, x16, #0x4
1018: d61f0200 br x16
101c: 00000000 .inst 0x00000000 ; undefined
.* <___veneer>:
1020: 90040010 adrp x16, 8001000 <bar>
1024: 91000210 add x16, x16, #0x0
1028: d61f0200 br x16
...
Disassembly of section .foo:
.* <bar>:
8001000: d65f03c0 ret
.* <bar2>:
8001004: d65f03c0 ret
@@ -1,0 +1,20 @@
.global _start
.text
_start:
b bar
b bar2
ret
.section .foo, "xa"
.type bar, @function
bar:
ret
.type bar2, @function
bar2:
ret
@@ -1,5 +1,24 @@
#name: aarch64-farcall-bl-none-function
#source: farcall-bl-none-function.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against symbol `bar'.*
#objdump: -dr
#...
Disassembly of section .text:
.* <_start>:
1000: 94000003 bl 100c <__bar_veneer>
1004: d65f03c0 ret
1008: 14000007 b 1024 <__bar_veneer\+0x18>
.* <__bar_veneer>:
100c: 90040010 adrp x16, 8001000 <bar>
1010: 91000210 add x16, x16, #0x0
1014: d61f0200 br x16
...
Disassembly of section .foo:
.* <bar>:
8001000: d65f03c0 ret
@@ -1,0 +1,34 @@
#name: aarch64-farcall-bl-section
#source: farcall-bl-section.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
#objdump: -dr
#...
Disassembly of section .text:
.* <_start>:
1000: 94000008 bl 1020 <___veneer>
1004: 94000003 bl 1010 <___veneer>
1008: d65f03c0 ret
100c: 1400000d b 1040 <___veneer\+0x20>
.* <___veneer>:
1010: 90040010 adrp x16, 8001000 <bar>
1014: 91001210 add x16, x16, #0x4
1018: d61f0200 br x16
101c: 00000000 .inst 0x00000000 ; undefined
.* <___veneer>:
1020: 90040010 adrp x16, 8001000 <bar>
1024: 91000210 add x16, x16, #0x0
1028: d61f0200 br x16
...
Disassembly of section .foo:
.* <bar>:
8001000: d65f03c0 ret
.* <bar2>:
8001004: d65f03c0 ret
@@ -1,0 +1,20 @@
.global _start
.text
_start:
bl bar
bl bar2
ret
.section .foo, "xa"
.type bar, @function
bar:
ret
.type bar2, @function
bar2:
ret
@@ -1,5 +1,0 @@
#name: Aarch64 farcall to symbol of type STT_SECTION
#source: farcall-section.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001014
#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against `.foo'
@@ -1,19 +1,0 @@
.global _start
.text
_start:
bl bar
.section .foo, "xa"
bar:
ret
@@ -167,10 +167,14 @@
"-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm.s}
{{objdump -dr stm32l4xx-fix-vldm.d}}
"stm32l4xx-fix-vldm"}
{"STM32L4XX erratum fix VLDM, DP registers"
"-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm-dp.s}
{{objdump -dr stm32l4xx-fix-vldm-dp.d}}
"stm32l4xx-fix-vldm-dp"}
{"STM32L4XX erratum fix ALL"
"-EL --fix-stm32l4xx-629360=all -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-all.s}
{{objdump -dr stm32l4xx-fix-all.d}}
"stm32l4xx-fix-vldm-all"}
"stm32l4xx-fix-all"}
{"STM32L4XX erratum fix in IT context"
"-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-it-block.s}
{{objdump -dr stm32l4xx-fix-it-block.d}}
@@ -6,37 +6,37 @@
00008000 <__stm32l4xx_veneer_0>:
8000: e899 01fe ldmia\.w r9, {r1, r2, r3, r4, r5, r6, r7, r8}
8004: f000 b84a b\.w 809c <__stm32l4xx_veneer_0_r>
8004: f000 b86e b\.w 80e4 <__stm32l4xx_veneer_0_r>
8008: f7f0 a000 udf\.w #0
800c: f7f0 a000 udf\.w #0
00008010 <__stm32l4xx_veneer_1>:
8010: e8b9 01fe ldmia\.w r9!, {r1, r2, r3, r4, r5, r6, r7, r8}
8014: f000 b844 b\.w 80a0 <__stm32l4xx_veneer_1_r>
8014: f000 b868 b\.w 80e8 <__stm32l4xx_veneer_1_r>
8018: f7f0 a000 udf\.w #0
801c: f7f0 a000 udf\.w #0
00008020 <__stm32l4xx_veneer_2>:
8020: e919 01fe ldmdb r9, {r1, r2, r3, r4, r5, r6, r7, r8}
8024: f000 b83e b\.w 80a4 <__stm32l4xx_veneer_2_r>
8024: f000 b862 b\.w 80ec <__stm32l4xx_veneer_2_r>
8028: f7f0 a000 udf\.w #0
802c: f7f0 a000 udf\.w #0
00008030 <__stm32l4xx_veneer_3>:
8030: e939 01fe ldmdb r9!, {r1, r2, r3, r4, r5, r6, r7, r8}
8034: f000 b838 b\.w 80a8 <__stm32l4xx_veneer_3_r>
8034: f000 b85c b\.w 80f0 <__stm32l4xx_veneer_3_r>
8038: f7f0 a000 udf\.w #0
803c: f7f0 a000 udf\.w #0
00008040 <__stm32l4xx_veneer_4>:
8040: e8bd 01fe ldmia\.w sp!, {r1, r2, r3, r4, r5, r6, r7, r8}
8044: f000 b832 b\.w 80ac <__stm32l4xx_veneer_4_r>
8044: f000 b856 b\.w 80f4 <__stm32l4xx_veneer_4_r>
8048: f7f0 a000 udf\.w #0
804c: f7f0 a000 udf\.w #0
00008050 <__stm32l4xx_veneer_5>:
8050: ecd9 0a08 vldmia r9, {s1-s8}
8054: f000 b82c b\.w 80b0 <__stm32l4xx_veneer_5_r>
8054: f000 b850 b\.w 80f8 <__stm32l4xx_veneer_5_r>
8058: f7f0 a000 udf\.w #0
805c: f7f0 a000 udf\.w #0
8060: f7f0 a000 udf\.w #0
@@ -44,7 +44,7 @@
00008068 <__stm32l4xx_veneer_6>:
8068: ecf6 4a08 vldmia r6!, {s9-s16}
806c: f000 b822 b\.w 80b4 <__stm32l4xx_veneer_6_r>
806c: f000 b846 b\.w 80fc <__stm32l4xx_veneer_6_r>
8070: f7f0 a000 udf\.w #0
8074: f7f0 a000 udf\.w #0
8078: f7f0 a000 udf\.w #0
@@ -52,32 +52,65 @@
00008080 <__stm32l4xx_veneer_7>:
8080: ecfd 0a08 vpop {s1-s8}
8084: f000 b818 b\.w 80b8 <__stm32l4xx_veneer_7_r>
8084: f000 b83c b\.w 8100 <__stm32l4xx_veneer_7_r>
8088: f7f0 a000 udf\.w #0
808c: f7f0 a000 udf\.w #0
8090: f7f0 a000 udf\.w #0
8094: f7f0 a000 udf\.w #0
00008098 <_start>:
8098: f7ff bfb2 b\.w 8000 <__stm32l4xx_veneer_0>
00008098 <__stm32l4xx_veneer_8>:
8098: ec99 1b08 vldmia r9, {d1-d4}
809c: f000 b832 b\.w 8104 <__stm32l4xx_veneer_8_r>
80a0: f7f0 a000 udf\.w #0
80a4: f7f0 a000 udf\.w #0
80a8: f7f0 a000 udf\.w #0
80ac: f7f0 a000 udf\.w #0
000080b0 <__stm32l4xx_veneer_9>:
80b0: ecb6 8b08 vldmia r6!, {d8-d11}
80b4: f000 b828 b\.w 8108 <__stm32l4xx_veneer_9_r>
80b8: f7f0 a000 udf\.w #0
80bc: f7f0 a000 udf\.w #0
80c0: f7f0 a000 udf\.w #0
80c4: f7f0 a000 udf\.w #0
000080c8 <__stm32l4xx_veneer_a>:
80c8: ecbd 1b08 vpop {d1-d4}
80cc: f000 b81e b\.w 810c <__stm32l4xx_veneer_a_r>
80d0: f7f0 a000 udf\.w #0
80d4: f7f0 a000 udf\.w #0
80d8: f7f0 a000 udf\.w #0
80dc: f7f0 a000 udf\.w #0
000080e0 <_start>:
80e0: f7ff bf8e b\.w 8000 <__stm32l4xx_veneer_0>
000080e4 <__stm32l4xx_veneer_0_r>:
80e4: f7ff bf94 b\.w 8010 <__stm32l4xx_veneer_1>
000080e8 <__stm32l4xx_veneer_1_r>:
80e8: f7ff bf9a b\.w 8020 <__stm32l4xx_veneer_2>
000080ec <__stm32l4xx_veneer_2_r>:
80ec: f7ff bfa0 b\.w 8030 <__stm32l4xx_veneer_3>
000080f0 <__stm32l4xx_veneer_3_r>:
80f0: f7ff bfa6 b\.w 8040 <__stm32l4xx_veneer_4>
000080f4 <__stm32l4xx_veneer_4_r>:
80f4: f7ff bfac b\.w 8050 <__stm32l4xx_veneer_5>
000080f8 <__stm32l4xx_veneer_5_r>:
80f8: f7ff bfb6 b\.w 8068 <__stm32l4xx_veneer_6>
000080fc <__stm32l4xx_veneer_6_r>:
80fc: f7ff bfc0 b\.w 8080 <__stm32l4xx_veneer_7>
00008100 <__stm32l4xx_veneer_7_r>:
8100: f7ff bfca b\.w 8098 <__stm32l4xx_veneer_8>
0000809c <__stm32l4xx_veneer_0_r>:
809c: f7ff bfb8 b\.w 8010 <__stm32l4xx_veneer_1>
00008104 <__stm32l4xx_veneer_8_r>:
8104: f7ff bfd4 b\.w 80b0 <__stm32l4xx_veneer_9>
000080a0 <__stm32l4xx_veneer_1_r>:
80a0: f7ff bfbe b\.w 8020 <__stm32l4xx_veneer_2>
000080a4 <__stm32l4xx_veneer_2_r>:
80a4: f7ff bfc4 b\.w 8030 <__stm32l4xx_veneer_3>
000080a8 <__stm32l4xx_veneer_3_r>:
80a8: f7ff bfca b\.w 8040 <__stm32l4xx_veneer_4>
000080ac <__stm32l4xx_veneer_4_r>:
80ac: f7ff bfd0 b\.w 8050 <__stm32l4xx_veneer_5>
000080b0 <__stm32l4xx_veneer_5_r>:
80b0: f7ff bfda b\.w 8068 <__stm32l4xx_veneer_6>
000080b4 <__stm32l4xx_veneer_6_r>:
80b4: f7ff bfe4 b\.w 8080 <__stm32l4xx_veneer_7>
00008108 <__stm32l4xx_veneer_9_r>:
8108: f7ff bfde b\.w 80c8 <__stm32l4xx_veneer_a>
@@ -20,3 +20,6 @@
vldm r9, {s1-s8}
vldm r6!, {s9-s16}
vpop {s1-s8}
vldm r9, {d1-d4}
vldm r6!, {d8-d11}
vpop {d1-d4}
@@ -1,0 +1,49 @@
.*: file format elf32-littlearm.*
Disassembly of section \.text:
00008000 <__stm32l4xx_veneer_0>:
8000: ecba 1b08 vldmia sl!, {d1-d4}
8004: ecba 5b08 vldmia sl!, {d5-d8}
8008: ecba 9b08 vldmia sl!, {d9-d12}
800c: ecba db06 vldmia sl!, {d13-d15}
8010: f1aa 0a78 sub\.w sl, sl, #120 ; 0x78
8014: f000 b826 b\.w 8064 <__stm32l4xx_veneer_0_r>
00008018 <__stm32l4xx_veneer_1>:
8018: ecb7 5b08 vldmia r7!, {d5-d8}
801c: ecb7 9b08 vldmia r7!, {d9-d12}
8020: ecb7 db06 vldmia r7!, {d13-d15}
8024: f000 b820 b\.w 8068 <__stm32l4xx_veneer_1_r>
8028: f7f0 a000 udf\.w #0
802c: f7f0 a000 udf\.w #0
00008030 <__stm32l4xx_veneer_2>:
8030: ecbd 1b08 vpop {d1-d4}
8034: ecbd 5b02 vpop {d5}
8038: f000 b818 b\.w 806c <__stm32l4xx_veneer_2_r>
803c: f7f0 a000 udf\.w #0
8040: f7f0 a000 udf\.w #0
8044: f7f0 a000 udf\.w #0
00008048 <__stm32l4xx_veneer_3>:
8048: ed3c 1b08 vldmdb ip!, {d1-d4}
804c: ed3c 5b08 vldmdb ip!, {d5-d8}
8050: ed3c 9b08 vldmdb ip!, {d9-d12}
8054: ed3c db06 vldmdb ip!, {d13-d15}
8058: f000 b80a b\.w 8070 <__stm32l4xx_veneer_3_r>
805c: f7f0 a000 udf\.w #0
00008060 <_start>:
8060: f7ff bfce b\.w 8000 <__stm32l4xx_veneer_0>
00008064 <__stm32l4xx_veneer_0_r>:
8064: f7ff bfd8 b\.w 8018 <__stm32l4xx_veneer_1>
00008068 <__stm32l4xx_veneer_1_r>:
8068: f7ff bfe2 b\.w 8030 <__stm32l4xx_veneer_2>
0000806c <__stm32l4xx_veneer_2_r>:
806c: f7ff bfec b\.w 8048 <__stm32l4xx_veneer_3>
@@ -1,0 +1,27 @@
.syntax unified
.cpu cortex-m4
.fpu fpv4-sp-d16
.text
.align 1
.thumb
.thumb_func
.global _start
_start:
@ VLDM CASE
@ vldm rx, {...}
@ -> vldm rx!, {8_words_or_less} for each
@ -> sub rx, rx,
vldm r10, {d1-d15}
@ VLDM CASE
@ vldm rx!, {...}
@ -> vldm rx!, {8_words_or_less} for each needed 8_word
@ This also handles vpop instruction (when rx is sp)
vldm r7!, {d5-d15}
@ Explicit VPOP test
vpop {d1-d5}
@ VLDM CASE
@ vldmd rx!, {...}
@ -> vldmb rx!, {8_words_or_less} for each needed 8_word
vldmdb r12!, {d1-d15}
@@ -21,6 +21,7 @@
@ Explicit VPOP test
vpop {s1-s9}
@ VLDM CASE
@ vldmd rx!, {...}
@ -> vldmb rx!, {8_words_or_less} for each needed 8_word
vldmdb r11!, {s1-s31}
@@ -1,0 +1,10 @@
#name: AVR .avr.prop, single .align proper sym val test.
#as: -mmcu=avrxmega2 -mlink-relax
#ld: -mavrxmega2 --relax
#source: avr-prop-5.s
#objdump: -S
#target: avr-*-*
#...
0: 00 d0\s+rcall\s+\.\+0\s+; 0x2 <dest>
#...
@@ -1,0 +1,7 @@
.text
.global _start, dest
_start:
CALL dest
.align 1
dest:
NOP
@@ -1,0 +1,14 @@
#name: AVR .avr.prop, single .align sym at end of section test.
#as: -mavrxmega2 -mlink-relax
#ld: -mavrxmega2 --relax
#source: avr-prop-6.s
#objdump: -S
#target: avr-*-*
#...
0: 00 c0 rjmp .+0 ; 0x2 <dest>
00000002 <dest>:
2: 00 00 nop
4: fe cf rjmp .-4 ; 0x2 <dest>
#...
@@ -1,0 +1,9 @@
.text
.global _start, dest
_start:
jmp dest
.align 1
dest:
nop
rjmp dest
@@ -1,7 +1,8 @@
#source: compress1.s
#as: --compress-debug-sections=zlib-gabi
#ld: -r
#ld: -r --compress-debug-sections=none
#readelf: -t
#target: *-*-linux* *-*-gnu*
#failif
#...
@@ -1,6 +1,6 @@
#source: compress1.s
#as: --compress-debug-sections=zlib-gabi
#ld: -shared
#ld: -shared --compress-debug-sections=none
#readelf: -t
#target: *-*-linux* *-*-gnu*
@@ -1,4 +1,4 @@
#...
+\[[0-9a-f]+\]: .*COMPRESSED
+ZLIB, [0-9a-f]+, 1
+ZLIB, [0-9a-f]+, [1-9][0-9]*
#pass
@@ -1,4 +1,4 @@
#...
+\[[0-9a-f]+\]: .*COMPRESSED
+ZLIB, [0-9a-f]+, 1
+ZLIB, [0-9a-f]+, [1-9][0-9]*
#pass
@@ -66,7 +66,11 @@
|| ![ld_compile $CC $srcdir/$subdir/indirect4a.c tmpdir/indirect4a.o]
|| ![ld_compile $CC $srcdir/$subdir/indirect4b.c tmpdir/indirect4b.o]
|| ![ld_compile "$CC -O2 -fPIC -I../bfd" $srcdir/$subdir/pr18720a.c tmpdir/pr18720a.o]
|| ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] } {
|| ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o]
|| ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553d.c tmpdir/pr19553d.o]
|| ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553c.c tmpdir/pr19553c.o]
|| ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553b.c tmpdir/pr19553b.o]
|| ![ld_compile $CC $srcdir/$subdir/pr19553a.c tmpdir/pr19553a.o] } {
unresolved "Indirect symbol tests"
return
}
@@ -87,6 +91,15 @@
{"Build pr18720b1.o"
"-r -nostdlib tmpdir/pr18720b.o" ""
{dummy.c} {} "pr18720b1.o"}
{"Build libpr19553b.so"
"-shared -Wl,--version-script=pr19553.map" "-fPIC"
{pr19553b.c} {} "libpr19553b.so"}
{"Build libpr19553c.so"
"-shared -Wl,--version-script=pr19553.map" "-fPIC"
{pr19553c.c} {} "libpr19553c.so"}
{"Build libpr19553d.so"
"-shared tmpdir/libpr19553c.so" "-fPIC"
{pr19553d.c} {} "libpr19553d.so"}
}
run_cc_link_tests $build_tests
@@ -155,6 +168,15 @@
{"Run with libpr18720c.so 5"
"tmpdir/libpr18720c.so tmpdir/pr18720b1.o tmpdir/pr18720a.o" ""
{check-ptr-eq.c} "pr18720d" "pr18720.out"}
{"Run with libpr19553b.so"
"tmpdir/libpr19553b.so tmpdir/libpr19553d.so -rpath-link ." ""
{pr19553a.c} "pr19553b" "pr19553b.out"}
{"Run with libpr19553c.so"
"tmpdir/libpr19553c.so tmpdir/libpr19553b.so tmpdir/libpr19553d.so" ""
{pr19553a.c} "pr19553c" "pr19553c.out"}
{"Run with libpr19553d.so"
"tmpdir/libpr19553d.so tmpdir/libpr19553b.so -rpath-link ." ""
{pr19553a.c} "pr19553d" "pr19553d.out"}
}
run_ld_link_exec_tests [] $run_tests
@@ -1,0 +1,9 @@
#source: start.s
#source: pr19539.s
#ld: -pie -T pr19539.t
#readelf : --dyn-syms --wide
#target: *-*-linux* *-*-gnu* *-*-solaris*
#notarget: cris*-*-*
Symbol table '\.dynsym' contains [0-9]+ entries:
#pass
@@ -1,0 +1,2 @@
.section .prefix,"a",%progbits
.dc.a foo
@@ -1,0 +1,1 @@
HIDDEN (foo = .);
@@ -1,0 +1,5 @@
FOO
{
global:
foo;
};
@@ -1,0 +1,8 @@
extern void foo (void);
int
main (void)
{
foo ();
return 0;
}
@@ -1,0 +1,8 @@
#include <stdio.h>
__attribute__ ((weak))
void
foo (void)
{
printf ("pr19553b\n");
}
@@ -1,0 +1,1 @@
pr19553b
@@ -1,0 +1,9 @@
#include <stdio.h>
void
foo (void)
{
printf ("pr19553c\n");
}
asm (".symver foo,foo@FOO");
@@ -1,0 +1,1 @@
pr19553c
@@ -1,0 +1,8 @@
#include <stdio.h>
__attribute__ ((weak))
void
foo (void)
{
printf ("pr19553d\n");
}
@@ -1,0 +1,1 @@
pr19553d
@@ -1,0 +1,15 @@
#include <stdio.h>
int foo[1];
int bar[2];
extern int *foo_p (void);
extern int *bar_p (void);
int
main ()
{
if (foo[0] == 0 && foo == foo_p () && bar[0] == 0 && bar == bar_p ())
printf ("PASS\n");
return 0;
}
@@ -1,0 +1,14 @@
int foo[2];
int bar[2] = { -1, -1 };
int *
foo_p (void)
{
return foo;
}
int *
bar_p (void)
{
return bar;
}
@@ -1,0 +1,10 @@
#ld: -shared $srcdir/$subdir/pr19698.t
#readelf : --dyn-syms --wide
#target: *-*-linux* *-*-gnu* *-*-solaris*
Symbol table '\.dynsym' contains [0-9]+ entries:
#...
+[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@VERS.1
#...
+[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@@VERS.2
#pass
@@ -1,0 +1,5 @@
.text
.globl foo
.type foo, %function
foo:
.byte 0
@@ -1,0 +1,11 @@
"foo@VERS.1" = foo;
VERSION {
VERS.2 {
global:
foo;
};
VERS.1 {
};
}
@@ -524,6 +524,21 @@
{} \
"libpr2404b.a" \
] \
[list \
"Build pr19579a.o" \
"" "-fPIE" \
{pr19579a.c} \
{} \
"libpr19579a.a" \
] \
[list \
"Build libpr19579.so" \
"-shared" \
"-fPIC" \
{pr19579b.c} \
{} \
"libpr19579.so" \
] \
]
run_ld_link_exec_tests [] [list \
[list \
@@ -579,6 +594,15 @@
"pr18718pic2" \
"pass.out" \
"-O2 -fPIC -I../bfd" \
] \
[list \
"Run pr19579" \
"-pie -z text tmpdir/pr19579a.o tmpdir/libpr19579.so" \
"" \
{dummy.c} \
"pr19579" \
"pass.out" \
"-fPIE" \
] \
]
}
@@ -62,6 +62,7 @@
set tmpdir tmpdir
set SHCFLAG ""
set shared_needs_pic "no"
set COMPRESS_LDFLAG "-Wl,--compress-debug-sections=zlib-gabi"
if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } {
@@ -228,6 +229,7 @@
global support_protected
global shared_needs_pic
global PLT_CFLAGS
global COMPRESS_LDFLAG
if [ string match $visibility "hidden" ] {
set VSBCFLAG "-DHIDDEN_TEST"
@@ -384,7 +386,7 @@
} else { if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } {
visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o xcoff
} else {
visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb
visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb $COMPRESS_LDFLAG
} }
}
}}
@@ -1,4 +1,4 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-addr
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-nop
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-nop
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-0x67
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-0x90
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-0x90
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call3.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-144
#objdump: -dw
@@ -10,6 +10,8 @@
[ ]*[a-f0-9]+: ff d0 call \*%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ mov *0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: ff d0 call \*%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ call [a-f0-9]+ <__x86.get_pc_thunk.cx>
[ ]*[a-f0-9]+: [ a-f0-9]+ add \$0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: ff d1 call \*%ecx
[ ]*[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
@@ -12,10 +12,19 @@
call *%eax
movl plt@GOT, %eax
call *%eax
movl foo@GOT(%ebx), %ecx
call __x86.get_pc_thunk.cx
addl $_GLOBAL_OFFSET_TABLE_, %ecx
movl foo@GOT(%ecx), %ecx
call *%ecx
subl $12, %esp
pushl $0
pushl $0 # Push a dummy return address onto stack.
jmp *myexit@GOT
.size main, .-main
.section .text.__x86.get_pc_thunk.cx,"axG",@progbits,__x86.get_pc_thunk.cx,comdat
.globl __x86.get_pc_thunk.cx
.hidden __x86.get_pc_thunk.cx
.type __x86.get_pc_thunk.cx, @function
__x86.get_pc_thunk.cx:
movl (%esp), %ecx
ret
@@ -19,7 +19,6 @@
pushl %esi
pushl %ebx
call __x86.get_pc_thunk.bx
1:
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $20, %esp
leal __FUNCTION__.1866@GOTOFF(%ebx), %esi
@@ -195,6 +195,14 @@
"--32" {pr17709a.s} {} "libpr17709.so"}
{"PR ld/17709 (2)" "-melf_i386 tmpdir/libpr17709.so" ""
"--32" {pr17709b.s} {{readelf -r pr17709.rd}} "pr17709"}
{"Build pr19827a.o" "" ""
"--32" { pr19827a.S }}
{"Build pr19827b.so" "-melf_i386 -shared" ""
"--32" { pr19827b.S } {} "pr19827b.so"}
{"Build pr19827" "-melf_i386 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" ""
"--32" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"}
{"Build pr19827.so" "-melf_i386 -shared -Bsymbolic" ""
"--32" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"}
}
# So as to avoid rewriting every last test case here in a nacl variant,
@@ -319,6 +327,15 @@
run_dump_test "load5b"
run_dump_test "load6"
run_dump_test "pr19175"
run_dump_test "pr19615"
run_dump_test "pr20117"
run_dump_test "pr20244-1a"
run_dump_test "pr20244-1b"
run_dump_test "pr20244-1c"
run_dump_test "pr20244-2a"
run_dump_test "pr20244-2b"
run_dump_test "pr20244-2c"
run_dump_test "pr20244-2d"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]
@@ -357,7 +374,7 @@
[list \
"Build libplt-main1.a" \
"" \
"-fPIC" \
"-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main1.c } \
{{readelf {-Wr} plt-main1.rd}} \
"libplt-main1.a" \
@@ -365,7 +382,7 @@
[list \
"Build libplt-main2.a" \
"" \
"-fPIC" \
"-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main2.c } \
{{readelf {-Wr} plt-main2.rd}} \
"libplt-main2.a" \
@@ -373,7 +390,7 @@
[list \
"Build libplt-main3.a" \
"" \
"-fPIC $PLT_CFLAGS" \
"-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main3.c } \
{{readelf {-Wr} plt-main3.rd}} \
"libplt-main3.a" \
@@ -381,7 +398,7 @@
[list \
"Build libplt-main4.a" \
"" \
"-fPIC $PLT_CFLAGS" \
"-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main4.c } \
{{readelf {-Wr} plt-main4.rd}} \
"libplt-main4.a" \
@@ -413,18 +430,26 @@
"copyreloc-lib.so" \
] \
[list \
"Build copyreloc-main with PIE and GOTOFF (1)" \
"tmpdir/copyreloc-lib.so -pie" \
"Build libcopyreloc-main.a" \
"" \
"" \
{ copyreloc-main.S } \
{} \
"libcopyreloc-main.a" \
] \
[list \
"Build copyreloc-main with PIE and GOTOFF (1)" \
"tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ dummy.s } \
{{readelf {-Wr} copyreloc-main1.rd}} \
"copyreloc-main" \
] \
[list \
"Build copyreloc-main with PIE and GOTOFF (2)" \
"tmpdir/copyreloc-lib.so -pie" \
"tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ copyreloc-main.S } \
{ dummy.s } \
{{readelf {-Wr} copyreloc-main2.rd}} \
"copyreloc-main" \
] \
@@ -501,18 +526,26 @@
"pr18900.so" \
] \
[list \
"Build pr18900a" \
"tmpdir/pr18900.so" \
"Build pr18900.o" \
"-r -nostdlib" \
"" \
{ pr18900b.c pr18900c.c } \
"" \
"pr18900.o" \
] \
[list \
"Build pr18900a" \
"tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ dummy.s } \
{{readelf {-Wrd} pr18900a.rd}} \
"pr18900a" \
] \
[list \
"Build pr18900b" \
"tmpdir/pr18900.so" \
"-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ pr18900b.c pr18900c.c } \
{ dummy.s } \
{{readelf {-Wrd} pr18900b.rd}} \
"pr18900b" \
] \
@@ -533,10 +566,18 @@
"got1d.so" \
] \
[list \
"Build gotpc1" \
"tmpdir/got1d.so" \
"Build gotpc1.o" \
"-r -nostdlib" \
"" \
{ got1a.S got1b.c got1c.c } \
"" \
"gotpc1.o" \
] \
[list \
"Build gotpc1" \
"-Wl,--as-needed tmpdir/gotpc1.o tmpdir/got1d.so" \
"-Wa,-mrelax-relocations=yes" \
{ dummy.s } \
{{objdump {-dw} got1.dd}} \
"got1" \
] \
@@ -580,9 +621,9 @@
] \
[list \
"Run copyreloc-main with PIE and GOTOFF" \
"tmpdir/copyreloc-lib.so -pie" \
"--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ copyreloc-main.S } \
{ dummy.s } \
"copyreloc-main" \
"copyreloc-main.out" \
] \
@@ -612,9 +653,9 @@
] \
[list \
"Run pr18900" \
"tmpdir/pr18900.so" \
"tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ pr18900b.c pr18900c.c } \
{ dummy.s } \
"pr18900" \
"pr18900.out" \
] \
@@ -633,6 +674,42 @@
{ got1a.S got1b.c got1c.c } \
"got1" \
"got1.out" \
] \
]
}
# Must be native with the C compiler and working IFUNC support,
if { [isnative]
&& [check_ifunc_available]
&& [istarget "i?86-*-*"]
&& [which $CC] != 0 } {
run_cc_link_tests [list \
[list \
"Build ifunc-1a.o ifunc-1b.o ifunc-1c.o ifunc-1d.o" \
"" \
"-fPIC -O2 -g" \
{ ifunc-1a.c ifunc-1b.S ifunc-1c.S ifunc-1d.S } \
] \
]
run_ld_link_exec_tests [] [list \
[list \
"Run ifunc-1a" \
"tmpdir/ifunc-1a.o tmpdir/ifunc-1b.o \
tmpdir/ifunc-1c.o tmpdir/ifunc-1d.o" \
"" \
{ dummy.c } \
"ifunc-1a" \
"pass.out" \
] \
[list \
"Run ifunc-1b" \
"--static tmpdir/ifunc-1a.o tmpdir/ifunc-1b.o \
tmpdir/ifunc-1c.o tmpdir/ifunc-1d.o" \
"" \
{ dummy.c } \
"ifunc-1b" \
"pass.out" \
] \
]
}
@@ -1,0 +1,8 @@
extern void check (void);
int
main ()
{
check ();
return 0;
}
@@ -1,0 +1,42 @@
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.p2align 4,,15
.globl check
.type check, @function
check:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
call *get_func1@GOT(%ebx)
cmpl func1@GOT(%ebx), %eax
jne .L3
call *func1@GOT(%ebx)
cmpl $1, %eax
jne .L3
call *call_func1@GOT(%ebx)
cmpl $1, %eax
jne .L3
call *call_func2@GOT(%ebx)
cmpl $2, %eax
jne .L3
leal .LC0@GOTOFF(%ebx), %eax
subl $12, %esp
pushl %eax
call *puts@GOT(%ebx)
addl $24, %esp
popl %ebx
ret
.L3:
call *abort@GOT(%ebx)
.size check, .-check
.section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat
.globl __x86.get_pc_thunk.bx
.hidden __x86.get_pc_thunk.bx
.type __x86.get_pc_thunk.bx, @function
__x86.get_pc_thunk.bx:
movl (%esp), %ebx
ret
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,26 @@
.text
.p2align 4,,15
.globl get_func1
.type get_func1, @function
get_func1:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
movl func1@GOT(%eax), %eax
ret
.size get_func1, .-get_func1
.p2align 4,,15
.globl call_func1
.type call_func1, @function
call_func1:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
jmp *func1@GOT(%eax)
.size call_func1, .-call_func1
.section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat
.globl __x86.get_pc_thunk.ax
.hidden __x86.get_pc_thunk.ax
.type __x86.get_pc_thunk.ax, @function
__x86.get_pc_thunk.ax:
movl (%esp), %eax
ret
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,76 @@
.text
.p2align 4,,15
.type implementation1, @function
implementation1:
movl $1, %eax
ret
.size implementation1, .-implementation1
.p2align 4,,15
.type implementation2, @function
implementation2:
movl $2, %eax
ret
.size implementation2, .-implementation2
.p2align 4,,15
.type resolver2, @function
resolver2:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
leal implementation2@GOTOFF(%eax), %eax
ret
.size resolver2, .-resolver2
.type func2, @gnu_indirect_function
.set func2,resolver2
.p2align 4,,15
.type resolver1, @function
resolver1:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
leal implementation1@GOTOFF(%eax), %eax
ret
.size resolver1, .-resolver1
.globl func1
.type func1, @gnu_indirect_function
.set func1,resolver1
.p2align 4,,15
.globl get_func2
.type get_func2, @function
get_func2:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
movl func2@GOT(%eax), %eax
ret
.size get_func2, .-get_func2
.p2align 4,,15
.globl call_func2
.type call_func2, @function
call_func2:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
call *get_func2@GOT(%ebx)
cmpl func2@GOT(%ebx), %eax
jne .L10
addl $8, %esp
movl %ebx, %eax
popl %ebx
jmp *func2@GOT(%eax)
.L10:
call *abort@GOT(%ebx)
.size call_func2, .-call_func2
.section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat
.globl __x86.get_pc_thunk.ax
.hidden __x86.get_pc_thunk.ax
.type __x86.get_pc_thunk.ax, @function
__x86.get_pc_thunk.ax:
movl (%esp), %eax
ret
.section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat
.globl __x86.get_pc_thunk.bx
.hidden __x86.get_pc_thunk.bx
.type __x86.get_pc_thunk.bx, @function
__x86.get_pc_thunk.bx:
movl (%esp), %ebx
ret
.section .note.GNU-stack,"",@progbits
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,5 +1,5 @@
#source: lea1.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
@@ -1,0 +1,19 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: 8b 80 ([0-9a-f]{2} ){4}[ ]+mov +-0x[a-f0-9]+\(%eax\),%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: ff a0 ([0-9a-f]{2} ){4}[ ]+jmp +\*-0x[0-9a-f]+\(%eax\)
#pass
@@ -1,0 +1,8 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +func
#pass
@@ -1,4 +1,4 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw --sym
#notarget: i?86-*-nacl* x86_64-*-nacl*
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -shared
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,3 +1,3 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -shared
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,4 +1,4 @@
#source: load4.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -Bsymbolic -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,4 +1,4 @@
#source: load5.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -Bsymbolic -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,5 +1,5 @@
#source: mov2.s
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -pie -melf_i386
#objdump: -dw
@@ -1,4 +1,4 @@
#as: --32
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
@@ -1,0 +1,43 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,10 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#pass
@@ -1,0 +1,31 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#pass
@@ -1,0 +1,16 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#pass
@@ -1,0 +1,31 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#pass
@@ -1,0 +1,14 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#pass
@@ -1,0 +1,43 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <.*puts.*>
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <abort>
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+,%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,7 @@
#readelf: -Wr
#target: i?86-*-*
#failif
#...
[0-9a-f ]+R_386_GLOB_DAT +.*
#pass
@@ -1,0 +1,43 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: 8d 80 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%eax\),%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax>
+[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,10 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#pass
@@ -1,0 +1,31 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#pass
@@ -1,0 +1,16 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func)
#pass
@@ -1,0 +1,31 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 53 push %ebx
+[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx>
+[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx
+[a-f0-9]+: 83 ec 08 sub \$0x8,%esp
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 75 2f jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 22 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 15 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 50 push %eax
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
+[a-f0-9]+: 83 c4 18 add \$0x18,%esp
+[a-f0-9]+: 5b pop %ebx
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\)
#pass
@@ -1,0 +1,14 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func)
#pass
@@ -1,0 +1,34 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2c jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1f jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 12 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+
+[a-f0-9]+: 83 c4 1c add \$0x1c,%esp
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,10 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).*
#pass
@@ -1,0 +1,33 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp +0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2c jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1f jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 12 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+
+[a-f0-9]+: 83 c4 1c add \$0x1c,%esp
+[a-f0-9]+: c3 ret
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4}[ ]+mov +0x[a-f0-9]+,%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp +\*0x[0-9a-f]+
#pass
@@ -1,0 +1,12 @@
#readelf: -Wr
#target: i?86-*-*
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym. Value +Symbol's Name
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func)
#...
[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func)
#pass
@@ -1,0 +1,34 @@
#objdump: -dwrj.text
#target: i?86-*-*
.*: +file format elf32-i386.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <get_func>
+[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax
+[a-f0-9]+: 75 2c jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1f jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 12 jne +[0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
+[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <.*puts.*>
+[a-f0-9]+: 83 c4 1c add \$0x1c,%esp
+[a-f0-9]+: c3 ret
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <abort>
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax
+[a-f0-9]+: c3 ret
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,7 @@
#readelf: -Wr
#target: i?86-*-*
#failif
#...
[0-9a-f ]+R_386_GLOB_DAT +.*
#pass
@@ -1,0 +1,39 @@
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.p2align 4,,15
.globl check
.type check, @function
check:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
call *get_func@GOT(%ebx)
cmpl func@GOT(%ebx), %eax
jne .L3
call *func@GOT(%ebx)
cmpl $305419896, %eax
jne .L3
call *call_func@GOT(%ebx)
cmpl $305419896, %eax
jne .L3
leal .LC0@GOTOFF(%ebx), %eax
subl $12, %esp
pushl %eax
call *puts@GOT(%ebx)
addl $24, %esp
popl %ebx
ret
.L3:
call *abort@GOT(%ebx)
.size check, .-check
.section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat
.globl __x86.get_pc_thunk.bx
.hidden __x86.get_pc_thunk.bx
.type __x86.get_pc_thunk.bx, @function
__x86.get_pc_thunk.bx:
movl (%esp), %ebx
ret
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,28 @@
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.p2align 4,,15
.globl check
.type check, @function
check:
subl $12, %esp
call *get_func@GOT
cmpl func@GOT, %eax
jne .L3
call *func@GOT
cmpl $305419896, %eax
jne .L3
call *call_func@GOT
cmpl $305419896, %eax
jne .L3
subl $12, %esp
pushl $.LC0
call *puts@GOT
addl $28, %esp
ret
.L3:
call *abort@GOT
.size check, .-check
.text
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,26 @@
.text
.p2align 4,,15
.globl get_func
.type get_func, @function
get_func:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
movl func@GOT(%eax), %eax
ret
.size get_func, .-get_func
.p2align 4,,15
.globl call_func
.type call_func, @function
call_func:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSET_TABLE_, %eax
jmp *func@GOT(%eax)
.size call_func, .-call_func
.section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat
.globl __x86.get_pc_thunk.ax
.hidden __x86.get_pc_thunk.ax
.type __x86.get_pc_thunk.ax, @function
__x86.get_pc_thunk.ax:
movl (%esp), %eax
ret
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,16 @@
.text
.p2align 4,,15
.globl get_func
.type get_func, @function
get_func:
movl func@GOT, %eax
ret
.size get_func, .-get_func
.p2align 4,,15
.globl call_func
.type call_func, @function
call_func:
jmp *func@GOT
.size call_func, .-call_func
.section .text.unlikely
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,5 @@
int
func (void)
{
return 0x12345678;
}
@@ -1,0 +1,8 @@
extern void check (void);
int
main ()
{
check ();
return 0;
}
@@ -1,0 +1,290 @@
# Expect script for i386 no-PLT tests.
# Copyright (C) 2016 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# The following tests require running the executable generated by ld,
# or enough of a build environment to create a fully linked executable.
# This is not commonly available when testing a cross-built linker.
if ![isnative] {
return
}
if ![is_elf_format] {
return
}
if ![istarget "i?86-*-*"] {
return
}
# Check to see if the C compiler works
if { [which $CC] == 0 } {
return
}
run_cc_link_tests [list \
[list \
"Build no-plt-func1.o no-plt-main1.o" \
"" \
"-fPIE" \
{no-plt-func1.c no-plt-main1.c} \
] \
[list \
"Build no-plt-check1a.o no-plt-extern1a.o \
no-plt-check1b.o no-plt-extern1b.o" \
"" \
"-Wa,-mrelax-relocations=yes" \
{no-plt-check1a.S no-plt-extern1a.S \
no-plt-check1b.S no-plt-extern1b.S } \
] \
[list \
"Build libno-plt-1a.so" \
"-shared tmpdir/no-plt-func1.o" \
"" \
{dummy.s} \
{} \
"libno-plt-1a.so" \
] \
[list \
"Build libno-plt-1b.so" \
"-shared tmpdir/no-plt-extern1a.o" \
"" \
{dummy.s} \
{{readelf -Wr libno-plt-1b.rd} \
{objdump -dwrj.text libno-plt-1b.dd}} \
"libno-plt-1b.so" \
] \
[list \
"No PLT (dynamic 1a)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1a.rd} {objdump -dwrj.text no-plt-1a.dd}} \
"no-plt-1a" \
] \
[list \
"No PLT (dynamic 1b)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1b.rd} {objdump -dwrj.text no-plt-1b.dd}} \
"no-plt-1b" \
] \
[list \
"No PLT (dynamic 1c)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1c.rd} {objdump -dwrj.text no-plt-1c.dd}} \
"no-plt-1c" \
] \
[list \
"No PLT (static 1d)" \
"-static tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1d.rd} {objdump -dwrj.text no-plt-1d.dd}} \
"no-plt-1d" \
] \
[list \
"No PLT (PIE 1e)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1e.rd} {objdump -dwrj.text no-plt-1e.dd}} \
"no-plt-1e" \
] \
[list \
"No PLT (PIE 1f)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
{{readelf -Wr no-plt-1f.rd} {objdump -dwrj.text no-plt-1f.dd}} \
"no-plt-1f" \
] \
[list \
"No PLT (PIE 1g)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
{{readelf -Wr no-plt-1g.rd} {objdump -dwrj.text no-plt-1g.dd}} \
"no-plt-1g" \
] \
[list \
"No PLT (dynamic 1h)" \
"tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1h.rd} {objdump -dwrj.text no-plt-1h.dd}} \
"no-plt-1h" \
] \
[list \
"No PLT (dynamic 1i)" \
"tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-extern1b.o tmpdir/libno-plt-1a.so" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1i.rd} {objdump -dwrj.text no-plt-1i.dd}} \
"no-plt-1i" \
] \
[list \
"No PLT (static 1j)" \
"-static tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1j.rd} {objdump -dwrj.text no-plt-1j.dd}} \
"no-plt-1j" \
] \
]
run_ld_link_exec_tests [] [list \
[list \
"No PLT (dynamic 1a)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{ dummy.s } \
"no-plt-1a" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1b)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1b" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1c)" \
"tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1c" \
"pass.out" \
] \
[list \
"No PLT (static 1d)" \
"-static tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{ dummy.s } \
"no-plt-1d" \
"pass.out" \
] \
[list \
"No PLT (PIE 1e)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \
"" \
{ dummy.s } \
"no-plt-1e" \
"pass.out" \
] \
[list \
"No PLT (PIE 1f)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1f" \
"pass.out" \
] \
[list \
"No PLT (PIE 1g)" \
"-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1g" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1h)" \
"tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \
"" \
{dummy.s} \
"no-plt-1h" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1i)" \
"tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-extern1b.o tmpdir/libno-plt-1a.so" \
"" \
{dummy.s} \
"no-plt-1i" \
"pass.out" \
] \
[list \
"No PLT (static 1j)" \
"-static tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \
"" \
{dummy.s} \
"no-plt-1j" \
"pass.out" \
] \
]
# Run-time tests which require working IFUNC support.
if { [check_ifunc_available] } {
run_cc_link_tests [list \
[list \
"Build pr20244-3a.o pr20244-3b.o pr20244-3c.o pr20244-3d.o" \
"" \
"-fPIC -O2 -g" \
{ pr20244-3a.c pr20244-3b.S pr20244-3c.S pr20244-3d.S } \
] \
]
run_ld_link_exec_tests [] [list \
[list \
"Run pr20244-3a" \
"tmpdir/pr20244-3a.o tmpdir/pr20244-3b.o \
tmpdir/pr20244-3c.o tmpdir/pr20244-3d.o" \
"" \
{ dummy.c } \
"pr20244-3a" \
"pass.out" \
] \
[list \
"Run pr20244-3b" \
"--static tmpdir/pr20244-3a.o tmpdir/pr20244-3b.o \
tmpdir/pr20244-3c.o tmpdir/pr20244-3d.o" \
"" \
{ dummy.c } \
"pr20244-3b" \
"pass.out" \
] \
]
}
@@ -1,0 +1,1 @@
PASS
@@ -1,0 +1,13 @@
#as: --32
#ld: -pie -Bsymbolic -E -melf_i386
#readelf: -r --wide --dyn-syms
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name
[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
Symbol table '.dynsym' contains [0-9]+ entries:
Num: Value Size Type Bind Vis Ndx Name
#...
[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy
#...
@@ -1,0 +1,13 @@
.text
.globl _start
.type _start, @function
_start:
ret
.globl xyzzy
.type xyzzy, @function
xyzzy:
ret
.section ".xyzzy_ptr","aw",%progbits
.dc.a xyzzy
@@ -1,0 +1,5 @@
#readelf: -r --wide
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name
[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
@@ -1,0 +1,5 @@
#readelf: -r --wide
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name
[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
@@ -1,0 +1,8 @@
.text
.global _start
_start:
.dc.a foo
.data
.globl foo
foo:
.byte 0
@@ -1,0 +1,2 @@
.data
.dc.a foo
@@ -1,0 +1,12 @@
#as: --32
#ld: -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: eb 8b jmp [a-f0-9]+ <_start\-0x[a-f0-9]+>
[ ]*[a-f0-9]+: bd ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+\,%ebp
@@ -1,0 +1,7 @@
.comm DEBUGLEVEL,4,4
.text
.globl _start
.type _start, @function
_start:
.byte 0xeb, 0x8b
movl $DEBUGLEVEL@GOT, %ebp
@@ -1,0 +1,17 @@
.data
.type bar, @object
bar:
.byte 1
.size bar, .-bar
.globl foo
.type foo, @object
foo:
.byte 1
.size foo, .-foo
.text
.globl _start
.type _start, @function
_start:
movl $0, bar@GOT
cmpl $0, foo@GOT
movl $bar@GOT, %ecx
@@ -1,0 +1,26 @@
#source: pr20244-1.s
#as: --32
#ld: -m elf_i386
#objdump: --sym -dw
#notarget: i?86-*-nacl* x86_64-*-nacl*
.*: +file format .*
SYMBOL TABLE:
#...
0+80490a0 l O .data 00000001 bar
#...
0+8048074 g F .text 00000000 _start
#...
0+80490a1 g O .data 00000001 foo
#...
Disassembly of section .text:
0+8048074 <_start>:
+[a-f0-9]+: c7 05 8c 90 04 08 00 00 00 00 movl \$0x0,0x804908c
+[a-f0-9]+: 83 3d 90 90 04 08 00 cmpl \$0x0,0x8049090
+[a-f0-9]+: b9 f8 ff ff ff mov \$0xfffffff8,%ecx
#pass
@@ -1,0 +1,11 @@
#source: pr20244-1.s
#as: --32
#ld: -m elf_i386
#objdump: -s -j .got
#notarget: i?86-*-nacl* x86_64-*-nacl*
.*: +file format .*
Contents of section .got:
804908c a0900408 a1900408 +........ +
#pass
@@ -1,0 +1,4 @@
#source: pr20244-1.s
#as: --32
#ld: -pie -m elf_i386
#error: direct GOT relocation R_386_GOT32 against `bar' without base register can not be used when making a shared object
@@ -1,0 +1,17 @@
.text
.globl foo
.type foo, @gnu_indirect_function
foo:
ret
.text
.type bar, @gnu_indirect_function
bar:
ret
.globl _start
.type _start, @function
_start:
call *foo@GOT
jmp *bar@GOT
movl $0, bar@GOT
cmpl $0, foo@GOT
movl $bar@GOT, %ecx
@@ -1,0 +1,43 @@
#source: pr20244-2.s
#as: --32
#ld: -m elf_i386
#objdump: --sym -dw
#notarget: i?86-*-nacl* x86_64-*-nacl*
.*: +file format .*
SYMBOL TABLE:
#...
0+80480b1 l i .text 00000000 bar
#...
0+80480b2 g F .text 00000000 _start
#...
0+80480b0 g i .text 00000000 foo
#...
Disassembly of section .plt:
0+8048090 <.plt>:
+[a-f0-9]+: ff 25 e0 90 04 08 jmp \*0x80490e0
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 00 00 00 00 jmp 80480a0 <foo-0x10>
+[a-f0-9]+: ff 25 e4 90 04 08 jmp \*0x80490e4
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 00 00 00 00 jmp 80480b0 <foo>
Disassembly of section .text:
0+80480b0 <foo>:
+[a-f0-9]+: c3 ret
0+80480b1 <bar>:
+[a-f0-9]+: c3 ret
0+80480b2 <_start>:
+[a-f0-9]+: ff 15 e0 90 04 08 call \*0x80490e0
+[a-f0-9]+: ff 25 e4 90 04 08 jmp \*0x80490e4
+[a-f0-9]+: c7 05 e4 90 04 08 00 00 00 00 movl \$0x0,0x80490e4
+[a-f0-9]+: 83 3d e0 90 04 08 00 cmpl \$0x0,0x80490e0
+[a-f0-9]+: b9 10 00 00 00 mov \$0x10,%ecx
#pass
@@ -1,0 +1,11 @@
#source: pr20244-2.s
#as: --32
#ld: -m elf_i386
#objdump: -s -j .got.plt
#notarget: i?86-*-nacl* x86_64-*-nacl*
.*: +file format .*
Contents of section .got.plt:
80490d4 00000000 00000000 00000000 b0800408 ................
80490e4 b1800408 ....
@@ -1,0 +1,10 @@
#source: pr20244-2.s
#as: --32
#ld: -m elf_i386
#readelf: -rW
#notarget: i?86-*-nacl* x86_64-*-nacl*
Relocation section '.rel.plt' at offset 0x74 contains 2 entries:
Offset Info Type Sym. Value Symbol's Name
0+80490e4 0000002a R_386_IRELATIVE
0+80490e0 0000002a R_386_IRELATIVE
@@ -1,0 +1,4 @@
#source: pr20244-2.s
#as: --32
#ld: -pie -m elf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
@@ -1,0 +1,8 @@
extern void check (void);
int
main ()
{
check ();
return 0;
}
@@ -1,0 +1,30 @@
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.p2align 4,,15
.globl check
.type check, @function
check:
subl $12, %esp
call *get_func1@GOT
cmpl $func1, %eax
jne .L3
call *func1@GOT
cmpl $1, %eax
jne .L3
call *call_func1@GOT
cmpl $1, %eax
jne .L3
call *call_func2@GOT
cmpl $2, %eax
jne .L3
subl $12, %esp
pushl $.LC0
call *puts@GOT
addl $28, %esp
ret
.L3:
call *abort@GOT
.size check, .-check
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,15 @@
.text
.p2align 4,,15
.globl get_func1
.type get_func1, @function
get_func1:
movl func1@GOT, %eax
ret
.size get_func1, .-get_func1
.p2align 4,,15
.globl call_func1
.type call_func1, @function
call_func1:
jmp *func1@GOT
.size call_func1, .-call_func1
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,44 @@
.text
.p2align 4,,15
.type implementation1, @function
implementation1:
movl $1, %eax
ret
.size implementation1, .-implementation1
.p2align 4,,15
.type implementation2, @function
implementation2:
movl $2, %eax
ret
.size implementation2, .-implementation2
.p2align 4,,15
.type resolver2, @function
resolver2:
movl implementation2@GOT, %eax
ret
.size resolver2, .-resolver2
.type func2, @gnu_indirect_function
.set func2,resolver2
.p2align 4,,15
.type resolver1, @function
resolver1:
movl implementation1@GOT, %eax
ret
.size resolver1, .-resolver1
.globl func1
.type func1, @gnu_indirect_function
.set func1,resolver1
.p2align 4,,15
.globl get_func2
.type get_func2, @function
get_func2:
movl func2@GOT, %eax
ret
.size get_func2, .-get_func2
.p2align 4,,15
.globl call_func2
.type call_func2, @function
call_func2:
jmp *func2@GOT
.size call_func2, .-call_func2
.section .note.GNU-stack,"",@progbits
@@ -1,4 +1,4 @@
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
#target: x86_64-*-*
@@ -1,4 +1,4 @@
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
#target: x86_64-*-*
@@ -1,5 +1,5 @@
#source: ifunc-5-local-x86-64.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -r -melf_x86_64
#readelf: -r --wide
#target: x86_64-*-*
@@ -400,9 +400,20 @@
|| [istarget "x86_64-*-linux*"]
|| [istarget "amd64-*-linux*"]) } {
set testname "PR ld/12365"
set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"]
set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin -o tmpdir/pr12365 tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"]
if { [ regexp "undefined reference to `my_bcopy'" $exec_output ] } {
# Linker should catch the reference to undefined `my_bcopy'
# error caused by a GCC bug.
pass $testname
} elseif { [ string match "" $exec_output ] } {
global READELF
set exec_output [run_host_cmd "$READELF" "-s -W tmpdir/pr12365"]
if { [ regexp "my_bcopy" $exec_output ] } {
# Verify that there is no `my_bcopy' symbol in executable.
fail $testname
} {
pass $testname
}
} {
fail $testname
}
@@ -138,6 +138,11 @@
{"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s}
{{objdump -dr tlsopt4_32.d}}
"tlsopt4_32"}
{"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" "" "-a32" {tlsdll_32.s}
{} "tlsdll32.so"}
{"TLS32 opt 5" "-melf32ppc --gc-sections --secure-plt tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s}
{{objdump -dr tlsopt5_32.d}}
"tlsopt5_32"}
{"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s}
{} "sdalib.so"}
{"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s}
@@ -203,6 +208,11 @@
{"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s}
{{objdump -dr tlsopt4.d}}
"tlsopt4"}
{"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s}
{} "tlsdll.so"}
{"TLS opt 5" "-melf64ppc --gc-sections tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
{{objdump -dr tlsopt5.d}}
"tlsopt5"}
{"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
{{objdump -dj.data symtocbase.d}} "symtocbase.so"}
{"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s}
@@ -1,0 +1,19 @@
.abiversion 2
.global __tls_get_addr,__tls_get_addr_opt,gd,ld
.type __tls_get_addr,@function
.type __tls_get_addr_opt,@function
.text
__tls_get_addr:
__tls_get_addr_opt:
blr
.size __tls_get_addr,. - __tls_get_addr
.size __tls_get_addr_opt,. - __tls_get_addr_opt
.section ".tbss","awT",@nobits
.p2align 3
gd: .space 8
.section ".tdata","awT",@progbits
.p2align 2
ld: .long 0xc0ffee
@@ -1,0 +1,7 @@
GLIBC_2.3 {
__tls_get_addr;
};
GLIBC_2.22 {
__tls_get_addr_opt;
} GLIBC_2.3;
@@ -1,0 +1,18 @@
.global __tls_get_addr,__tls_get_addr_opt,gd,ld
.type __tls_get_addr,@function
.type __tls_get_addr_opt,@function
.text
__tls_get_addr:
__tls_get_addr_opt:
blr
.size __tls_get_addr,. - __tls_get_addr
.size __tls_get_addr_opt,. - __tls_get_addr_opt
.section ".tbss","awT",@nobits
.p2align 2
gd: .space 4
.section ".tdata","awT",@progbits
.p2align 2
ld: .long 0xc0ffee
@@ -1,0 +1,54 @@
#source: tlsopt5.s
#as: -a64
#ld: --gc-sections tlsdll.so
#objdump: -dr
#target: powerpc64*-*-*
.*
Disassembly of section \.text:
0000000010000300 <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>:
.*: (00 00 63 e9|e9 63 00 00) ld r11,0\(r3\)
.*: (08 00 83 e9|e9 83 00 08) ld r12,8\(r3\)
.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
.*: (00 00 2b 2c|2c 2b 00 00) cmpdi r11,0
.*: (14 6a 6c 7c|7c 6c 6a 14) add r3,r12,r13
.*: (20 00 82 4d|4d 82 00 20) beqlr
.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
.*: (08 00 61 f9|f9 61 00 08) std r11,8\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (21 04 80 4e|4e 80 04 21) bctrl
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (08 00 61 e9|e9 61 00 08) ld r11,8\(r1\)
.*: (a6 03 68 7d|7d 68 03 a6) mtlr r11
.*: (20 00 80 4e|4e 80 00 20) blr
0000000010000344 <_start>:
.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
.*: (b9 ff ff 4b|4b ff ff b9) bl .*
.*: (00 00 00 60|60 00 00 00) nop
.*: (b8 02 01 00|00 00 00 00) .*
.*: (00 00 00 00|00 01 02 b8) .*
0000000010000358 <__glink_PLTresolve>:
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (05 00 9f 42|42 9f 00 05) bcl .*
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
.*: (20 04 80 4e|4e 80 04 20) bctr
.*: (00 00 00 60|60 00 00 00) nop
0000000010000390 <__tls_get_addr_opt@plt>:
.*: (c8 ff ff 4b|4b ff ff c8) b .*
@@ -1,0 +1,5 @@
.globl _start
_start:
addi 3,2,gd@got@tlsgd
bl __tls_get_addr(gd@tlsgd)
nop
@@ -1,0 +1,52 @@
#source: tlsopt5_32.s
#as: -a32
#ld: --gc-sections --secure-plt tlsdll32.so
#objdump: -dr
#target: powerpc*-*-*
.*
Disassembly of section \.text:
01800230 <_start>:
.*: (f8 ff 6d 38|38 6d ff f8) addi r3,r13,-8
.*: (0d 00 00 48|48 00 00 0d) bl 1800240 <__tls_get_addr_opt@plt>
\.\.\.
01800240 <__tls_get_addr_opt@plt>:
.*: (00 00 63 81|81 63 00 00) lwz r11,0\(r3\)
.*: (04 00 83 81|81 83 00 04) lwz r12,4\(r3\)
.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
.*: (00 00 0b 2c|2c 0b 00 00) cmpwi r11,0
.*: (14 12 6c 7c|7c 6c 12 14) add r3,r12,r2
.*: (20 00 82 4d|4d 82 00 20) beqlr
.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
.*: (00 00 00 60|60 00 00 00) nop
.*: (81 01 60 3d|3d 60 01 81) lis r11,385
.*: (9c 03 6b 81|81 6b 03 9c) lwz r11,924\(r11\)
.*: (a6 03 69 7d|7d 69 03 a6) mtctr r11
.*: (20 04 80 4e|4e 80 04 20) bctr
01800270 <__glink>:
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
01800280 <__glink_PLTresolve>:
.*: (81 01 80 3d|3d 80 01 81) lis r12,385
.*: (80 fe 6b 3d|3d 6b fe 80) addis r11,r11,-384
.*: (94 03 0c 80|80 0c 03 94) lwz r0,916\(r12\)
.*: (90 fd 6b 39|39 6b fd 90) addi r11,r11,-624
.*: (a6 03 09 7c|7c 09 03 a6) mtctr r0
.*: (14 5a 0b 7c|7c 0b 5a 14) add r0,r11,r11
.*: (98 03 8c 81|81 8c 03 98) lwz r12,920\(r12\)
.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
.*: (20 04 80 4e|4e 80 04 20) bctr
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
.*: (00 00 00 60|60 00 00 00) nop
@@ -1,0 +1,4 @@
.globl _start
_start:
addi 3,13,gd@got@tlsgd
bl __tls_get_addr(gd@tlsgd)
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-addr
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-nop
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-nop
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-0x67
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-0x90
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-0x90
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-144
#objdump: -dw
@@ -1,5 +1,5 @@
#source: call1.s
#as: --x32
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -z call-nop=suffix-0x90
#objdump: -dw
@@ -1,0 +1,15 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: c3 retq
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#pass
@@ -1,0 +1,8 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +func \+ 0
#pass
@@ -1,5 +1,5 @@
#source: load1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw --sym
#notarget: x86_64-*-nacl*
@@ -1,5 +1,5 @@
#source: load1.s
#as: --x32
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64
#objdump: -dw --sym
#notarget: x86_64-*-nacl*
@@ -1,0 +1,32 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 4(0|8) 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[a-f0-9]+\(%rip\),%(e|r)ax +# [a-f0-9]+ <func>
+[a-f0-9]+: c3 retq
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,10 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0
#pass
@@ -1,0 +1,24 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#pass
@@ -1,0 +1,16 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#pass
@@ -1,0 +1,24 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#pass
@@ -1,0 +1,14 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#pass
@@ -1,0 +1,33 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ <.*puts.*>
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <abort>
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 4(0|8) 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[a-f0-9]+\(%rip\),%(e|r)ax +# [a-f0-9]+ <func>
+[a-f0-9]+: c3 retq
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,7 @@
#readelf: -Wr
#target: x86_64-*-*
#failif
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +.*
#pass
@@ -1,0 +1,32 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#...
[0-9a-f]+ <get_func>:
+[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <func>
+[a-f0-9]+: c3 retq
#...
[0-9a-f]+ <call_func>:
+[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ <func>
+[a-f0-9]+: 90 nop
#pass
@@ -1,0 +1,10 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0
#pass
@@ -1,0 +1,24 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#pass
@@ -1,0 +1,16 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0
#pass
@@ -1,0 +1,24 @@
#objdump: -dwrj.text
#target: x86_64-*-*
.*: +file format elf.*-x86-64.*
Disassembly of section .text:
#...
[0-9a-f]+ <check>:
+[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 75 2b jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 1e jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax
+[a-f0-9]+: 75 11 jne [0-9a-f]+ <check\+0x[0-9a-f]+>
+[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
+[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+>
#pass
@@ -1,0 +1,14 @@
#readelf: -Wr
#target: x86_64-*-*
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#...
[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0
#pass
@@ -1,0 +1,25 @@
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.p2align 4,,15
.globl check
.type check, @function
check:
subq $8, %rsp
call *get_func@GOTPCREL(%rip)
cmpq func@GOTPCREL(%rip), %rax
jne .L3
call *func@GOTPCREL(%rip)
cmpl $305419896, %eax
jne .L3
call *call_func@GOTPCREL(%rip)
cmpl $305419896, %eax
jne .L3
leaq .LC0(%rip), %rdi
addq $8, %rsp
jmp *puts@GOTPCREL(%rip)
.L3:
call *abort@GOTPCREL(%rip)
.size check, .-check
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,15 @@
.text
.p2align 4,,15
.globl get_func
.type get_func, @function
get_func:
movq func@GOTPCREL(%rip), %rax
ret
.size get_func, .-get_func
.p2align 4,,15
.globl call_func
.type call_func, @function
call_func:
jmp *func@GOTPCREL(%rip)
.size call_func, .-call_func
.section .note.GNU-stack,"",@progbits
@@ -1,0 +1,5 @@
int
func (void)
{
return 0x12345678;
}
@@ -1,0 +1,8 @@
extern void check (void);
int
main ()
{
check ();
return 0;
}
@@ -1,0 +1,201 @@
# Expect script for x86-64 no-PLT tests.
# Copyright (C) 2016 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# The following tests require running the executable generated by ld,
# or enough of a build environment to create a fully linked executable.
# This is not commonly available when testing a cross-built linker.
if ![isnative] {
return
}
if ![is_elf_format] {
return
}
if ![istarget "x86_64-*-*"] {
return
}
# Check to see if the C compiler works
if { [which $CC] == 0 } {
return
}
run_cc_link_tests [list \
[list \
"Build no-plt-func1.o no-plt-main1.o" \
"" \
"-fPIE" \
{no-plt-func1.c no-plt-main1.c} \
] \
[list \
"Build no-plt-check1.o no-plt-extern1.o" \
"" \
"-Wa,-mrelax-relocations=yes" \
{no-plt-check1.S no-plt-extern1.S} \
] \
[list \
"Build libno-plt-1a.so" \
"-shared tmpdir/no-plt-func1.o" \
"" \
{dummy.s} \
{} \
"libno-plt-1a.so" \
] \
[list \
"Build libno-plt-1b.so" \
"-shared tmpdir/no-plt-extern1.o" \
"" \
{dummy.s} \
{{readelf -Wr libno-plt-1b.rd} \
{objdump -dwrj.text libno-plt-1b.dd}} \
"libno-plt-1b.so" \
] \
[list \
"No PLT (dynamic 1a)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1a.rd} {objdump -dwrj.text no-plt-1a.dd}} \
"no-plt-1a" \
] \
[list \
"No PLT (dynamic 1b)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1b.rd} {objdump -dwrj.text no-plt-1b.dd}} \
"no-plt-1b" \
] \
[list \
"No PLT (dynamic 1c)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1c.rd} {objdump -dwrj.text no-plt-1c.dd}} \
"no-plt-1c" \
] \
[list \
"No PLT (static 1d)" \
"-static tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1d.rd} {objdump -dwrj.text no-plt-1d.dd}} \
"no-plt-1d" \
] \
[list \
"No PLT (PIE 1e)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{dummy.s} \
{{readelf -Wr no-plt-1e.rd} {objdump -dwrj.text no-plt-1e.dd}} \
"no-plt-1e" \
] \
[list \
"No PLT (PIE 1f)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
{{readelf -Wr no-plt-1f.rd} {objdump -dwrj.text no-plt-1f.dd}} \
"no-plt-1f" \
] \
[list \
"No PLT (PIE 1g)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
{{readelf -Wr no-plt-1g.rd} {objdump -dwrj.text no-plt-1g.dd}} \
"no-plt-1g" \
] \
]
run_ld_link_exec_tests [] [list \
[list \
"No PLT (dynamic 1a)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{ dummy.s } \
"no-plt-1a" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1b)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1b" \
"pass.out" \
] \
[list \
"No PLT (dynamic 1c)" \
"tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1c" \
"pass.out" \
] \
[list \
"No PLT (static 1d)" \
"-static tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{ dummy.s } \
"no-plt-1d" \
"pass.out" \
] \
[list \
"No PLT (PIE 1e)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \
"" \
{ dummy.s } \
"no-plt-1e" \
"pass.out" \
] \
[list \
"No PLT (PIE 1f)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1f" \
"pass.out" \
] \
[list \
"No PLT (PIE 1g)" \
"-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \
tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \
"" \
{ dummy.s } \
"no-plt-1g" \
"pass.out" \
] \
]
@@ -1,0 +1,1 @@
PASS
@@ -1,0 +1,12 @@
#as: --64
#ld: -melf_x86_64 -shared -z max-page-size=0x200000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
#pass
@@ -1,0 +1,8 @@
.hidden foo
.comm pad,0x80000000,8
.comm foo,8,8
.text
.globl bar
.type bar, @function
bar:
movq foo@GOTPCREL(%rip), %rax
@@ -1,0 +1,13 @@
#as: --64
#ld: -pie -Bsymbolic -E -melf_x86_64
#readelf: -r --wide --dyn-syms
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Symbol's Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9]+
Symbol table '.dynsym' contains [0-9]+ entries:
Num: Value Size Type Bind Vis Ndx Name
#...
[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy
#...
@@ -1,0 +1,13 @@
.text
.globl _start
.type _start, @function
_start:
ret
.globl xyzzy
.type xyzzy, @function
xyzzy:
ret
.section ".xyzzy_ptr","aw",%progbits
.dc.a xyzzy
@@ -1,0 +1,5 @@
#readelf: -r --wide
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Symbol's Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+
@@ -1,0 +1,5 @@
#readelf: -r --wide
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Symbol's Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+
@@ -1,0 +1,8 @@
.text
.global _start
_start:
.dc.a foo
.data
.globl foo
foo:
.byte 0
@@ -1,0 +1,2 @@
.data
.dc.a foo
@@ -1,0 +1,11 @@
#as: --64
#ld: -pie -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
@@ -1,0 +1,11 @@
.section .lbss,"aw",@nobits
foo1:
.space 1073741824
.space 1073741824
.space 1073741824
.text
.globl _start
.type _start, @function
_start:
movq foo1@GOTPCREL(%rip), %rax
.size _start, .-_start
@@ -1,0 +1,11 @@
#as: --64
#ld: -pie -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
@@ -1,0 +1,9 @@
.largecomm foo1,1073741824,32
.largecomm foo2,1073741824,32
.largecomm foo3,1073741824,32
.text
.globl _start
.type _start, @function
_start:
movq foo1@GOTPCREL(%rip), %rax
.size _start, .-_start
@@ -148,6 +148,14 @@
"--64" {pr17709a.s} {} "libpr17709.so"}
{"PR ld/17709 (2)" "-melf_x86_64 tmpdir/libpr17709.so" ""
"--64" {pr17709b.s} {{readelf -rW pr17709.rd}} "pr17709"}
{"Build pr19827a.o" "" ""
"--64" { pr19827a.S }}
{"Build pr19827b.so" "-melf_x86_64 -shared" ""
"--64" { pr19827b.S } {} "pr19827b.so"}
{"Build pr19827" "-melf_x86_64 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" ""
"--64" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"}
{"Build pr19827.so" "-melf_x86_64 -shared -Bsymbolic" ""
"--64" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"}
}
# So as to avoid rewriting every last test case here in a nacl variant,
@@ -239,6 +247,8 @@
run_dump_test "pr14207"
run_dump_test "gotplt1"
run_dump_test "pie1"
run_dump_test "pr20093-1"
run_dump_test "pr20093-2"
if { ![istarget "x86_64-*-linux*"] && ![istarget "x86_64-*-nacl*"]} {
return
@@ -353,6 +363,8 @@
run_dump_test "pr19013-nacl"
run_dump_test "pr19162"
run_dump_test "pr19175"
run_dump_test "pr18591"
run_dump_test "pr19615"
# Add $PLT_CFLAGS if PLT is expected.
global PLT_CFLAGS
@@ -391,7 +403,7 @@
[list \
"Build libplt-main1.a" \
"" \
"-fPIC" \
"-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main1.c } \
{{readelf {-Wr} plt-main1.rd}} \
"libplt-main1.a" \
@@ -399,7 +411,7 @@
[list \
"Build libplt-main2.a" \
"" \
"-fPIC" \
"-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main2.c } \
{{readelf {-Wr} plt-main2.rd}} \
"libplt-main2.a" \
@@ -407,7 +419,7 @@
[list \
"Build libplt-main3.a" \
"" \
"-fPIC $PLT_CFLAGS" \
"-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main3.c } \
{{readelf {-Wr} plt-main3.rd}} \
"libplt-main3.a" \
@@ -415,7 +427,7 @@
[list \
"Build libplt-main4.a" \
"" \
"-fPIC $PLT_CFLAGS" \
"-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main4.c } \
{{readelf {-Wr} plt-main4.rd}} \
"libplt-main4.a" \
@@ -447,18 +459,26 @@
"copyreloc-lib.so" \
] \
[list \
"Build copyreloc-main with PIE without -fPIE (1)" \
"tmpdir/copyreloc-lib.so -pie" \
"Build libcopyreloc-main.a" \
"" \
"" \
{ copyreloc-main.S } \
{} \
"libcopyreloc-main.a" \
] \
[list \
"Build copyreloc-main with PIE without -fPIE (1)" \
"tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ dummy.s } \
{{readelf {-Wr} copyreloc-main1.rd}} \
"copyreloc-main" \
] \
[list \
"Build copyreloc-main with PIE without -fPIE (2)" \
"tmpdir/copyreloc-lib.so -pie" \
"tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ copyreloc-main.S } \
{ dummy.s } \
{{readelf {-Wr} copyreloc-main2.rd}} \
"copyreloc-main" \
] \
@@ -479,26 +499,33 @@
"pr17689now.so" \
] \
[list \
"Build pr17689 with PIE without -fPIE" \
"tmpdir/pr17689.so -pie" \
"Build pr17689b.o" \
"" \
"" \
{ pr17689b.S } \
{} \
] \
[list \
"Build pr17689 with PIE without -fPIE" \
"tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
"" \
{ dummy.s } \
{{readelf {-Wr} pr17689.rd}} \
"pr17689" \
] \
[list \
"Build pr17689 with PIE -z now without -fPIE" \
"tmpdir/pr17689.so -pie -Wl,-z,now" \
"tmpdir/pr17689b.o tmpdir/pr17689.so -pie -Wl,-z,now" \
"" \
{ pr17689b.S } \
{ dummy.s } \
{{readelf {-Wr} pr17689now.rd}} \
"pr17689now" \
] \
[list \
"Build pr17827 with PIE without -fPIE" \
"tmpdir/pr17689.so -pie" \
"-Wl,--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
"" \
{ pr17689b.S } \
{ dummy.s } \
{{readelf {-Wr} pr17827.rd}} \
"pr17827" \
] \
@@ -511,18 +538,26 @@
"pr18900.so" \
] \
[list \
"Build pr18900a" \
"tmpdir/pr18900.so" \
"Build pr18900.o" \
"-r -nostdlib" \
"" \
{ pr18900b.c pr18900c.c } \
"" \
"pr18900.o" \
] \
[list \
"Build pr18900a" \
"tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ dummy.s } \
{{readelf {-Wrd} pr18900a.rd}} \
"pr18900a" \
] \
[list \
"Build pr18900b" \
"tmpdir/pr18900.so" \
"-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ pr18900b.c pr18900c.c } \
{ dummy.s } \
{{readelf {-Wrd} pr18900b.rd}} \
"pr18900b" \
] \
@@ -543,10 +578,18 @@
"gotpcrel1d.so" \
] \
[list \
"Build gotpcrel1" \
"tmpdir/gotpcrel1d.so" \
"Build libgotpcrel1.a" \
"" \
"" \
{ gotpcrel1a.S gotpcrel1b.c gotpcrel1c.c } \
"" \
"libgotpcrel1.a" \
] \
[list \
"Build gotpcrel1" \
"-Wl,--as-needed tmpdir/gotpcrel1a.o tmpdir/gotpcrel1b.o tmpdir/gotpcrel1c.o tmpdir/gotpcrel1d.so" \
"-Wa,-mrelax-relocations=yes" \
{ dummy.s } \
{{objdump {-dw} gotpcrel1.dd}} \
"gotpcrel1" \
] \
@@ -590,33 +633,33 @@
] \
[list \
"Run copyreloc-main with PIE without -fPIE" \
"tmpdir/copyreloc-lib.so -pie" \
"--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
{ copyreloc-main.S } \
{ dummy.s } \
"copyreloc-main" \
"copyreloc-main.out" \
] \
[list \
"Run pr17689 with PIE without -fPIE" \
"tmpdir/pr17689.so -pie" \
"tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
"" \
{ pr17689b.S } \
{ dummy.s } \
"pr17689" \
"pr17689.out" \
] \
[list \
"Run pr17689 with PIE -z now without -fPIE" \
"tmpdir/pr17689.so -pie -z now" \
"--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie -z now" \
"" \
{ pr17689b.S } \
{ dummy.s } \
"pr17689now" \
"pr17689.out" \
] \
[list \
"Run pr18900" \
"tmpdir/pr18900.so" \
"tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
{ pr18900b.c pr18900c.c } \
{ dummy.s } \
"pr18900" \
"pr18900.out" \
] \
@@ -15,11 +15,12 @@
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 <foo>
0+26 <foo>:
0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
@@ -27,4 +28,5 @@
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
#pass
@@ -9,6 +9,8 @@
mov.d32 (%eax),%ebx
mov.d32 3(%eax),%ebx
vmovdqu64.d32 -0x40(%eax),%xmm3
jmp foo
jmp.d8 foo
jmp.d32 foo
@@ -24,3 +26,5 @@
mov.d32 DWORD PTR [eax], ebx
mov.d32 DWORD PTR [eax+3], ebx
vmovdqu64.d32 xmm3,XMMWORD PTR [eax-0x40]
@@ -1,0 +1,31 @@
#source: got.s
#as: -mrelax-relocations=no
#objdump: -dwr
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 1: R_386_GOT32 foo
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 7: R_386_GOT32X foo
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax d: R_386_GOT32 foo
[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 12: R_386_GOT32 foo
[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 18: R_386_GOT32X foo
[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 1e: R_386_GOT32 foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 24: R_386_GOT32X foo
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 2a: R_386_GOT32 foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 30: R_386_GOT32X foo
[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 36: R_386_GOT32 foo
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 3b: R_386_GOT32 foo
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 41: R_386_GOT32X foo
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax 47: R_386_GOT32 foo
[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 4c: R_386_GOT32 foo
[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 52: R_386_GOT32X foo
[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 58: R_386_GOT32 foo
[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 5e: R_386_GOT32 foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 64: R_386_GOT32X foo
[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 6a: R_386_GOT32 foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 70: R_386_GOT32X foo
#pass
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#objdump: -dwr
.*: +file format .*
@@ -406,6 +406,7 @@
run_dump_test "relax-4"
run_dump_test "got"
run_dump_test "got-no-relax"
if {![istarget "*-*-nacl*"]} then {
run_dump_test "iamcu-1"
@@ -784,6 +785,7 @@
run_list_test "x86-64-branch-3" "-al -mintel64"
run_dump_test "x86-64-gotpcrel"
run_dump_test "x86-64-gotpcrel-no-relax"
}
set ASFLAGS "$old_ASFLAGS"
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#readelf: -rs
#name: i386 local PIC
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#objdump: -r
#source: mixed-mode-reloc.s
#name: x86 mixed mode relocs (32-bit object)
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#objdump: -Drw
#name: i386 relocs
@@ -3666,6 +3666,7 @@
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]
[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\]
@@ -10686,6 +10687,7 @@
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]
[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\]
@@ -3665,6 +3665,7 @@
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\}
@@ -10685,6 +10686,7 @@
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd -0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\}
@@ -3973,6 +3973,7 @@
vgatherqpd 123(%r14,%zmm31,8), %zmm30{%k1}
vgatherqpd 256(%r9,%zmm31), %zmm30{%k1}
vgatherqpd 1024(%rcx,%zmm31,4), %zmm30{%k1}
vgatherqpd 123(%r14,%zmm19,8), %zmm3{%k1}
vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1}
vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1}
@@ -11630,6 +11631,7 @@
vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123]
vgatherqpd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256]
vgatherqpd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024]
vgatherqpd zmm3{k1}, ZMMWORD PTR [r14+zmm19*8+123]
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123]
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123]
@@ -15,11 +15,12 @@
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 <foo>
0+26 <foo>:
0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
@@ -27,4 +28,5 @@
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
#pass
@@ -8,6 +8,7 @@
mov.d32 (%rax),%ebx
mov.d32 3(%rax),%ebx
vmovdqu64.d32 -0x40(%rax),%xmm3
jmp foo
jmp.d8 foo
@@ -24,3 +25,5 @@
mov.d32 DWORD PTR [rax], ebx
mov.d32 DWORD PTR [rax+3], ebx
vmovdqu64.d32 xmm3,XMMWORD PTR [rax-0x40]
@@ -1,0 +1,27 @@
#source: x86-64-gotpcrel.s
#as: -mrelax-relocations=no
#objdump: -dwr
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 3: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
#pass
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#objdump: -dwr
.*: +file format .*
@@ -1,3 +1,4 @@
#as: -mrelax-relocations=yes
#readelf: -rsW
#name: x86-64 local PIC
@@ -1,0 +1,49 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\)
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
\.\.\.
@@ -1,0 +1,31 @@
.text
.globl foo
.ent foo
foo:
ld $2, 0($4)
or $2, 0x89ab0000
l.d $f2, 0($4)
li.d $f2, 1.0000005128531484
.set push
.set mips3
ld $2, 0($4)
or $2, 0x89ab0000
dli $2, 0x9000000080000000
l.d $f2, 0($4)
li.d $f2, 1.0000005128531484
.set mips0
ld $2, 0($4)
or $2, 0x89ab0000
l.d $f2, 0($4)
li.d $f2, 1.0000005128531484
.set mips3
.set pop
ld $2, 0($4)
or $2, 0x89ab0000
l.d $f2, 0($4)
li.d $f2, 1.0000005128531484
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: number \(0x9000000080000000\) larger than 32 bits
.*:10: Error: number \(0x9000000080000000\) larger than 32 bits
.*:13: Error: number \(0x9000000080000000\) larger than 32 bits
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,50 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at
[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc44 0000 ld v0,0\(a0\)
[0-9a-f]+ <[^>]*> 5020 89ab li at,0x89ab
[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at
[0-9a-f]+ <[^>]*> 41a2 9000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> 5042 8000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 5021 89ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 5422 2c3b dmtc1 at,\$2
[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at
[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2
[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at
[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2
\.\.\.
@@ -1468,6 +1468,9 @@
run_dump_test "li-d"
run_dump_test_arches "isa-override-1" "" [mips_arch_list_matching mips1]
run_list_test_arches "isa-override-2" "-32" [mips_arch_list_matching mips1]
run_dump_test_arches "r6" [mips_arch_list_matching mips32r6]
if $has_newabi {
run_dump_test_arches "r6-n32" [mips_arch_list_matching mips64r6]
@@ -1,0 +1,53 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\)
[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc820000 0xdc820000
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> d4820000 0xd4820000
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 44a11000 0x44a11000
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\)
[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\)
[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
\.\.\.
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,50 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\)
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 44a11000 0x44a11000
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
\.\.\.
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips2@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,50 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\)
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 0x21438
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 0x10c38
[0-9a-f]+ <[^>]*> 44a11000 0x44a11000
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
\.\.\.
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips32r2@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips32r2@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips32r2@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,50 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\)
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\)
[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0
[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2
\.\.\.
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips64r2@isa-override-1.d
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips64r2@isa-override-1.d
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips64r2@isa-override-1.d
@@ -1,0 +1,6 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#stderr: octeon3@isa-override-1.l
#dump: mips64r2@isa-override-1.d
@@ -1,0 +1,2 @@
.*: Assembler messages:
.*:10: Warning: the `virt' extension requires MIPS64 revision 2 or greater
@@ -1,0 +1,5 @@
.*: Assembler messages:
.*:5: Error: number \(0x9000000080000000\) larger than 32 bits
.*:7: Warning: the `virt' extension requires MIPS64 revision 2 or greater
.*:10: Error: number \(0x9000000080000000\) larger than 32 bits
.*:13: Error: number \(0x9000000080000000\) larger than 32 bits
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips64r2@isa-override-1.d
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips1@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
#dump: mips1@isa-override-1.d
@@ -1,0 +1,4 @@
.*: Assembler messages:
.*:5: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
.*:10: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
.*:13: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
@@ -1,0 +1,18 @@
.text
.globl foo
.ent foo
foo:
dli $2, 0x9000000080000000
.set push
.set mips3
dli $2, 0x9000000080000000
.set mips0
dli $2, 0x9000000080000000
.set mips3
.set pop
dli $2, 0x9000000080000000
.end foo
.align 4, 0
.space 16
@@ -1,0 +1,28 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS ISA override code generation
#as: -32
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\)
[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
\.\.\.
@@ -1,0 +1,23 @@
.text
.globl foo
.ent foo
foo:
ld $2, 0($4)
or $2, 0x89ab0000
.set push
.set mips3
ld $2, 0($4)
or $2, 0x89ab0000
dli $2, 0x9000000080000000
.set mips0
ld $2, 0($4)
or $2, 0x89ab0000
.set mips3
.set pop
ld $2, 0($4)
or $2, 0x89ab0000
.end foo
.align 4, 0
.space 16
@@ -76,4 +76,5 @@
.*: (12 b5 17 44|44 17 b5 12) vslv v21,v21,v2
.*: (11 e9 0f 4d|4d 0f e9 11) vextuhrx r15,r9,v1
.*: (12 b1 87 8d|8d 87 b1 12) vextuwrx r21,r17,v16
.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23
#pass
@@ -67,3 +67,4 @@
vslv 21,21,2
vextuhrx 15,9,1
vextuwrx 21,17,16
vmsumudm 20,21,22,23
@@ -73,3 +73,20 @@
fc: (7c 43 09 8d|8d 09 43 7c) icblq. 2,r3,r1
100: (7c 10 02 dc|dc 02 10 7c) mftmr r0,16
104: (7c 10 03 dc|dc 03 10 7c) mttmr 16,r0
.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
.*: (7e a0 40 e8|e8 40 a0 7e) lharx r21,0,r8
.*: (7e a1 40 e8|e8 40 a1 7e) lharx r21,r1,r8
.*: (7e c0 48 28|28 48 c0 7e) lwarx r22,0,r9
.*: (7e c1 48 28|28 48 c1 7e) lwarx r22,r1,r9
.*: (7e e0 50 a8|a8 50 e0 7e) ldarx r23,0,r10
.*: (7e e1 50 a8|a8 50 e1 7e) ldarx r23,r1,r10
.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7
.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7
.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8
.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8
.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9
.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9
.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10
.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10
#pass
@@ -67,3 +67,19 @@
icblq. 2,3,1
mftmr 0,16
mttmr 16,0
lbarx 20,0,7
lbarx 20,1,7
lharx 21,0,8
lharx 21,1,8
lwarx 22,0,9
lwarx 22,1,9
ldarx 23,0,10
ldarx 23,1,10
stbcx. 10,0,7
stbcx. 10,1,7
sthcx. 11,0,8
sthcx. 11,1,8
stwcx. 12,0,9
stwcx. 12,1,9
stdcx. 13,0,10
stdcx. 13,1,10
@@ -10,7 +10,7 @@
Sections:
Idx Name +Size +VMA +LMA +File off +Algn
+0 \.text +0+e8 +0+ +0+ +.*
+0 \.text +0+108 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+1 \.data +0+20 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, DATA
@@ -106,3 +106,12 @@
.*: (7c 20 04 ac|ac 04 20 7c) lwsync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
.*: (7e 80 30 28|28 30 80 7e) lwarx r20,0,r6
.*: (7e 81 30 28|28 30 81 7e) lwarx r20,r1,r6
.*: (7e a0 38 a8|a8 38 a0 7e) ldarx r21,0,r7
.*: (7e a1 38 a8|a8 38 a1 7e) ldarx r21,r1,r7
.*: (7e c0 41 2d|2d 41 c0 7e) stwcx\. r22,0,r8
.*: (7e c1 41 2d|2d 41 c1 7e) stwcx\. r22,r1,r8
.*: (7e e0 49 ad|ad 49 e0 7e) stdcx\. r23,0,r9
.*: (7e e1 49 ad|ad 49 e1 7e) stdcx\. r23,r1,r9
#pass
@@ -79,6 +79,14 @@
sync 1
ptesync
sync 2
lwarx 20,0,6
lwarx 20,1,6
ldarx 21,0,7
ldarx 21,1,7
stwcx. 22,0,8
stwcx. 22,1,8
stdcx. 23,0,9
stdcx. 23,1,9
.section ".data"
usym0: .llong 0xcafebabe
@@ -160,4 +160,36 @@
.*: (7d 20 3f 99|99 3f 20 7d) stxvd2x vs41,0,r7
.*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8
.*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8
.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
.*: (7e 80 38 69|69 38 80 7e) lbarx r20,0,r7,1
.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
.*: (7e 81 38 69|69 38 81 7e) lbarx r20,r1,r7,1
.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8
.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8
.*: (7e a0 40 a9|a9 40 a0 7e) ldarx r21,0,r8,1
.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8
.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8
.*: (7e a1 40 a9|a9 40 a1 7e) ldarx r21,r1,r8,1
.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9
.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9
.*: (7e c0 48 e9|e9 48 c0 7e) lharx r22,0,r9,1
.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9
.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9
.*: (7e c1 48 e9|e9 48 c1 7e) lharx r22,r1,r9,1
.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10
.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10
.*: (7e e0 50 29|29 50 e0 7e) lwarx r23,0,r10,1
.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10
.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10
.*: (7e e1 50 29|29 50 e1 7e) lwarx r23,r1,r10,1
.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7
.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7
.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8
.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8
.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9
.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9
.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10
.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10
#pass
@@ -152,3 +152,35 @@
stxvd2x 41,0,7
stxvx 11,21,8
stxvd2x 11,21,8
lbarx 20,0,7
lbarx 20,0,7,0
lbarx 20,0,7,1
lbarx 20,1,7
lbarx 20,1,7,0
lbarx 20,1,7,1
ldarx 21,0,8
ldarx 21,0,8,0
ldarx 21,0,8,1
ldarx 21,1,8
ldarx 21,1,8,0
ldarx 21,1,8,1
lharx 22,0,9
lharx 22,0,9,0
lharx 22,0,9,1
lharx 22,1,9
lharx 22,1,9,0
lharx 22,1,9,1
lwarx 23,0,10
lwarx 23,0,10,0
lwarx 23,0,10,1
lwarx 23,1,10
lwarx 23,1,10,0
lwarx 23,1,10,1
stbcx. 10,0,7
stbcx. 10,1,7
sthcx. 11,0,8
sthcx. 11,1,8
stwcx. 12,0,9
stwcx. 12,1,9
stdcx. 13,0,10
stdcx. 13,1,10
@@ -278,6 +278,14 @@
.*: (7f a8 49 80|80 49 a8 7f) cmprb cr7,1,r8,r9
.*: (7d e0 01 00|00 01 e0 7d) setb r15,cr0
.*: (7d fc 01 00|00 01 fc 7d) setb r15,cr7
.*: (7e 00 01 01|01 01 00 7e) setbool r16,lt
.*: (7e 01 01 01|01 01 01 7e) setbool r16,gt
.*: (7e 02 01 01|01 01 02 7e) setbool r16,eq
.*: (7e 03 01 01|01 01 03 7e) setbool r16,so
.*: (7e 1c 01 01|01 01 1c 7e) setbool r16,4\*cr7\+lt
.*: (7e 1d 01 01|01 01 1d 7e) setbool r16,4\*cr7\+gt
.*: (7e 1e 01 01|01 01 1e 7e) setbool r16,4\*cr7\+eq
.*: (7e 1f 01 01|01 01 1f 7e) setbool r16,4\*cr7\+so
.*: (7f 40 52 1a|1a 52 40 7f) lxvl vs26,0,r10
.*: (7f 14 52 1b|1b 52 14 7f) lxvl vs56,r20,r10
.*: (7f 60 5b 1a|1a 5b 60 7f) stxvl vs27,0,r11
@@ -363,6 +371,8 @@
.*: (7c 00 f6 e4|e4 f6 00 7c) rmieg r30
.*: (7d 40 7a 6a|6a 7a 40 7d) ldmx r10,0,r15
.*: (7d 43 7a 6a|6a 7a 43 7d) ldmx r10,r3,r15
.*: (7d 60 83 6a|6a 83 60 7d) lwzmx r11,0,r16
.*: (7d 63 83 6a|6a 83 63 7d) lwzmx r11,r3,r16
.*: (4c 00 02 e4|e4 02 00 4c) stop
.*: (7c 00 00 3c|3c 00 00 7c) wait
.*: (7c 00 00 3c|3c 00 00 7c) wait
@@ -381,4 +391,29 @@
.*: (f0 6d bc 07|07 bc 6d f0) xsmaxcdp vs35,vs45,vs55
.*: (f0 8e c4 c7|c7 c4 8e f0) xsminjdp vs36,vs46,vs56
.*: (f0 af cc 87|87 cc af f0) xsmaxjdp vs37,vs47,vs57
.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23
.*: (7d 6c 69 54|54 69 6c 7d) addex r11,r12,r13,0
.*: (7d 6c 6b 54|54 6b 6c 7d) addex r11,r12,r13,1
.*: (7d 6c 6d 54|54 6d 6c 7d) addex r11,r12,r13,2
.*: (7e b6 b9 55|55 b9 b6 7e) addex\. r21,r22,r23,0
.*: (7e b6 bb 55|55 bb b6 7e) addex\. r21,r22,r23,1
.*: (7e b6 bd 55|55 bd b6 7e) addex\. r21,r22,r23,2
.*: (ff 20 04 8e|8e 04 20 ff) mffs f25
.*: (ff 20 04 8f|8f 04 20 ff) mffs\. f25
.*: (ff 41 04 8e|8e 04 41 ff) mffsce f26
.*: (ff 74 a4 8e|8e a4 74 ff) mffscdrn f27,f20
.*: (ff 95 04 8e|8e 04 95 ff) mffscdrni f28,0
.*: (ff 95 3c 8e|8e 3c 95 ff) mffscdrni f28,7
.*: (ff b6 ac 8e|8e ac b6 ff) mffscrn f29,f21
.*: (ff d7 04 8e|8e 04 d7 ff) mffscrni f30,0
.*: (ff d7 1c 8e|8e 1c d7 ff) mffscrni f30,3
.*: (ff f8 04 8e|8e 04 f8 ff) mffsl f31
.*: (7e 8a 01 76|76 01 8a 7e) brd r10,r20
.*: (7e ab 01 b6|b6 01 ab 7e) brh r11,r21
.*: (7e cc 01 36|36 01 cc 7e) brw r12,r22
.*: (11 6a 63 77|77 63 6a 11) nandxor r10,r11,r12,r13
.*: (12 b4 b5 f6|f6 b5 b4 12) xor3 r20,r21,r22,r23
.*: (11 6a 60 34|34 60 6a 11) rldixor r10,r11,0,r12
.*: (11 6a 66 f4|f4 66 6a 11) rldixor r10,r11,27,r12
.*: (11 6a 67 f5|f5 67 6a 11) rldixor r10,r11,63,r12
#pass
@@ -269,6 +269,14 @@
cmprb 7,1,8,9
setb 15,0
setb 15,7
setbool 16,0
setbool 16,1
setbool 16,2
setbool 16,3
setbool 16,28
setbool 16,29
setbool 16,30
setbool 16,31
lxvl 26,0,10
lxvl 56,20,10
stxvl 27,0,11
@@ -354,6 +362,8 @@
rmieg 30
ldmx 10,0,15
ldmx 10,3,15
lwzmx 11,0,16
lwzmx 11,3,16
stop
wait
wait 0
@@ -372,3 +382,28 @@
xsmaxcdp 35,45,55
xsminjdp 36,46,56
xsmaxjdp 37,47,57
vmsumudm 20,21,22,23
addex 11,12,13,0
addex 11,12,13,1
addex 11,12,13,2
addex. 21,22,23,0
addex. 21,22,23,1
addex. 21,22,23,2
mffs 25
mffs. 25
mffsce 26
mffscdrn 27,20
mffscdrni 28,0
mffscdrni 28,7
mffscrn 29,21
mffscrni 30,0
mffscrni 30,3
mffsl 31
brd 10,20
brh 11,21
brw 12,22
nandxor 10,11,12,13
xor3 20,21,22,23
rldixor 10,11,0,12
rldixor 10,11,27,12
rldixor 10,11,63,12
@@ -1,4 +1,5 @@
#source: ../x86-64-gotpcrel.s
#as: --x32 -mrelax-relocations=yes
#objdump: -dwr
#name: x86-64 (ILP32) gotpcrel
@@ -1,4 +1,5 @@
#source: ../x86-64-localpic.s
#as: --x32 -mrelax-relocations=yes
#readelf: -rsW
#name: x86-64 (ILP32) local PIC