From 5dcc710c269d6e55b5b473ee64d0f3601f4d1f79 Mon Sep 17 00:00:00 2001 From: Jérôme Duval Date: Thu, 21 Jul 2016 21:35:07 +0200 Subject: [PATCH] import binutils 2.26.1 --- binutils/md5.sum | 516 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- binutils/bfd/ChangeLog | 539 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- binutils/bfd/archive.c | 2 +- binutils/bfd/coff-alpha.c | 2 +- binutils/bfd/coff-i386.c | 60 ++++++++++++++++++++++++++++++------------------------------ binutils/bfd/coff-x86_64.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++--------------------------------- binutils/bfd/coffcode.h | 2 ++ binutils/bfd/cofflink.c | 6 ++++++ binutils/bfd/configure | 20 ++++++++++---------- binutils/bfd/development.sh | 2 +- binutils/bfd/dwarf2.c | 4 +++- binutils/bfd/elf-bfd.h | 8 +++++--- binutils/bfd/elf-strtab.c | 41 +++++++++++++++++++++++++++++++++++------ binutils/bfd/elf32-arm.c | 101 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------ binutils/bfd/elf32-avr.c | 36 +++++++++++++++++++++++++++++++----- binutils/bfd/elf32-hppa.c | 9 +++++++++ binutils/bfd/elf32-i386.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/bfd/elf32-ppc.c | 1 + binutils/bfd/elf64-hppa.c | 18 +++++++++++++----- binutils/bfd/elf64-ppc.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++--------------------------------- binutils/bfd/elf64-x86-64.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------- binutils/bfd/elflink.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------- binutils/bfd/elfnn-aarch64.c | 25 +++++++++++++++++++------ binutils/bfd/version.h | 2 +- binutils/bfd/version.m4 | 2 +- binutils/binutils/ChangeLog | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++------ binutils/binutils/Makefile.am | 1 + binutils/binutils/Makefile.in | 1 + binutils/binutils/configure | 20 ++++++++++---------- binutils/binutils/objcopy.c | 1 + binutils/binutils/objdump.c | 3 ++- binutils/elfcpp/ChangeLog | 4 ++-- binutils/gas/ChangeLog | 213 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/NEWS | 9 +++++++-- binutils/gas/config.in | 3 +++ binutils/gas/configure | 60 +++++++++++++++++++++++++++++++++++++++++++++++------------- binutils/gas/configure.ac | 31 ++++++++++++++++++++++++++++++- binutils/gas/write.c | 1 - binutils/gold/ChangeLog | 132 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------- binutils/gold/icf.cc | 115 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------ binutils/gprof/ChangeLog | 8 ++++++++ binutils/gprof/configure | 20 ++++++++++---------- binutils/include/ChangeLog | 230 ++++---------------------------------------------------------------------------- binutils/ld/ChangeLog | 559 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/configure | 22 +++++++++++----------- binutils/ld/configure.ac | 2 +- binutils/ld/ld.1 | 14 ++++++++++---- binutils/ld/ld.info | 565 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- binutils/ld/ld.texinfo | 12 +++++++++--- binutils/ld/lexsup.c | 11 +++++------ binutils/opcodes/ChangeLog | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++- binutils/opcodes/configure | 20 ++++++++++---------- binutils/opcodes/i386-dis.c | 4 ++-- binutils/opcodes/ppc-opc.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------ binutils/binutils/doc/addr2line.1 | 2 +- binutils/binutils/doc/ar.1 | 2 +- binutils/binutils/doc/binutils.info | 2 +- binutils/binutils/doc/binutils.texi | 2 +- binutils/binutils/doc/cxxfilt.man | 2 +- binutils/binutils/doc/dlltool.1 | 2 +- binutils/binutils/doc/nlmconv.1 | 2 +- binutils/binutils/doc/nm.1 | 2 +- binutils/binutils/doc/objcopy.1 | 4 ++-- binutils/binutils/doc/objdump.1 | 2 +- binutils/binutils/doc/ranlib.1 | 2 +- binutils/binutils/doc/readelf.1 | 2 +- binutils/binutils/doc/size.1 | 2 +- binutils/binutils/doc/strings.1 | 2 +- binutils/binutils/doc/strip.1 | 2 +- binutils/binutils/doc/windmc.1 | 2 +- binutils/binutils/doc/windres.1 | 2 +- binutils/binutils/testsuite/ChangeLog | 8 ++++---- binutils/gas/config/tc-arc.c | 1 + binutils/gas/config/tc-i386.c | 36 ++++++++++++++++++++++++++++++++---- binutils/gas/config/tc-mips.c | 42 ++++++++++++++++++++++++++++++++++-------- binutils/gas/doc/as.1 | 15 ++++++++++++++- binutils/gas/doc/as.info | 772 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--- binutils/gas/doc/c-i386.texi | 12 ++++++++++++ binutils/gas/testsuite/ChangeLog | 19 ++++++++++++------- binutils/include/aout/ChangeLog | 4 ++++ binutils/include/elf/ChangeLog | 126 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/include/gdb/ChangeLog | 10 +++++++--- binutils/include/opcode/ChangeLog | 135 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/emultempl/elf32.em | 33 ++++++++++++++++++++------------- binutils/ld/emultempl/mmo.em | 30 ++++++++++++++++++------------ binutils/ld/emultempl/pe.em | 30 ++++++++++++++++++------------ binutils/ld/emultempl/pep.em | 30 ++++++++++++++++++------------ binutils/ld/testsuite/ChangeLog | 15 +++++++-------- binutils/binutils/testsuite/binutils-all/ar.exp | 40 ++++++++++++++++++++++++++++++++++++++++ binutils/binutils/testsuite/binutils-all/compress.exp | 95 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/binutils/testsuite/binutils-all/empty | 0 binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp | 3 ++- binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d | 21 ++++++++++++++++++++- binutils/ld/testsuite/ld-aarch64/farcall-b-section.d | 34 ++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-aarch64/farcall-b-section.s | 20 ++++++++++++++++++++ binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d | 21 ++++++++++++++++++++- binutils/ld/testsuite/ld-aarch64/farcall-bl-section.d | 34 ++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-aarch64/farcall-bl-section.s | 20 ++++++++++++++++++++ binutils/ld/testsuite/ld-aarch64/farcall-section.d | 5 ----- binutils/ld/testsuite/ld-aarch64/farcall-section.s | 19 ------------------- binutils/ld/testsuite/ld-arm/arm-elf.exp | 6 +++++- binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d | 91 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------ binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s | 3 +++ binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s | 27 +++++++++++++++++++++++++++ binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s | 1 + binutils/ld/testsuite/ld-avr/avr-prop-5.d | 10 ++++++++++ binutils/ld/testsuite/ld-avr/avr-prop-5.s | 7 +++++++ binutils/ld/testsuite/ld-avr/avr-prop-6.d | 14 ++++++++++++++ binutils/ld/testsuite/ld-avr/avr-prop-6.s | 9 +++++++++ binutils/ld/testsuite/ld-elf/compressed1b.d | 3 ++- binutils/ld/testsuite/ld-elf/compressed1c.d | 2 +- binutils/ld/testsuite/ld-elf/gabiend.rt | 2 +- binutils/ld/testsuite/ld-elf/gabinormal.rt | 2 +- binutils/ld/testsuite/ld-elf/indirect.exp | 24 +++++++++++++++++++++++- binutils/ld/testsuite/ld-elf/pr19539.d | 9 +++++++++ binutils/ld/testsuite/ld-elf/pr19539.s | 2 ++ binutils/ld/testsuite/ld-elf/pr19539.t | 1 + binutils/ld/testsuite/ld-elf/pr19553.map | 5 +++++ binutils/ld/testsuite/ld-elf/pr19553a.c | 8 ++++++++ binutils/ld/testsuite/ld-elf/pr19553b.c | 8 ++++++++ binutils/ld/testsuite/ld-elf/pr19553b.out | 1 + binutils/ld/testsuite/ld-elf/pr19553c.c | 9 +++++++++ binutils/ld/testsuite/ld-elf/pr19553c.out | 1 + binutils/ld/testsuite/ld-elf/pr19553d.c | 8 ++++++++ binutils/ld/testsuite/ld-elf/pr19553d.out | 1 + binutils/ld/testsuite/ld-elf/pr19579a.c | 15 +++++++++++++++ binutils/ld/testsuite/ld-elf/pr19579b.c | 14 ++++++++++++++ binutils/ld/testsuite/ld-elf/pr19698.d | 10 ++++++++++ binutils/ld/testsuite/ld-elf/pr19698.s | 5 +++++ binutils/ld/testsuite/ld-elf/pr19698.t | 11 +++++++++++ binutils/ld/testsuite/ld-elf/shared.exp | 24 ++++++++++++++++++++++++ binutils/ld/testsuite/ld-elfvsb/elfvsb.exp | 4 +++- binutils/ld/testsuite/ld-i386/branch1.d | 2 +- binutils/ld/testsuite/ld-i386/call1.d | 2 +- binutils/ld/testsuite/ld-i386/call2.d | 2 +- binutils/ld/testsuite/ld-i386/call3a.d | 2 +- binutils/ld/testsuite/ld-i386/call3b.d | 2 +- binutils/ld/testsuite/ld-i386/call3c.d | 2 +- binutils/ld/testsuite/ld-i386/call3d.d | 2 +- binutils/ld/testsuite/ld-i386/call3e.d | 2 +- binutils/ld/testsuite/ld-i386/call3f.d | 2 +- binutils/ld/testsuite/ld-i386/call3g.d | 2 +- binutils/ld/testsuite/ld-i386/call3h.d | 2 +- binutils/ld/testsuite/ld-i386/got1.dd | 2 ++ binutils/ld/testsuite/ld-i386/got1a.S | 11 ++++++++++- binutils/ld/testsuite/ld-i386/got1d.S | 1 - binutils/ld/testsuite/ld-i386/i386.exp | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/ifunc-1a.c | 8 ++++++++ binutils/ld/testsuite/ld-i386/ifunc-1b.S | 42 ++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/ifunc-1c.S | 26 ++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/ifunc-1d.S | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/jmp1.d | 2 +- binutils/ld/testsuite/ld-i386/jmp2.d | 2 +- binutils/ld/testsuite/ld-i386/lea1c.d | 2 +- binutils/ld/testsuite/ld-i386/libno-plt-1b.dd | 19 +++++++++++++++++++ binutils/ld/testsuite/ld-i386/libno-plt-1b.rd | 8 ++++++++ binutils/ld/testsuite/ld-i386/load1.d | 2 +- binutils/ld/testsuite/ld-i386/load2.d | 2 +- binutils/ld/testsuite/ld-i386/load3.d | 2 +- binutils/ld/testsuite/ld-i386/load4a.d | 2 +- binutils/ld/testsuite/ld-i386/load5a.d | 2 +- binutils/ld/testsuite/ld-i386/mov2b.d | 2 +- binutils/ld/testsuite/ld-i386/mov3.d | 2 +- binutils/ld/testsuite/ld-i386/no-plt-1a.dd | 43 +++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1a.rd | 10 ++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1b.dd | 31 +++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1b.rd | 16 ++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1c.dd | 31 +++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1c.rd | 14 ++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1d.dd | 43 +++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1d.rd | 7 +++++++ binutils/ld/testsuite/ld-i386/no-plt-1e.dd | 43 +++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1e.rd | 10 ++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1f.dd | 31 +++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1f.rd | 16 ++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1g.dd | 31 +++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1g.rd | 14 ++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1h.dd | 34 ++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1h.rd | 10 ++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1i.dd | 33 +++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1i.rd | 12 ++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1j.dd | 34 ++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-1j.rd | 7 +++++++ binutils/ld/testsuite/ld-i386/no-plt-check1a.S | 39 +++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-check1b.S | 28 ++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-extern1a.S | 26 ++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-extern1b.S | 16 ++++++++++++++++ binutils/ld/testsuite/ld-i386/no-plt-func1.c | 5 +++++ binutils/ld/testsuite/ld-i386/no-plt-main1.c | 8 ++++++++ binutils/ld/testsuite/ld-i386/no-plt.exp | 290 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/pass.out | 1 + binutils/ld/testsuite/ld-i386/pr19615.d | 13 +++++++++++++ binutils/ld/testsuite/ld-i386/pr19615.s | 13 +++++++++++++ binutils/ld/testsuite/ld-i386/pr19827-nacl.rd | 5 +++++ binutils/ld/testsuite/ld-i386/pr19827.rd | 5 +++++ binutils/ld/testsuite/ld-i386/pr19827a.S | 8 ++++++++ binutils/ld/testsuite/ld-i386/pr19827b.S | 2 ++ binutils/ld/testsuite/ld-i386/pr20117.d | 12 ++++++++++++ binutils/ld/testsuite/ld-i386/pr20117.s | 7 +++++++ binutils/ld/testsuite/ld-i386/pr20244-1.s | 17 +++++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-1a.d | 26 ++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-1b.d | 11 +++++++++++ binutils/ld/testsuite/ld-i386/pr20244-1c.d | 4 ++++ binutils/ld/testsuite/ld-i386/pr20244-2.s | 17 +++++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-2a.d | 43 +++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-2b.d | 11 +++++++++++ binutils/ld/testsuite/ld-i386/pr20244-2c.d | 10 ++++++++++ binutils/ld/testsuite/ld-i386/pr20244-2d.d | 4 ++++ binutils/ld/testsuite/ld-i386/pr20244-3a.c | 8 ++++++++ binutils/ld/testsuite/ld-i386/pr20244-3b.S | 30 ++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-3c.S | 15 +++++++++++++++ binutils/ld/testsuite/ld-i386/pr20244-3d.S | 44 ++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d | 2 +- binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d | 2 +- binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d | 2 +- binutils/ld/testsuite/ld-plugin/lto.exp | 13 ++++++++++++- binutils/ld/testsuite/ld-powerpc/powerpc.exp | 10 ++++++++++ binutils/ld/testsuite/ld-powerpc/tlsdll.s | 19 +++++++++++++++++++ binutils/ld/testsuite/ld-powerpc/tlsdll.ver | 7 +++++++ binutils/ld/testsuite/ld-powerpc/tlsdll_32.s | 18 ++++++++++++++++++ binutils/ld/testsuite/ld-powerpc/tlsopt5.d | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-powerpc/tlsopt5.s | 5 +++++ binutils/ld/testsuite/ld-powerpc/tlsopt5_32.d | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-powerpc/tlsopt5_32.s | 4 ++++ binutils/ld/testsuite/ld-x86-64/call1a.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1b.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1c.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1d.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1e.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1f.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1g.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1h.d | 2 +- binutils/ld/testsuite/ld-x86-64/call1i.d | 2 +- binutils/ld/testsuite/ld-x86-64/libno-plt-1b.dd | 15 +++++++++++++++ binutils/ld/testsuite/ld-x86-64/libno-plt-1b.rd | 8 ++++++++ binutils/ld/testsuite/ld-x86-64/load1a.d | 2 +- binutils/ld/testsuite/ld-x86-64/load1b.d | 2 +- binutils/ld/testsuite/ld-x86-64/no-plt-1a.dd | 32 ++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1a.rd | 10 ++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1b.dd | 24 ++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1b.rd | 16 ++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1c.dd | 24 ++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1c.rd | 14 ++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1d.dd | 33 +++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1d.rd | 7 +++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1e.dd | 32 ++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1e.rd | 10 ++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1f.dd | 24 ++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1f.rd | 16 ++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1g.dd | 24 ++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-1g.rd | 14 ++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-check1.S | 25 +++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-extern1.S | 15 +++++++++++++++ binutils/ld/testsuite/ld-x86-64/no-plt-func1.c | 5 +++++ binutils/ld/testsuite/ld-x86-64/no-plt-main1.c | 8 ++++++++ binutils/ld/testsuite/ld-x86-64/no-plt.exp | 201 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/ld/testsuite/ld-x86-64/pass.out | 1 + binutils/ld/testsuite/ld-x86-64/pr18591.d | 12 ++++++++++++ binutils/ld/testsuite/ld-x86-64/pr18591.s | 8 ++++++++ binutils/ld/testsuite/ld-x86-64/pr19615.d | 13 +++++++++++++ binutils/ld/testsuite/ld-x86-64/pr19615.s | 13 +++++++++++++ binutils/ld/testsuite/ld-x86-64/pr19827-nacl.rd | 5 +++++ binutils/ld/testsuite/ld-x86-64/pr19827.rd | 5 +++++ binutils/ld/testsuite/ld-x86-64/pr19827a.S | 8 ++++++++ binutils/ld/testsuite/ld-x86-64/pr19827b.S | 2 ++ binutils/ld/testsuite/ld-x86-64/pr20093-1.d | 11 +++++++++++ binutils/ld/testsuite/ld-x86-64/pr20093-1.s | 11 +++++++++++ binutils/ld/testsuite/ld-x86-64/pr20093-2.d | 11 +++++++++++ binutils/ld/testsuite/ld-x86-64/pr20093-2.s | 9 +++++++++ binutils/ld/testsuite/ld-x86-64/x86-64.exp | 99 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------- binutils/gas/testsuite/gas/i386/disp32.d | 10 ++++++---- binutils/gas/testsuite/gas/i386/disp32.s | 4 ++++ binutils/gas/testsuite/gas/i386/got-no-relax.d | 31 +++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/i386/got.d | 1 + binutils/gas/testsuite/gas/i386/i386.exp | 2 ++ binutils/gas/testsuite/gas/i386/localpic.d | 1 + binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d | 1 + binutils/gas/testsuite/gas/i386/reloc32.d | 1 + binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d | 2 ++ binutils/gas/testsuite/gas/i386/x86-64-avx512f.d | 2 ++ binutils/gas/testsuite/gas/i386/x86-64-avx512f.s | 2 ++ binutils/gas/testsuite/gas/i386/x86-64-disp32.d | 10 ++++++---- binutils/gas/testsuite/gas/i386/x86-64-disp32.s | 3 +++ binutils/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d | 27 +++++++++++++++++++++++++++ binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d | 1 + binutils/gas/testsuite/gas/i386/x86-64-localpic.d | 1 + binutils/gas/testsuite/gas/mips/isa-override-1.d | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/isa-override-1.s | 31 +++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/micromips@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips.exp | 3 +++ binutils/gas/testsuite/gas/mips/mips1@isa-override-1.d | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips1@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips1@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips2@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips2@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips32@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips32@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32r2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32r3@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32r5@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips32r6@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips64r2@isa-override-1.d | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/mips64r3@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips64r5@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/mips64r6@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.d | 6 ++++++ binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.l | 2 ++ binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.l | 5 +++++ binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/octeon@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/r3000@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/r3000@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/r3000@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/r3900@isa-override-1.d | 5 +++++ binutils/gas/testsuite/gas/mips/r3900@isa-override-2.l | 4 ++++ binutils/gas/testsuite/gas/mips/r3900@isa-override-2.s | 18 ++++++++++++++++++ binutils/gas/testsuite/gas/mips/r5900@isa-override-1.d | 28 ++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/mips/r5900@isa-override-1.s | 23 +++++++++++++++++++++++ binutils/gas/testsuite/gas/ppc/altivec3.d | 1 + binutils/gas/testsuite/gas/ppc/altivec3.s | 1 + binutils/gas/testsuite/gas/ppc/e6500.d | 17 +++++++++++++++++ binutils/gas/testsuite/gas/ppc/e6500.s | 16 ++++++++++++++++ binutils/gas/testsuite/gas/ppc/power4.d | 11 ++++++++++- binutils/gas/testsuite/gas/ppc/power4.s | 8 ++++++++ binutils/gas/testsuite/gas/ppc/power8.d | 32 ++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/ppc/power8.s | 32 ++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/ppc/power9.d | 35 +++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/ppc/power9.s | 35 +++++++++++++++++++++++++++++++++++ binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d | 1 + binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 1 + 343 files changed, 7634 insertions(+), 2027 deletions(-) diff --git a/binutils/md5.sum b/binutils/md5.sum index 8bb9cca..954be59 100644 --- a/binutils/md5.sum +++ b/binutils/md5.sum @@ -26,7 +26,7 @@ 90f07219c78f6fbe833f6a8d97241f12 bfd/aout64.c dfd680952f562949fa8d794e805d3a88 bfd/aoutf1.h 452d573c99bb53a0fdc389974c30fe00 bfd/aoutx.h -f3d4e35d6f307b393e040b6eddd99c6d bfd/archive.c +7512be5babf8bf47c06751aec8f98a40 bfd/archive.c 7d7ab6c35eddfede93f6483db959cb39 bfd/archive64.c 856fa1fd1de1b78388efed90c5d4e406 bfd/archures.c e4d15b25830892d20636bfca36e9d2d3 bfd/armnetbsd.c @@ -41,7 +41,7 @@ 30526348fd4f10cd8d1b294bca57f469 bfd/cache.c 149f2204ab9e082a2beb72dd6c04800d bfd/cf-i386lynx.c 568149baff1f9da8708a8a88c339adbd bfd/cf-sparclynx.c -9f78d96c43fb97f3c907c051d1394e43 bfd/ChangeLog +b07777046545f77fa63aa23c0744c85e bfd/ChangeLog 6474afde93f8e964e3d6dddffde3c41e bfd/ChangeLog-0001 48097790cbee8800147ba96a6dd07fc8 bfd/ChangeLog-0203 7d710529ca3fafb2bb57132df24957e3 bfd/ChangeLog-2004 @@ -60,7 +60,7 @@ ce363ffcdb2993ee84530554d0fb5a78 bfd/ChangeLog-9697 e63f6d01a376008a89e252c7b5cc1f6f bfd/ChangeLog-9899 2fe0e176436ab0d02d3c7935a6d3a66f bfd/cisco-core.c -78d34149208ff9ae34a174c9543f4a3a bfd/coff-alpha.c +f7e195b61128da8aafa8cdd8fd6cbf70 bfd/coff-alpha.c 6e0d8c53fc1e04f5345366b92ab9d804 bfd/coff-apollo.c d79a5e816069e36bdfcd0873e41c6709 bfd/coff-arm.c 39e58cf7295ab4a56d9d8068b1bf0060 bfd/coff-aux.c @@ -69,7 +69,7 @@ e8d05731a4478f362040f06713539674 bfd/coff-go32.c ad06b2d8cb037bf4e2929d37067e5b3d bfd/coff-h8300.c 898a644b23a64839557ed04222f5b7b5 bfd/coff-h8500.c -971605ba0e6bf11a30e06feb8816da6f bfd/coff-i386.c +8a46389d366c3025426a4b03f6f8a93b bfd/coff-i386.c aa95f9a368ab99dfc240812fca87b2db bfd/coff-i860.c edda05e90bd876ccc203101f75bc0094 bfd/coff-i960.c b2840cda9b56efffa90c3b4d40c9dfed bfd/coff-ia64.c @@ -90,18 +90,18 @@ 8a151b59e4fd8aa52fd76c93c4446625 bfd/coff-u68k.c 57f383b317a5840bb53d06d81ada8305 bfd/coff-w65.c 528e1da6ec7281aaed658344427f80cb bfd/coff-we32k.c -c358d958eeace3b01505de5f5a77869f bfd/coff-x86_64.c +d14998adcb7c1b964218bdec27110fa2 bfd/coff-x86_64.c 0b0869a068c766e51b4cf76d3e1e9398 bfd/coff-z80.c e0a8d31280c4b392ef408b925197e980 bfd/coff-z8k.c ba1edf4207bcb70084dd1364f998fd06 bfd/coff64-rs6000.c -93a92e68af3be1002f88ffa8b6c64185 bfd/coffcode.h +9f6a92785846a7b2d2fbc81fa14893c2 bfd/coffcode.h 59db348c8150307cd3d170a0c7b0db80 bfd/coffgen.c -53e0abe4adeaeefba981315b5c318fe6 bfd/cofflink.c +959cd45d9aa8364183f612abd5e13ef7 bfd/cofflink.c 80a1105b21ac56843e3440af2e88e298 bfd/coffswap.h 5e46070804158249faa239479c9835a1 bfd/compress.c 90ddcd055b26773cf8a1b668f9486cd1 bfd/config.bfd 45397e77d40a7a78658b196b6a486571 bfd/config.in -7db353c02e9c1ae35c38cbcaec362dbe bfd/configure +20fba26fcb3dca838f6a19ec9d6ce82c bfd/configure 70a8fcdb04d327cf6966837981fad165 bfd/configure.ac 87c233c6d57be786f95051802e4058a1 bfd/configure.com c45eafe894c2c751938df9be1218860d bfd/configure.host @@ -195,7 +195,7 @@ 1c6e3e8c279bc5edbaa9d876b9dde41b bfd/cpu-z8k.c 8373bde8fa77a2939a85c16983a71910 bfd/demo64.c dad496c68df8395b3cdb8e3187c37eb1 bfd/dep-in.sed -013a8959efd21d7448ba3dc29ef5babb bfd/development.sh +c2f83b76fba44d9b69cff84060e26868 bfd/development.sh 6a15b20bd56486434939c9db8e631728 bfd/doc/aoutx.texi 6f32bdfe0063cdb0c3aa73cceee3a1e1 bfd/doc/archive.texi 5cdadd0f131c05c50710c0f43fdffd58 bfd/doc/archures.texi @@ -234,12 +234,12 @@ 2b2af4fc0532d1286cd9293d8bda2f1d bfd/doc/syms.texi 2983e046b4641fb5cea6645b7c729e44 bfd/doc/targets.texi 52eeceea7d6afb4956faaaed3fb61ddf bfd/dwarf1.c -416cdb629419049fc37781d4be644a92 bfd/dwarf2.c +e3f61d8f330a90f60f64f20ecc89582e bfd/dwarf2.c b1480d96d9ce9e5a8d85388bba90fd44 bfd/ecoff.c c86d50c694ed7dd7e7c29fc5cb9bd469 bfd/ecofflink.c fb0a60df94affe77c9469deef15b0e37 bfd/ecoffswap.h 186082e2982c0b45bc76c5b14aff0a50 bfd/elf-attrs.c -ebe7055d68e6616cad306dbb937f1a4e bfd/elf-bfd.h +467f75babc465f713a657aafb0f3ec92 bfd/elf-bfd.h cb5391ab0874e0feb980fda65c7c7651 bfd/elf-eh-frame.c ba731c6c6310d8f1735744526f85652a bfd/elf-hppa.h c2c49cc6e971fdbb1826fe39b0d3653c bfd/elf-ifunc.c @@ -249,14 +249,14 @@ cc7378f7be9df4889ce909abe61e8ba0 bfd/elf-nacl.c c8eee41e3ba7a4807e87ba94d8d6517f bfd/elf-nacl.h 37162252a9fba8e37b186fe746c0fc59 bfd/elf-s390-common.c -d9125b8b9ea20be2b07955ef07f91a82 bfd/elf-strtab.c +721a26523b3f14f348c14721f80dcd7a bfd/elf-strtab.c 713f4b9b64be81889830029230ca84cd bfd/elf-vxworks.c ec62dd6d1596fd6907545989b64c0ae3 bfd/elf-vxworks.h 6f23daed0984ac75836fa2238cecd344 bfd/elf.c a06621f2e9e19b3a0c870c89d9981e40 bfd/elf32-am33lin.c 9348001db1cabaaf1bf8caa696c71888 bfd/elf32-arc.c -e156159d520cdd30cc7e4cb31533ddaf bfd/elf32-arm.c -43fd825cc51e95a273d8ac7dd1bd0287 bfd/elf32-avr.c +31b349d3a49080dccab7fedb17e7babc bfd/elf32-arm.c +8474285481f7d39c30695ac2a9b841d7 bfd/elf32-avr.c 4825b5543e9da82f4e67de1b2756a907 bfd/elf32-avr.h 272a3804fc0c2a10487fe10e1ece8b51 bfd/elf32-bfin.c 8c427ec63c32c40265c179d37af0df9b bfd/elf32-cr16.c @@ -272,10 +272,10 @@ bfaf14e5ebb510563972e3677c41c6f4 bfd/elf32-ft32.c 4384a857565e33e249a6653e5bf4b31e bfd/elf32-gen.c 0e03f6b7ab90159d20bdc39a4f5e6dc7 bfd/elf32-h8300.c -d23cc913d157939801e0adf02ff571a7 bfd/elf32-hppa.c +49c5a06bb4978bd14b37fe6e88b7824e bfd/elf32-hppa.c 47aaef1745bba1b121b9d9a6418264f1 bfd/elf32-hppa.h dddca64203a7a4cf47fba2bbe3568c55 bfd/elf32-i370.c -f76f3cab877e2a15f9fb48221dfb0479 bfd/elf32-i386.c +8f6a88fa98d9e204d3d539479497b2c3 bfd/elf32-i386.c 0f9b257edaa4d639c98bed4f3d7d1f8e bfd/elf32-i860.c a181a4ceb9b279444ddbef4dda8e70fb bfd/elf32-i960.c 6288a09e8489b69b43bc03a6bb3e07cd bfd/elf32-ip2k.c @@ -304,7 +304,7 @@ 773a7434bb0d20a3e86d5684ece98bbf bfd/elf32-nios2.h 2396b8df691093984d864a1ee2a7f22f bfd/elf32-or1k.c 13b49ec86a60f7d301469611a1cbd769 bfd/elf32-pj.c -3598d646689c8ded0f90a488077ab50f bfd/elf32-ppc.c +65b623a3d2e6286d21446d1edabe9d2f bfd/elf32-ppc.c 1c47a2ac0e088e8b4fa7a1665ea82d7c bfd/elf32-ppc.h fa2cd87f9263ee6611f2b6886cbecd8f bfd/elf32-rl78.c 9219bec6e5a10626c4e53cb3d81f8bf6 bfd/elf32-rx.c @@ -339,25 +339,25 @@ c844ec58a10bb4cc230b3f05f7657d55 bfd/elf32.c f9ad1e61d3a311291bda48cb9525c28b bfd/elf64-alpha.c 39560502f881f15a564da0b51fff9474 bfd/elf64-gen.c -f5d202632eeab6cc840fbb95fba0c4d2 bfd/elf64-hppa.c +cdebc4120c9538b5f5a16a5d4281bedf bfd/elf64-hppa.c e301bdd246cdf7352ee89dbf73ea052c bfd/elf64-hppa.h 735dbeed6b53ec56f1d38c95d64c8572 bfd/elf64-ia64-vms.c 64f6bec36e44883df8ceae0157bb7a4e bfd/elf64-mips.c 63d5fb845312c59bb18f366624cfef17 bfd/elf64-mmix.c -d73078ad31d9d4463b8626ca6a7b29b7 bfd/elf64-ppc.c +1302b91438d9203ac4331b36bb960886 bfd/elf64-ppc.c b99de008f441e769ed1ea74c48bc8c65 bfd/elf64-ppc.h ea54bf44fa24a18be72088487f5c67b0 bfd/elf64-s390.c ab757b52d04d271883af7520ed60567a bfd/elf64-sh64.c 947e7a938a8f7a15dbcdfaf2f8be1b08 bfd/elf64-sparc.c f561858a2d9c9fa47ec6fc5da58195dd bfd/elf64-tilegx.c 7f8dd8061ac1d17d70fe4cf34cb127eb bfd/elf64-tilegx.h -554eed9e22e4482b584a8e0547842ee7 bfd/elf64-x86-64.c +6d8a31b49b57ae4295b95163c0377b10 bfd/elf64-x86-64.c 4b8318d1c5a15f1e11907bbf8028fd8f bfd/elf64.c 3618e275469dcaee6dbefe953f459ded bfd/elfcode.h 314ec50b8378d69f7fc5b39978ce4fdb bfd/elfcore.h -be53bfc70e071c7b7cdbed54c069ec90 bfd/elflink.c +5788044f9f4e674f2c7b3b6108bf83ae bfd/elflink.c ada3c489f714b527eb9af21f4f1e39de bfd/elfn32-mips.c -eef0d623c67c3df35c77e0fc973195c4 bfd/elfnn-aarch64.c +2e589a0da854dd0f290f3a719a427c42 bfd/elfnn-aarch64.c ed0439e121772c7277f519e9bf988b7f bfd/elfnn-ia64.c 40f5de3e5203e68c8d4edcec0e1fa2e7 bfd/elfxx-aarch64.c 7061d89aeed5ed2952f3696f81b27275 bfd/elfxx-aarch64.h @@ -566,8 +566,8 @@ d379f86e2b08ffd6d7bceca24851adbd bfd/vaxnetbsd.c 8e86bd0a8bf7c16fe497da069c0b755c bfd/verilog.c 93144dbaaca7fbf982c23e9ec9b15c5f bfd/versados.c -5994b616ef4e640f7dbbdc07ea7ec55c bfd/version.h -1e33bd7b12e51c6c0e57a7cc48db7dfd bfd/version.m4 +1694a1c1f58d6690c4538d9b4cd46ec2 bfd/version.h +72898b14b9576848142dce32f7392dfd bfd/version.m4 3b84d50356ebc92c4141f997928b1b1c bfd/vms-alpha.c f9230e3b9c433e0ed8b5c5ef78e4f72d bfd/vms-lib.c 1428ad33a371a43e734c79a45fdc95df bfd/vms-misc.c @@ -598,7 +598,7 @@ 4c1bddc17c73563fb2c6967ce9e57a49 binutils/bucomm.c 189b992a4993eb8133ef8abbede8832c binutils/bucomm.h e3cbfaab6366fc417fa9f42e38edabf8 binutils/budbg.h -c3c081d73b6757e9d84603c867286627 binutils/ChangeLog +312d66abea0d458fe1d5e65cc0a70fd1 binutils/ChangeLog cd19eaa8aa273aa4d61d7349e18c3389 binutils/ChangeLog-0001 4dd4f6db448208624501492aaaa8ab38 binutils/ChangeLog-0203 9f7cd70e402801d73a0ca89c1d3f3c54 binutils/ChangeLog-2004 @@ -618,7 +618,7 @@ 7f57a486c2ca7340fce5cd7c5fba31e6 binutils/coffgrok.c 329899694a09357aa82dffe3585e0f06 binutils/coffgrok.h edd276aa817b0183982111da2166558f binutils/config.in -336c87dc82ffda41baec56849e941bc4 binutils/configure +872695fea1e5b8c682cedc8fd9f3eebf binutils/configure d765c98b524c43d1cbf241b9af7e22a4 binutils/configure.ac 89b0b888b7e87c3abd5c7fb5e69fa889 binutils/configure.com aa23adf7835ef9ed65d5b92052b9b168 binutils/configure.tgt @@ -634,27 +634,27 @@ a73f6b06b319deb0cfc476cd3ba0a200 binutils/dlltool.c e4d5451af3c65fafb5b3c188128cbd7d binutils/dlltool.h 502472caa79321b7c9ca33aabc84f081 binutils/dllwrap.c -e767196e2fd31d05eb44cef847e7e26c binutils/doc/addr2line.1 -4fe2d24185fbc678f0c98681fa8d06e2 binutils/doc/ar.1 -b0826007cf3fa0604a5cd205b5e68b0a binutils/doc/binutils.info -9d739608da232287a40e65ca8a593539 binutils/doc/binutils.texi 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ld/testsuite/ld-x86-64/call1h.d -56018c772d8ab524212012f4fe5be99b ld/testsuite/ld-x86-64/call1i.d +52f026c39fc2846e8c927cd666cf479f ld/testsuite/ld-x86-64/call1a.d +de070fefce6175aae6f2a845c1a95bd5 ld/testsuite/ld-x86-64/call1b.d +0ecda3cd3f3d924cc53467100b0bf489 ld/testsuite/ld-x86-64/call1c.d +f3c414f10dd33ed247964906d0cd517e ld/testsuite/ld-x86-64/call1d.d +26c96b3bbe5dd852585f4cdd32e0e574 ld/testsuite/ld-x86-64/call1e.d +e913bca6e24beefde3d8baece5f4728b ld/testsuite/ld-x86-64/call1f.d +1b858fe5c52bd4cec28ffc6e57a82497 ld/testsuite/ld-x86-64/call1g.d +1fe01d271e76ce46ac9611b60a8a9196 ld/testsuite/ld-x86-64/call1h.d +164ccfa5d32f5739ce3d31a86f2ed1ee ld/testsuite/ld-x86-64/call1i.d 91a199ecf6afe1be369939ed9c9e78d2 ld/testsuite/ld-x86-64/compressed1.d f05168212b4b926d40f433c53fba8a2b ld/testsuite/ld-x86-64/compressed1.s 8d45d88edb169c63b9cde50875f663fa ld/testsuite/ld-x86-64/copyreloc-lib.c @@ -16375,12 +16507,14 @@ e951ee333716df0a0aa2091d20df80df ld/testsuite/ld-x86-64/lea1j.d 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ld/testsuite/ld-x86-64/load1d-nacl.d @@ -16421,10 +16555,30 @@ e7f72cd9cfac1f47d9c47402b613fbec ld/testsuite/ld-x86-64/mpx4.dd 874fb04fe5be1cb47c6926564daf9c84 ld/testsuite/ld-x86-64/mpx4a.s e0388052c93bea83befb3ab34ba73a6d ld/testsuite/ld-x86-64/mpx4b.s +8f8f68dfd324d0e82a43028785ce0585 ld/testsuite/ld-x86-64/no-plt-1a.dd +9659c8c29ca4a05ff7088e1d17245abf ld/testsuite/ld-x86-64/no-plt-1a.rd +d77a74dd5625815a0c8ad5580e20256e ld/testsuite/ld-x86-64/no-plt-1b.dd +73db577c07079cb22cd17cef6f58ccf4 ld/testsuite/ld-x86-64/no-plt-1b.rd +588277f4d705484e755901202798f34c ld/testsuite/ld-x86-64/no-plt-1c.dd +b8ed9daa99ee2f5efd17f9eecce24d4b ld/testsuite/ld-x86-64/no-plt-1c.rd +f77516f31fd55c74f439ad19fa36b38c ld/testsuite/ld-x86-64/no-plt-1d.dd +34ed1362eebbe3289f3f4fecfdbf2796 ld/testsuite/ld-x86-64/no-plt-1d.rd +fef6de31025bcc5d1c0cce21643ff5d7 ld/testsuite/ld-x86-64/no-plt-1e.dd +9659c8c29ca4a05ff7088e1d17245abf ld/testsuite/ld-x86-64/no-plt-1e.rd +d77a74dd5625815a0c8ad5580e20256e ld/testsuite/ld-x86-64/no-plt-1f.dd +73db577c07079cb22cd17cef6f58ccf4 ld/testsuite/ld-x86-64/no-plt-1f.rd +9bce3546ae83640f370a56ff50725032 ld/testsuite/ld-x86-64/no-plt-1g.dd +b8ed9daa99ee2f5efd17f9eecce24d4b ld/testsuite/ld-x86-64/no-plt-1g.rd +400749114b17d2fbd880efd0040d0811 ld/testsuite/ld-x86-64/no-plt-check1.S +460218085360dfa55b744eec7aaf2167 ld/testsuite/ld-x86-64/no-plt-extern1.S +c8879832168a7e3fbb8185e3f668a4ff ld/testsuite/ld-x86-64/no-plt-func1.c +34cd3a78d277b55c84fd9e7b293e4509 ld/testsuite/ld-x86-64/no-plt-main1.c +c921b754f2b4c39f16aab77857507e2f ld/testsuite/ld-x86-64/no-plt.exp a956e939a802d200c7d34d52a64a10ca ld/testsuite/ld-x86-64/nogot1.d b87c72722f3341ed9b3757e163aedca4 ld/testsuite/ld-x86-64/nogot1.s 14e17be79014d34039412c205d75a578 ld/testsuite/ld-x86-64/nogot2.d 648f81bd49c5e890089548cbd33b3da4 ld/testsuite/ld-x86-64/nogot2.s +32c0be4fb7f3030bf9c74c0a836d4f2e ld/testsuite/ld-x86-64/pass.out aba37f2b6af131b304532d37b4e22f92 ld/testsuite/ld-x86-64/pcrel16.d 21deaf5784d704c09916457834ccb87a ld/testsuite/ld-x86-64/pcrel8.d 2f5d8a8a5f8cc8e158906f38d744463a ld/testsuite/ld-x86-64/pie1.d @@ -16506,6 +16660,8 @@ 4a58eeac82cb63d6d419a78d82c2903e ld/testsuite/ld-x86-64/pr18176.d 24994c28b7c840d524f8c853a2fa7bff ld/testsuite/ld-x86-64/pr18176.s 9dec9def5ff35ca86a7b6bb168cf92da ld/testsuite/ld-x86-64/pr18176.t +e3871d396bb43bb3435c339254c1e114 ld/testsuite/ld-x86-64/pr18591.d +cea121eb667a29d72f2a679b7516cf41 ld/testsuite/ld-x86-64/pr18591.s 775ce6813ac1f4168f94747b307cdf54 ld/testsuite/ld-x86-64/pr18801.d b8b08c39266fb4d66bfb6c740ca318fc ld/testsuite/ld-x86-64/pr18801.s 1dad69e35807ff65e8a7e574466ddc38 ld/testsuite/ld-x86-64/pr18815.d @@ -16533,6 +16689,16 @@ 9fb514279a4a6222be151dbdcce11e35 ld/testsuite/ld-x86-64/pr19319.dd f8171ef291e11fd3e2e8a0feb8a427f6 ld/testsuite/ld-x86-64/pr19319a.S ff27e5412bc90ca35ef6861f8a939ff6 ld/testsuite/ld-x86-64/pr19319b.S +c23f34ef77717a082f5e39c6ad4e9f3d ld/testsuite/ld-x86-64/pr19615.d +ed5e5c49ecec0c98c131d429372e47ff ld/testsuite/ld-x86-64/pr19615.s +44964354c12b4611fd4d0d3fa1e7a9d0 ld/testsuite/ld-x86-64/pr19827-nacl.rd +44964354c12b4611fd4d0d3fa1e7a9d0 ld/testsuite/ld-x86-64/pr19827.rd +f1c77b700705334ba881aacb565021e8 ld/testsuite/ld-x86-64/pr19827a.S +1af381ced5b0c83b310fcaf134a0ca5c ld/testsuite/ld-x86-64/pr19827b.S +99da8009327e6123a51453b0bd76c711 ld/testsuite/ld-x86-64/pr20093-1.d +ac6d02707f478f50b2a93a9440ff4886 ld/testsuite/ld-x86-64/pr20093-1.s +99da8009327e6123a51453b0bd76c711 ld/testsuite/ld-x86-64/pr20093-2.d +d5d5f7d051c5095f7d5c17cbedcdceac ld/testsuite/ld-x86-64/pr20093-2.s 5a16c8b33f7fc14a778a75390211d675 ld/testsuite/ld-x86-64/protected1.d 72464b10c9ddf08d601e6e1981160a76 ld/testsuite/ld-x86-64/protected1.s 799b5e6cfeb966e6f8ab5e471149673f ld/testsuite/ld-x86-64/protected2-k1om.d @@ -16636,7 +16802,7 @@ c784c72aed13e9bd4e0d0df3e07f36d1 ld/testsuite/ld-x86-64/x86-64-64-export-class.rd e928d6484bf8b938f70b05730fc41ec8 ld/testsuite/ld-x86-64/x86-64-x32-export-class.rd 6c5efb94140f6bea6d1e05ddd22d9ce3 ld/testsuite/ld-x86-64/x86-64-x32.rd -f068ba3724b7115c2adc527e0eb471f6 ld/testsuite/ld-x86-64/x86-64.exp +8acb224e2d515f1cbcb99940ae9952bb ld/testsuite/ld-x86-64/x86-64.exp 6f577583952be3de543260d5fb8bbb16 ld/testsuite/ld-xc16x/absrel.d 3998ca79d045f299d12bbd0cf1e6205f ld/testsuite/ld-xc16x/absrel.s 01a0b5ff12180f56fd3e59aca1729442 ld/testsuite/ld-xc16x/offset.d @@ -16885,7 +17051,7 @@ 58039f24ea9f79d8849ef48ab3b72ae3 opcodes/cgen-ibld.in a92bf8fecfc8db07b2b5c2621430f90a opcodes/cgen-opc.c 70a288863014178c0186c2c1ddb76920 opcodes/cgen.sh -a7c9f35af3545085707a1aa706e9cad0 opcodes/ChangeLog +50c64695c47f648fb1f3b678aaa14b03 opcodes/ChangeLog 58e924c52c2bfeef23d22c4f482edcfc opcodes/ChangeLog-0001 7d7d28737ff404f709104accbd7b7926 opcodes/ChangeLog-0203 1718b45c678a851d089ec7c4edaa9906 opcodes/ChangeLog-2004 @@ -16902,7 +17068,7 @@ 2adb7cb7865ac91208f5f94fc4d9f397 opcodes/ChangeLog-9297 b192ee206cc807dd92ffe541cb819d6f opcodes/ChangeLog-9899 82f85f5946700d6818256ee0b9c5ecc9 opcodes/config.in -3fafda2abe7717409fdfc2b4321a74ba opcodes/configure +824359246f7d57f253b83de8c5731751 opcodes/configure 989aac5ffbb4de2ce088934dda1565b1 opcodes/configure.ac defa00cee5f7bc69f7f680730f909317 opcodes/configure.com 8a02d6bdda2f19baaf3646b4ef4527f8 opcodes/cr16-dis.c @@ -16950,7 +17116,7 @@ 70e6e01daac148d3f013a77e179c795d opcodes/i370-dis.c 3c332f25e1c209ff488b9717c04d4d48 opcodes/i370-opc.c 288c1f65e0d73ae0eaf587af74ec8d7f opcodes/i386-dis-evex.h -7d14e57939148cc7eaf365cccc701644 opcodes/i386-dis.c +74bb97298aece84abca5cfbdb7e75e00 opcodes/i386-dis.c c7c9d7e1afb2a032e57f5d56afe8ba34 opcodes/i386-gen.c aaca2091eb5e0a24c07caf25fd313091 opcodes/i386-init.h c7d2504f5429d51f2cea23509de63b27 opcodes/i386-opc.c @@ -17117,7 +17283,7 @@ c171fa0116588976056ef26b540eb69c opcodes/po/zh_CN.gmo 2ccdb5f626159dedf687e37713dd930c opcodes/po/zh_CN.po 60c90115b9204942fd51a6ed7a5e6732 opcodes/ppc-dis.c -7b5733175ad4a9f27328002e34baeb06 opcodes/ppc-opc.c +e5f656d5f9f84d57ea752979e505af90 opcodes/ppc-opc.c 9136bf8389a1452d297fe09242924b87 opcodes/rl78-decode.c 981caf96814a59ee09e6d1c39d53ca16 opcodes/rl78-decode.opc 39e393239656160df5eeacc593ee20f9 opcodes/rl78-dis.c diff --git a/binutils/bfd/ChangeLog b/binutils/bfd/ChangeLog index e860c3e..7b4ccd1 100644 --- a/binutils/bfd/ChangeLog +++ b/binutils/bfd/ChangeLog @@ -1,3 +1,301 @@ +2016-06-29 Tristan Gingold + + * version.m4: Bump version to 2.26.1 + * configure: Regenerate. + +2016-06-29 Tristan Gingold + + * development.sh: Set development to false. + +2016-06-28 Alan Modra + + Apply from master + 2016-05-19 Alan Modra + * elf64-ppc.c (ppc64_elf_branch_reloc): Check for NULL owner + before dereferencing. + +2016-06-28 Alan Modra + + PR ld/19264 + * elf64-ppc.c (STUB_SHRINK_ITER): Define. + (ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER + if shrinking stubs. + (ppc64_elf_size_stubs): Adjust to suit. + +2016-06-14 Senthil Kumar Selvaraj + + Backport from master + 2016-06-14 Senthil Kumar Selvaraj + + PR ld/20254 + * elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc + offsets until reloc_toaddr. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-13 H.J. Lu + + PR ld/20244 + * elf32-i386.c (elf_i386_relocate_section): Add the .got.plt + section address for R_386_GOT32/R_386_GOT32X relocations against + IFUNC symbols if there is no base register and return error for + PIC. + + 2016-06-13 H.J. Lu + + * elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC + GOT32 adjustment for static executables. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-11 H.J. Lu + + PR ld/20244 + * elf32-i386.c (elf_i386_relocate_section): When relocating + R_386_GOT32, return error without a base register for PIC and + subtract the .got.plt section address only with a base register. + +2016-06-13 Senthil Kumar Selvaraj + + Backport from master + 2016-06-08 Senthil Kumar Selvaraj + + PR ld/20221 + * elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms + and relocs only if shrinking occurred. + +2016-06-09 Alan Modra + + PR ld/20159 + PR ld/16467 + * elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change. + (_bfd_elf_add_default_symbol): Don't indirect to/from defined + symbol given a version by a script different to the version + of the symbol being added. + (elf_link_add_object_symbols): Use _bfd_elf_strtab_save and + _bfd_elf_strtab_restore. Don't fudge dynstr references. + * elf-strtab.c (_bfd_elf_strtab_restore_size): Delete. + (struct strtab_save): New. + (_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions. + * elf-bfd.h (_bfd_elf_strtab_restore_size): Delete. + (_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare. + +2016-05-20 H.J. Lu + + Backport from master + 2016-05-20 H.J. Lu + + * elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32 + when setting need_convert_load. + + 2016-05-19 H.J. Lu + + PR ld/20117 + * elf32-i386.c (elf_i386_convert_load): Don't convert + R_386_GOT32. + +2016-05-18 Christophe Monat + + Backport from master + 2016-05-09 Christophe Monat + + PR ld/20030 + * elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding. + (stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs + to nb_words. + (create_instruction_vldmia): Add is_dp to disambiguate SP/DP + encoding. + (create_instruction_vldmdb): Likewise. + (stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding, + uses it to re-encode. + +2016-05-15 H.J. Lu + + Backport from master + 2016-05-13 H.J. Lu + + PR ld/20093 + * elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert + GOTPCREL relocation against large section. + + * elflink.c (bfd_elf_final_link): Likewise. + +2016-05-11 Alan Modra + + PR 20060 + * elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local. + * elf32-ppc.c (ppc_elf_tls_setup): Likewise. + +2016-04-30 H.J. Lu + + Backport from master + 2016-04-27 H.J. Lu + + PR ld/20006 + * elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections + when estimating distances between output sections. + +2016-03-29 Toni Spets + + PR 19878 + * coffcode.h (coff_write_object_contents): Revert accidental + 2014-11-10 change. + +2016-03-17 H.J. Lu + + Backport from master + 2016-03-15 H.J. Lu + + PR ld/19827 + * elf32-i386.c (elf_i386_check_relocs): Bind defined symbol + locally in PIE. + (elf_i386_relocate_section): Likewise. + * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. + (elf_x86_64_relocate_section): Likewise. + +2016-03-15 H.J. Lu + + Backport from master + 2016-01-30 H.J. Lu + + PR ld/19539 + * elf32-i386.c (elf_i386_reloc_type_class): Check relocation + against STT_GNU_IFUNC symbol only with dynamic symbols. + * elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise. + +2016-03-15 Nick Clifton + + Backport from master: + 2016-03-09 Leon Winter + + PR ld/19623 + * cofflink.c (_bfd_coff_generic_relocate_section): Do not apply + relocations against absolute symbols. + +2016-03-14 H.J. Lu + + Backport from master + 2016-01-28 H.J. Lu + + PR binutils/19523 + * dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to + decompress debug sections. + +2016-03-09 H.J. Lu + + PR ld/19579 + Backport from master + 2016-03-08 H.J. Lu + + * elflink.c (_bfd_elf_merge_symbol): Group common symbol checking + together. + + 2016-03-04 H.J. Lu + + * elflink.c (_bfd_elf_merge_symbol): Treat common symbol in + executable as definition if the new definition comes from a + shared library. + +2016-03-09 Nick Clifton + Alan Modra + + PR binutils/19775 + * archive.c (bfd_generic_openr_next_archived_file): Allow zero + length elements in the archive. + * coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise. + +2016-03-01 H.J. Lu + + PR ld/19752 + Backport from master + 2015-12-18 H.J. Lu + + * coff-x86_64.c (coff_amd64_reloc): Fix formatting. + + 2015-12-18 Nick Clifton + + * coff-i386.c (coff_i386_reloc): Fix formatting. + +2016-02-26 H.J. Lu + + Backport from master + 2016-02-24 H.J. Lu + + PR ld/19698 + * elflink.c (bfd_elf_record_link_assignment): Set versioned if + symbol version is unknown. + +2016-02-26 H.J. Lu + + Backport from master + 2016-02-01 H.J. Lu + + PR ld/19553 + * elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED + if a symbol from a library loaded via DT_NEEDED doesn't match + the symbol referenced by regular object. + +2016-02-26 H.J. Lu + + Backport from master + 2016-02-24 H.J. Lu + + * elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset + to (bfd_vma) -1 when setting needs_plt to 0. + * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise. + +2016-02-26 Alan Modra + + * elf64-ppc.c (create_linkage_sections): Create sfpr when + save_restore_funcs, rest of sections when not relocatable. + (ppc64_elf_init_stub_bfd): Always call create_linkage_sections. + (sfpr_define): Define all symbols on emitted code. + (ppc64_elf_func_desc_adjust): Adjust for sfpr now being created + when relocatable. Move sfpr_define loop earlier. + +2016-02-25 Jiong Wang + + Backport from master + 2016-01-21 Jiong Wang + + * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch + veneer for sym_sec != input_sec. + (elfNN_aarch64_size_stub): Support STT_SECTION symbol. + (elfNN_aarch64_final_link_relocate): Take rela addend into account when + calculation destination. + +2016-02-10 H.J. Lu + + Backport from master + 2016-02-10 H.J. Lu + + PR ld/19601 + * elf32-i386.c (elf_i386_relocate_section): Mask off the least + significant bit in GOT offset for R_386_GOT32X. + +2016-02-02 H.J. Lu + + Backport from master + 2016-02-02 H.J. Lu + + PR ld/19542 + * elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated + distances in the compressed_size field of the output section. + +2016-02-01 John David Anglin + + PR ld/19526 + * elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output + files. + * elf64-hppa.c (elf32_hppa_final_link): Likewise. Remove retval. + +2016-01-25 Tristan Gingold + + * version.m4: Bump version to 2.26.0 + * configure: Regenerate. + 2016-01-25 Tristan Gingold * version.m4: Bump version to 2.26 @@ -119,7 +417,7 @@ * configure: Regenerate. 2015-11-11 Alan Modra - Peter Bergner + Peter Bergner * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. @@ -179,8 +477,8 @@ 2015-10-29 Catherine Moore - * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output - section to bfd_abs_section_ptr if the stub is discarded. + * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output + section to bfd_abs_section_ptr if the stub is discarded. 2015-10-29 Ed Schouten @@ -232,7 +530,7 @@ * bfd-in2.h: Regenerate. 2015-10-27 Laurent Alfonsi - Christophe Monat + Christophe Monat * bfd-in2.h: Regenerate. * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how @@ -1225,115 +1523,115 @@ 2015-08-18 H.J. Lu - * bfd/aoutx.h: Replace shared, executable, relocatable and pie + * aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. - * bfd/bout.c: Likewise. - * bfd/coff-alpha.c: Likewise. - * bfd/coff-arm.c: Likewise. - * bfd/coff-i386.c: Likewise. - * bfd/coff-i960.c: Likewise. - * bfd/coff-m68k.c: Likewise. - * bfd/coff-mcore.c: Likewise. - * bfd/coff-mips.c: Likewise. - * bfd/coff-ppc.c: Likewise. - * bfd/coff-rs6000.c: Likewise. - * bfd/coff-sh.c: Likewise. - * bfd/coff-tic80.c: Likewise. - * bfd/coff-x86_64.c: Likewise. - * bfd/coff64-rs6000.c: Likewise. - * bfd/coffgen.c: Likewise. - * bfd/cofflink.c: Likewise. - * bfd/ecoff.c: Likewise. - * bfd/ecofflink.c: Likewise. - * bfd/elf-bfd.h: Likewise. - * bfd/elf-eh-frame.c: Likewise. - * bfd/elf-ifunc.c: Likewise. - * bfd/elf-m10200.c: Likewise. - * bfd/elf-m10300.c: Likewise. - * bfd/elf-s390-common.c: Likewise. - * bfd/elf-vxworks.c: Likewise. - * bfd/elf.c: Likewise. - * bfd/elf32-arm.c: Likewise. - * bfd/elf32-avr.c: Likewise. - * bfd/elf32-bfin.c: Likewise. - * bfd/elf32-cr16.c: Likewise. - * bfd/elf32-cr16c.c: Likewise. - * bfd/elf32-cris.c: Likewise. - * bfd/elf32-crx.c: Likewise. - * bfd/elf32-d10v.c: Likewise. - * bfd/elf32-dlx.c: Likewise. - * bfd/elf32-epiphany.c: Likewise. - * bfd/elf32-fr30.c: Likewise. - * bfd/elf32-frv.c: Likewise. - * bfd/elf32-ft32.c: Likewise. - * bfd/elf32-h8300.c: Likewise. - * bfd/elf32-hppa.c: Likewise. - * bfd/elf32-i370.c: Likewise. - * bfd/elf32-i386.c: Likewise. - * bfd/elf32-i860.c: Likewise. - * bfd/elf32-ip2k.c: Likewise. - * bfd/elf32-iq2000.c: Likewise. - * bfd/elf32-lm32.c: Likewise. - * bfd/elf32-m32c.c: Likewise. - * bfd/elf32-m32r.c: Likewise. - * bfd/elf32-m68hc11.c: Likewise. - * bfd/elf32-m68hc1x.c: Likewise. - * bfd/elf32-m68k.c: Likewise. - * bfd/elf32-mcore.c: Likewise. - * bfd/elf32-mep.c: Likewise. - * bfd/elf32-metag.c: Likewise. - * bfd/elf32-microblaze.c: Likewise. - * bfd/elf32-moxie.c: Likewise. - * bfd/elf32-msp430.c: Likewise. - * bfd/elf32-mt.c: Likewise. - * bfd/elf32-nds32.c: Likewise. - * bfd/elf32-nios2.c: Likewise. - * bfd/elf32-or1k.c: Likewise. - * bfd/elf32-ppc.c: Likewise. - * bfd/elf32-rl78.c: Likewise. - * bfd/elf32-rx.c: Likewise. - * bfd/elf32-s390.c: Likewise. - * bfd/elf32-score.c: Likewise. - * bfd/elf32-score7.c: Likewise. - * bfd/elf32-sh-symbian.c: Likewise. - * bfd/elf32-sh.c: Likewise. - * bfd/elf32-sh64.c: Likewise. - * bfd/elf32-spu.c: Likewise. - * bfd/elf32-tic6x.c: Likewise. - * bfd/elf32-tilepro.c: Likewise. - * bfd/elf32-v850.c: Likewise. - * bfd/elf32-vax.c: Likewise. - * bfd/elf32-visium.c: Likewise. - * bfd/elf32-xc16x.c: Likewise. - * bfd/elf32-xstormy16.c: Likewise. - * bfd/elf32-xtensa.c: Likewise. - * bfd/elf64-alpha.c: Likewise. - * bfd/elf64-hppa.c: Likewise. - * bfd/elf64-ia64-vms.c: Likewise. - * bfd/elf64-mmix.c: Likewise. - * bfd/elf64-ppc.c: Likewise. - * bfd/elf64-s390.c: Likewise. - * bfd/elf64-sh64.c: Likewise. - * bfd/elf64-x86-64.c: Likewise. - * bfd/elflink.c: Likewise. - * bfd/elfnn-aarch64.c: Likewise. - * bfd/elfnn-ia64.c: Likewise. - * bfd/elfxx-mips.c: Likewise. - * bfd/elfxx-sparc.c: Likewise. - * bfd/elfxx-tilegx.c: Likewise. - * bfd/i386linux.c: Likewise. - * bfd/linker.c: Likewise. - * bfd/m68klinux.c: Likewise. - * bfd/pdp11.c: Likewise. - * bfd/pe-mips.c: Likewise. - * bfd/peXXigen.c: Likewise. - * bfd/reloc.c: Likewise. - * bfd/reloc16.c: Likewise. - * bfd/sparclinux.c: Likewise. - * bfd/sunos.c: Likewise. - * bfd/vms-alpha.c: Likewise. - * bfd/xcofflink.c: Likewise. + * bout.c: Likewise. + * coff-alpha.c: Likewise. + * coff-arm.c: Likewise. + * coff-i386.c: Likewise. + * coff-i960.c: Likewise. + * coff-m68k.c: Likewise. + * coff-mcore.c: Likewise. + * coff-mips.c: Likewise. + * coff-ppc.c: Likewise. + * coff-rs6000.c: Likewise. + * coff-sh.c: Likewise. + * coff-tic80.c: Likewise. + * coff-x86_64.c: Likewise. + * coff64-rs6000.c: Likewise. + * coffgen.c: Likewise. + * cofflink.c: Likewise. + * ecoff.c: Likewise. + * ecofflink.c: Likewise. + * elf-bfd.h: Likewise. + * elf-eh-frame.c: Likewise. + * elf-ifunc.c: Likewise. + * elf-m10200.c: Likewise. + * elf-m10300.c: Likewise. + * elf-s390-common.c: Likewise. + * elf-vxworks.c: Likewise. + * elf.c: Likewise. + * elf32-arm.c: Likewise. + * elf32-avr.c: Likewise. + * elf32-bfin.c: Likewise. + * elf32-cr16.c: Likewise. + * elf32-cr16c.c: Likewise. + * elf32-cris.c: Likewise. + * elf32-crx.c: Likewise. + * elf32-d10v.c: Likewise. + * elf32-dlx.c: Likewise. + * elf32-epiphany.c: Likewise. + * elf32-fr30.c: Likewise. + * elf32-frv.c: Likewise. + * elf32-ft32.c: Likewise. + * elf32-h8300.c: Likewise. + * elf32-hppa.c: Likewise. + * elf32-i370.c: Likewise. + * elf32-i386.c: Likewise. + * elf32-i860.c: Likewise. + * elf32-ip2k.c: Likewise. + * elf32-iq2000.c: Likewise. + * elf32-lm32.c: Likewise. + * elf32-m32c.c: Likewise. + * elf32-m32r.c: Likewise. + * elf32-m68hc11.c: Likewise. + * elf32-m68hc1x.c: Likewise. + * elf32-m68k.c: Likewise. + * elf32-mcore.c: Likewise. + * elf32-mep.c: Likewise. + * elf32-metag.c: Likewise. + * elf32-microblaze.c: Likewise. + * elf32-moxie.c: Likewise. + * elf32-msp430.c: Likewise. + * elf32-mt.c: Likewise. + * elf32-nds32.c: Likewise. + * elf32-nios2.c: Likewise. + * elf32-or1k.c: Likewise. + * elf32-ppc.c: Likewise. + * elf32-rl78.c: Likewise. + * elf32-rx.c: Likewise. + * elf32-s390.c: Likewise. + * elf32-score.c: Likewise. + * elf32-score7.c: Likewise. + * elf32-sh-symbian.c: Likewise. + * elf32-sh.c: Likewise. + * elf32-sh64.c: Likewise. + * elf32-spu.c: Likewise. + * elf32-tic6x.c: Likewise. + * elf32-tilepro.c: Likewise. + * elf32-v850.c: Likewise. + * elf32-vax.c: Likewise. + * elf32-visium.c: Likewise. + * elf32-xc16x.c: Likewise. + * elf32-xstormy16.c: Likewise. + * elf32-xtensa.c: Likewise. + * elf64-alpha.c: Likewise. + * elf64-hppa.c: Likewise. + * elf64-ia64-vms.c: Likewise. + * elf64-mmix.c: Likewise. + * elf64-ppc.c: Likewise. + * elf64-s390.c: Likewise. + * elf64-sh64.c: Likewise. + * elf64-x86-64.c: Likewise. + * elflink.c: Likewise. + * elfnn-aarch64.c: Likewise. + * elfnn-ia64.c: Likewise. + * elfxx-mips.c: Likewise. + * elfxx-sparc.c: Likewise. + * elfxx-tilegx.c: Likewise. + * i386linux.c: Likewise. + * linker.c: Likewise. + * m68klinux.c: Likewise. + * pdp11.c: Likewise. + * pe-mips.c: Likewise. + * peXXigen.c: Likewise. + * reloc.c: Likewise. + * reloc16.c: Likewise. + * sparclinux.c: Likewise. + * sunos.c: Likewise. + * vms-alpha.c: Likewise. + * xcofflink.c: Likewise. 2015-08-18 Alan Modra @@ -1387,7 +1685,7 @@ 2015-08-11 Jiong Wang - * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". + * elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". Loose the check for symbol from ABS section. (elfNN_aarch64_size_stubs): Pass sym_sec. @@ -1688,10 +1986,10 @@ 2015-07-10 H.J. Lu - PR binutils/18656 - * bfd.c (bfd_convert_section_size): New function. - (bfd_convert_section_contents): Likewise. - * bfd-in2.h: Regenerated. + PR binutils/18656 + * bfd.c (bfd_convert_section_size): New function. + (bfd_convert_section_contents): Likewise. + * bfd-in2.h: Regenerated. 2015-07-09 Catherine Moore @@ -2004,7 +2302,6 @@ Bernd Schmidt Paul Brook - bfd/ * bfd-in2.h: Regenerated. * elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define. (COMPACT_EH_CANT_UNWIND_OPCODE): Define. @@ -2913,7 +3210,7 @@ 2015-03-18 H.J. Lu * compress.c (bfd_compress_section_contents): Make it static. - * bfd/bfd-in2.h: Regenerated. + * bfd-in2.h: Regenerated. 2015-03-18 Eric Youngdale @@ -3062,8 +3359,8 @@ 2015-02-27 Marcus Shawcroft - * bfd/bfd-in2.h: Regenerate. - * bfd/libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. 2015-02-26 Marcus Shawcroft @@ -3534,7 +3831,7 @@ is weak or pointer_equality_needed is FALSE. * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Improve - comment discussing why we clear st_value for some symbols. + comment discussing why we clear st_value for some symbols. 2015-02-02 Kuan-Lin Chen diff --git a/binutils/bfd/archive.c b/binutils/bfd/archive.c index b3d03d3..1fc3a94 100644 --- a/binutils/bfd/archive.c +++ b/binutils/bfd/archive.c @@ -802,7 +802,7 @@ Note that last_file->origin can be odd in the case of BSD-4.4-style element with a long odd size. */ filestart += filestart % 2; - if (filestart <= last_file->proxy_origin) + if (filestart < last_file->proxy_origin) { /* Prevent looping. See PR19256. */ bfd_set_error (bfd_error_malformed_archive); diff --git a/binutils/bfd/coff-alpha.c b/binutils/bfd/coff-alpha.c index 7478f2f..fffb9f7 100644 --- a/binutils/bfd/coff-alpha.c +++ b/binutils/bfd/coff-alpha.c @@ -2208,7 +2208,7 @@ BSD-4.4-style element with a long odd size. */ filestart = last_file->proxy_origin + size; filestart += filestart % 2; - if (filestart <= last_file->proxy_origin) + if (filestart < last_file->proxy_origin) { /* Prevent looping. See PR19256. */ bfd_set_error (bfd_error_malformed_archive); diff --git a/binutils/bfd/coff-i386.c b/binutils/bfd/coff-i386.c index a9725c4..1b1a815 100644 --- a/binutils/bfd/coff-i386.c +++ b/binutils/bfd/coff-i386.c @@ -139,41 +139,41 @@ #define DOIT(x) \ x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask)) - if (diff != 0) - { - reloc_howto_type *howto = reloc_entry->howto; - unsigned char *addr = (unsigned char *) data + reloc_entry->address; + if (diff != 0) + { + reloc_howto_type *howto = reloc_entry->howto; + unsigned char *addr = (unsigned char *) data + reloc_entry->address; - switch (howto->size) + switch (howto->size) + { + case 0: { - case 0: - { - char x = bfd_get_8 (abfd, addr); - DOIT (x); - bfd_put_8 (abfd, x, addr); - } - break; - - case 1: - { - short x = bfd_get_16 (abfd, addr); - DOIT (x); - bfd_put_16 (abfd, (bfd_vma) x, addr); - } - break; + char x = bfd_get_8 (abfd, addr); + DOIT (x); + bfd_put_8 (abfd, x, addr); + } + break; - case 2: - { - long x = bfd_get_32 (abfd, addr); - DOIT (x); - bfd_put_32 (abfd, (bfd_vma) x, addr); - } - break; + case 1: + { + short x = bfd_get_16 (abfd, addr); + DOIT (x); + bfd_put_16 (abfd, (bfd_vma) x, addr); + } + break; - default: - abort (); + case 2: + { + long x = bfd_get_32 (abfd, addr); + DOIT (x); + bfd_put_32 (abfd, (bfd_vma) x, addr); } - } + break; + + default: + abort (); + } + } /* Now let bfd_perform_relocation finish everything up. */ return bfd_reloc_continue; diff --git a/binutils/bfd/coff-x86_64.c b/binutils/bfd/coff-x86_64.c index 4e6420a..9d7c845 100644 --- a/binutils/bfd/coff-x86_64.c +++ b/binutils/bfd/coff-x86_64.c @@ -138,59 +138,61 @@ #define DOIT(x) \ x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask)) - if (diff != 0) - { - reloc_howto_type *howto = reloc_entry->howto; - unsigned char *addr = (unsigned char *) data + reloc_entry->address; + if (diff != 0) + { + reloc_howto_type *howto = reloc_entry->howto; + unsigned char *addr = (unsigned char *) data + reloc_entry->address; - /* FIXME: We do not have an end address for data, so we cannot - accurately range check any addresses computed against it. - cf: PR binutils/17512: file: 1085-1761-0.004. - For now we do the best that we can. */ - if (addr < (unsigned char *) data || addr > ((unsigned char *) data) + input_section->size) + /* FIXME: We do not have an end address for data, so we cannot + accurately range check any addresses computed against it. + cf: PR binutils/17512: file: 1085-1761-0.004. + For now we do the best that we can. */ + if (addr < (unsigned char *) data + || addr > ((unsigned char *) data) + input_section->size) + { + bfd_set_error (bfd_error_bad_value); + return bfd_reloc_notsupported; + } + + switch (howto->size) + { + case 0: { - bfd_set_error (bfd_error_bad_value); - return bfd_reloc_notsupported; + char x = bfd_get_8 (abfd, addr); + DOIT (x); + bfd_put_8 (abfd, x, addr); } + break; - switch (howto->size) + case 1: { - case 0: - { - char x = bfd_get_8 (abfd, addr); - DOIT (x); - bfd_put_8 (abfd, x, addr); - } - break; - - case 1: - { - short x = bfd_get_16 (abfd, addr); - DOIT (x); - bfd_put_16 (abfd, (bfd_vma) x, addr); - } - break; + short x = bfd_get_16 (abfd, addr); + DOIT (x); + bfd_put_16 (abfd, (bfd_vma) x, addr); + } + break; - case 2: - { - long x = bfd_get_32 (abfd, addr); - DOIT (x); - bfd_put_32 (abfd, (bfd_vma) x, addr); - } - break; - case 4: - { - long long x = bfd_get_64 (abfd, addr); - DOIT (x); - bfd_put_64 (abfd, (bfd_vma) x, addr); - } - break; + case 2: + { + long x = bfd_get_32 (abfd, addr); + DOIT (x); + bfd_put_32 (abfd, (bfd_vma) x, addr); + } + break; - default: - bfd_set_error (bfd_error_bad_value); - return bfd_reloc_notsupported; + case 4: + { + long long x = bfd_get_64 (abfd, addr); + DOIT (x); + bfd_put_64 (abfd, (bfd_vma) x, addr); } - } + break; + + default: + bfd_set_error (bfd_error_bad_value); + return bfd_reloc_notsupported; + } + } /* Now let bfd_perform_relocation finish everything up. */ return bfd_reloc_continue; diff --git a/binutils/bfd/coffcode.h b/binutils/bfd/coffcode.h index 2499885..97db5f7 100644 --- a/binutils/bfd/coffcode.h +++ b/binutils/bfd/coffcode.h @@ -4076,6 +4076,8 @@ internal_f.f_flags |= F_DYNLOAD; #endif + memset (&internal_a, 0, sizeof internal_a); + /* Set up architecture-dependent stuff. */ { unsigned int magic = 0; diff --git a/binutils/bfd/cofflink.c b/binutils/bfd/cofflink.c index 8d98fec..88eb2b3 100644 --- a/binutils/bfd/cofflink.c +++ b/binutils/bfd/cofflink.c @@ -2977,6 +2977,12 @@ else { sec = sections[symndx]; + + /* PR 19623: Relocations against symbols in + the absolute sections should ignored. */ + if (bfd_is_abs_section (sec)) + continue; + val = (sec->output_section->vma + sec->output_offset + sym->n_value); diff --git a/binutils/bfd/configure b/binutils/bfd/configure index cf3c746..2cacd7a 100755 --- a/binutils/bfd/configure +++ b/binutils/bfd/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for bfd 2.26. +# Generated by GNU Autoconf 2.64 for bfd 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='bfd' PACKAGE_TARNAME='bfd' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='bfd 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='bfd 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1351,7 +1351,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures bfd 2.26 to adapt to many kinds of systems. +\`configure' configures bfd 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1422,7 +1422,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of bfd 2.26:";; + short | recursive ) echo "Configuration of bfd 2.26.1:";; esac cat <<\_ACEOF @@ -1543,7 +1543,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -bfd configure 2.26 +bfd configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -2185,7 +2185,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by bfd $as_me 2.26, which was +It was created by bfd $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -3993,7 +3993,7 @@ # Define the identity of the package. PACKAGE='bfd' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -16533,7 +16533,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by bfd $as_me 2.26, which was +This file was extended by bfd $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -16597,7 +16597,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -bfd config.status 2.26 +bfd config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/bfd/development.sh b/binutils/bfd/development.sh index 6bbef6d..0e65c07 100644 --- a/binutils/bfd/development.sh +++ b/binutils/bfd/development.sh @@ -16,4 +16,4 @@ # along with this program. If not, see . # Controls whether to enable development-mode features by default. -development=true +development=false diff --git a/binutils/bfd/dwarf2.c b/binutils/bfd/dwarf2.c index 176f018..64cfe9b 100644 --- a/binutils/bfd/dwarf2.c +++ b/binutils/bfd/dwarf2.c @@ -3706,8 +3706,10 @@ fail more quickly. */ return FALSE; + /* Set BFD_DECOMPRESS to decompress debug sections. */ if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL - || ! bfd_check_format (debug_bfd, bfd_object) + || !(debug_bfd->flags |= BFD_DECOMPRESS, + bfd_check_format (debug_bfd, bfd_object)) || (msec = find_debug_info (debug_bfd, debug_sections, NULL)) == NULL || !bfd_generic_link_read_symbols (debug_bfd)) diff --git a/binutils/bfd/elf-bfd.h b/binutils/bfd/elf-bfd.h index 70e3327..f36b945 100644 --- a/binutils/bfd/elf-bfd.h +++ b/binutils/bfd/elf-bfd.h @@ -2039,9 +2039,11 @@ extern unsigned int _bfd_elf_strtab_refcount (struct elf_strtab_hash *, bfd_size_type); extern void _bfd_elf_strtab_clear_all_refs - (struct elf_strtab_hash *tab); -extern void _bfd_elf_strtab_restore_size - (struct elf_strtab_hash *, bfd_size_type); + (struct elf_strtab_hash *); +extern void *_bfd_elf_strtab_save + (struct elf_strtab_hash *); +extern void _bfd_elf_strtab_restore + (struct elf_strtab_hash *, void *); extern bfd_size_type _bfd_elf_strtab_size (struct elf_strtab_hash *); extern bfd_size_type _bfd_elf_strtab_offset diff --git a/binutils/bfd/elf-strtab.c b/binutils/bfd/elf-strtab.c index 4d38e04..e7de973 100644 --- a/binutils/bfd/elf-strtab.c +++ b/binutils/bfd/elf-strtab.c @@ -215,16 +215,45 @@ tab->array[idx]->refcount = 0; } -/* Downsizes strtab. Entries from IDX up to the current size are - removed from the array. */ +/* Save strtab refcounts prior to adding --as-needed library. */ + +struct strtab_save +{ + bfd_size_type size; + unsigned int refcount[1]; +}; + +void * +_bfd_elf_strtab_save (struct elf_strtab_hash *tab) +{ + struct strtab_save *save; + bfd_size_type idx, size; + + size = sizeof (*save) + (tab->size - 1) * sizeof (save->refcount[0]); + save = bfd_malloc (size); + if (save == NULL) + return save; + + save->size = tab->size; + for (idx = 1; idx < tab->size; idx++) + save->refcount[idx] = tab->array[idx]->refcount; + return save; +} + +/* Restore strtab refcounts on finding --as-needed library not needed. */ + void -_bfd_elf_strtab_restore_size (struct elf_strtab_hash *tab, bfd_size_type idx) +_bfd_elf_strtab_restore (struct elf_strtab_hash *tab, void *buf) { - bfd_size_type curr_size = tab->size; + bfd_size_type idx, curr_size = tab->size; + struct strtab_save *save = (struct strtab_save *) buf; BFD_ASSERT (tab->sec_size == 0); - BFD_ASSERT (idx <= curr_size); - tab->size = idx; + BFD_ASSERT (save->size <= curr_size); + tab->size = save->size; + for (idx = 1; idx < save->size; ++idx) + tab->array[idx]->refcount = save->refcount[idx]; + for (; idx < curr_size; ++idx) { /* We don't remove entries from the hash table, just set their diff --git a/binutils/bfd/elf32-arm.c b/binutils/bfd/elf32-arm.c index 5affc76..b585e5b 100644 --- a/binutils/bfd/elf32-arm.c +++ b/binutils/bfd/elf32-arm.c @@ -7374,18 +7374,21 @@ { /* A6.5 Extension register load or store instruction A7.7.229 - We look only for the 32-bit registers case since the DP (64-bit - registers) are not supported for STM32L4XX + We look for SP 32-bit and DP 64-bit registers. + Encoding T1 VLDM{mode} {!}, + is consecutive 64-bit registers + 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii Encoding T2 VLDM{mode} {!}, is consecutive 32-bit registers 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii if P==0 && U==1 && W==1 && Rn=1101 VPOP if PUW=010 || PUW=011 || PUW=101 VLDM. */ return - ((insn & 0xfe100f00) == 0xec100a00) + (((insn & 0xfe100f00) == 0xec100b00) || + ((insn & 0xfe100f00) == 0xec100a00)) && /* (IA without !). */ (((((insn << 7) >> 28) & 0xd) == 0x4) - /* (IA with !), includes VPOP (when reg number is SP). */ + /* (IA with !), includes VPOP (when reg number is SP). */ || ((((insn << 7) >> 28) & 0xd) == 0x5) /* (DB with !). */ || ((((insn << 7) >> 28) & 0xd) == 0x9)); @@ -7402,19 +7405,19 @@ stm32l4xx_need_create_replacing_stub (const insn32 insn, bfd_arm_stm32l4xx_fix stm32l4xx_fix) { - int nb_regs = 0; + int nb_words = 0; /* The field encoding the register list is the same for both LDMIA and LDMDB encodings. */ if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) - nb_regs = popcount (insn & 0x0000ffff); + nb_words = popcount (insn & 0x0000ffff); else if (is_thumb2_vldm (insn)) - nb_regs = (insn & 0xff); + nb_words = (insn & 0xff); /* DEFAULT mode accounts for the real bug condition situation, ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ return - (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_regs > 8 : + (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; } @@ -16242,30 +16245,31 @@ } static inline bfd_vma -create_instruction_vldmia (int base_reg, int wback, int num_regs, +create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, int first_reg) { /* A8.8.332 VLDM (A8-922) - VLMD{MODE} Rn{!}, {list} (Encoding T2). */ - bfd_vma patched_inst = 0xec900a00 + VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ + bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) | (/*W=*/wback << 21) | (base_reg << 16) - | (num_regs & 0x000000ff) - | (((unsigned)first_reg>>1) & 0x0000000f) << 12 + | (num_words & 0x000000ff) + | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 | (first_reg & 0x00000001) << 22; return patched_inst; } static inline bfd_vma -create_instruction_vldmdb (int base_reg, int num_regs, int first_reg) +create_instruction_vldmdb (int base_reg, int is_dp, int num_words, + int first_reg) { /* A8.8.332 VLDM (A8-922) - VLMD{MODE} Rn!, {} (Encoding T2). */ - bfd_vma patched_inst = 0xed300a00 + VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ + bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) | (base_reg << 16) - | (num_regs & 0x000000ff) - | (((unsigned)first_reg>>1) & 0x0000000f) << 12 + | (num_words & 0x000000ff) + | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 | (first_reg & 0x00000001) << 22; return patched_inst; @@ -16745,15 +16749,15 @@ const bfd_byte *const initial_insn_addr, bfd_byte *const base_stub_contents) { - int num_regs = ((unsigned int)initial_insn << 24) >> 24; + int num_words = ((unsigned int) initial_insn << 24) >> 24; bfd_byte *current_stub_contents = base_stub_contents; BFD_ASSERT (is_thumb2_vldm (initial_insn)); /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with - smaller than 8 registers load sequences that do not cause the + smaller than 8 words load sequences that do not cause the hardware issue. */ - if (num_regs <= 8) + if (num_words <= 8) { /* Untouched instruction. */ current_stub_contents = @@ -16768,28 +16772,30 @@ } else { + bfd_boolean is_dp = /* DP encoding. */ + (initial_insn & 0xfe100f00) == 0xec100b00; bfd_boolean is_ia_nobang = /* (IA without !). */ (((initial_insn << 7) >> 28) & 0xd) == 0x4; bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */ (((initial_insn << 7) >> 28) & 0xd) == 0x5; bfd_boolean is_db_bang = /* (DB with !). */ (((initial_insn << 7) >> 28) & 0xd) == 0x9; - int base_reg = ((unsigned int)initial_insn << 12) >> 28; + int base_reg = ((unsigned int) initial_insn << 12) >> 28; /* d = UInt (Vd:D);. */ - int first_reg = ((((unsigned int)initial_insn << 16) >> 28) << 1) + int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) | (((unsigned int)initial_insn << 9) >> 31); - /* Compute the number of 8-register chunks needed to split. */ - int chunks = (num_regs%8) ? (num_regs/8 + 1) : (num_regs/8); + /* Compute the number of 8-words chunks needed to split. */ + int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); int chunk; /* The test coverage has been done assuming the following hypothesis that exactly one of the previous is_ predicates is true. */ - BFD_ASSERT ((is_ia_nobang ^ is_ia_bang ^ is_db_bang) && - !(is_ia_nobang & is_ia_bang & is_db_bang)); + BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) + && !(is_ia_nobang & is_ia_bang & is_db_bang)); - /* We treat the cutting of the register in one pass for all + /* We treat the cutting of the words in one pass for all cases, then we emit the adjustments: vldm rx, {...} @@ -16802,29 +16808,34 @@ vldmd rx!, {...} -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ - for (chunk = 0; chunksymtab_hdr; sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); @@ -1862,15 +1863,32 @@ } } + /* We need to look at all relocs with offsets less than toaddr. prop + records handling adjusts toaddr downwards to avoid moving syms at the + address of the property record, but all relocs with offsets between addr + and the current value of toaddr need to have their offsets adjusted. + Assume addr = 0, toaddr = 4 and count = 2. After prop records handling, + toaddr becomes 2, but relocs with offsets 2 and 3 still need to be + adjusted (to 0 and 1 respectively), as the first 2 bytes are now gone. + So record the current value of toaddr here, and use it when adjusting + reloc offsets. */ + reloc_toaddr = toaddr; + irel = elf_section_data (sec)->relocs; irelend = irel + sec->reloc_count; /* Actually delete the bytes. */ if (toaddr - addr - count > 0) - memmove (contents + addr, contents + addr + count, - (size_t) (toaddr - addr - count)); + { + memmove (contents + addr, contents + addr + count, + (size_t) (toaddr - addr - count)); + did_shrink = TRUE; + } if (prop_record == NULL) - sec->size -= count; + { + sec->size -= count; + did_shrink = TRUE; + } else { /* Use the property record to fill in the bytes we've opened up. */ @@ -1889,12 +1907,20 @@ prop_record->data.align.preceding_deleted += count; break; }; + /* If toaddr == (addr + count), then we didn't delete anything, yet + we fill count bytes backwards from toaddr. This is still ok - we + end up overwriting the bytes we would have deleted. We just need + to remember we didn't delete anything i.e. don't set did_shrink, + so that we don't corrupt reloc offsets or symbol values.*/ memset (contents + toaddr - count, fill, count); /* Adjust the TOADDR to avoid moving symbols located at the address of the property record, which has not moved. */ toaddr -= count; } + + if (!did_shrink) + return TRUE; /* Adjust all the reloc addresses. */ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) @@ -1906,7 +1932,7 @@ /* Get the new reloc address. */ if ((irel->r_offset > addr - && irel->r_offset < toaddr)) + && irel->r_offset < reloc_toaddr)) { if (debug_relax) printf ("Relocation at address 0x%x needs to be moved.\n" diff --git a/binutils/bfd/elf32-hppa.c b/binutils/bfd/elf32-hppa.c index ad40914..3fc1f57 100644 --- a/binutils/bfd/elf32-hppa.c +++ b/binutils/bfd/elf32-hppa.c @@ -3245,6 +3245,8 @@ static bfd_boolean elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info) { + struct stat buf; + /* Invoke the regular ELF linker to do all the work. */ if (!bfd_elf_final_link (abfd, info)) return FALSE; @@ -3252,6 +3254,13 @@ /* If we're producing a final executable, sort the contents of the unwind section. */ if (bfd_link_relocatable (info)) + return TRUE; + + /* Do not attempt to sort non-regular files. This is here + especially for configure scripts and kernel builds which run + tests with "ld [...] -o /dev/null". */ + if (stat (abfd->filename, &buf) != 0 + || !S_ISREG(buf.st_mode)) return TRUE; return elf_hppa_sort_unwind (abfd); diff --git a/binutils/bfd/elf32-i386.c b/binutils/bfd/elf32-i386.c index 300839b..73bba33 100644 --- a/binutils/bfd/elf32-i386.c +++ b/binutils/bfd/elf32-i386.c @@ -1830,7 +1830,8 @@ && (sec->flags & SEC_ALLOC) != 0 && (r_type != R_386_PC32 || (h != NULL - && (! SYMBOLIC_BIND (info, h) + && (! (bfd_link_pie (info) + || SYMBOLIC_BIND (info, h)) || h->root.type == bfd_link_hash_defweak || !h->def_regular)))) || (ELIMINATE_COPY_RELOCS @@ -1961,7 +1962,7 @@ return FALSE; } - if ((r_type == R_386_GOT32 || r_type == R_386_GOT32X) + if (r_type == R_386_GOT32X && (h == NULL || h->type != STT_GNU_IFUNC)) sec->need_convert_load = 1; } @@ -2490,12 +2491,14 @@ } else { + eh->plt_got.offset = (bfd_vma) -1; h->plt.offset = (bfd_vma) -1; h->needs_plt = 0; } } else { + eh->plt_got.offset = (bfd_vma) -1; h->plt.offset = (bfd_vma) -1; h->needs_plt = 0; } @@ -2813,14 +2816,16 @@ unsigned int nop; bfd_vma nop_offset; - if (r_type != R_386_GOT32 && r_type != R_386_GOT32X) + /* Don't convert R_386_GOT32 since we can't tell if it is applied + to "mov $foo@GOT, %reg" which isn't a load via GOT. */ + if (r_type != R_386_GOT32X) continue; roff = irel->r_offset; if (roff < 2) continue; - /* Addend for R_386_GOT32 and R_386_GOT32X relocations must be 0. */ + /* Addend for R_386_GOT32X relocation must be 0. */ addend = bfd_get_32 (abfd, contents + roff); if (addend != 0) continue; @@ -2828,13 +2833,11 @@ modrm = bfd_get_8 (abfd, contents + roff - 1); baseless = (modrm & 0xc7) == 0x5; - if (r_type == R_386_GOT32X - && baseless + if (baseless && bfd_link_pic (link_info)) { /* For PIC, disallow R_386_GOT32X without a base register - since we don't know what the GOT base is. Allow - R_386_GOT32 for existing object files. */ + since we don't know what the GOT base is. */ const char *name; if (r_symndx < symtab_hdr->sh_info) @@ -2862,12 +2865,6 @@ /* It is OK to convert mov to lea. */ if (opcode != 0x8b) { - /* Only convert R_386_GOT32X relocation for call, jmp or - one of adc, add, and, cmp, or, sbb, sub, test, xor - instructions. */ - if (r_type != R_386_GOT32X) - continue; - /* It is OK to convert indirect branch to direct branch. It is OK to convert adc, add, and, cmp, or, sbb, sub, test, xor only when PIC is false. */ @@ -2875,8 +2872,8 @@ continue; } - /* Try to convert R_386_GOT32 and R_386_GOT32X. Get the symbol - referred to by the reloc. */ + /* Try to convert R_386_GOT32X. Get the symbol referred to by + the reloc. */ if (r_symndx < symtab_hdr->sh_info) { isym = bfd_sym_from_r_symndx (&htab->sym_cache, @@ -2988,8 +2985,7 @@ { /* Convert "mov foo@GOT(%reg1), %reg2" to "lea foo@GOTOFF(%reg1), %reg2". */ - if (r_type == R_386_GOT32X - && (baseless || !bfd_link_pic (link_info))) + if (baseless || !bfd_link_pic (link_info)) { r_type = R_386_32; /* For R_386_32, convert @@ -3953,20 +3949,26 @@ } relocation = off; - - /* Adjust for static executables. */ - if (htab->elf.splt == NULL) - relocation += gotplt->output_offset; } else + relocation = (base_got->output_section->vma + + base_got->output_offset + off + - gotplt->output_section->vma + - gotplt->output_offset); + + if ((*(contents + rel->r_offset - 1) & 0xc7) == 0x5) + { + if (bfd_link_pic (info)) + goto disallow_got32; + + /* Add the GOT base if there is no base register. */ + relocation += (gotplt->output_section->vma + + gotplt->output_offset); + } + else if (htab->elf.splt == NULL) { - relocation = (base_got->output_section->vma - + base_got->output_offset + off - - gotplt->output_section->vma - - gotplt->output_offset); /* Adjust for static executables. */ - if (htab->elf.splt == NULL) - relocation += gotplt->output_offset; + relocation += gotplt->output_offset; } goto do_relocation; @@ -4016,10 +4018,12 @@ /* It is relative to .got.plt section. */ if (h->got.offset != (bfd_vma) -1) - /* Use GOT entry. */ + /* Use GOT entry. Mask off the least significant bit in + GOT offset which may be set by R_386_GOT32 processing + below. */ relocation = (htab->elf.sgot->output_section->vma + htab->elf.sgot->output_offset - + h->got.offset - offplt); + + (h->got.offset & ~1) - offplt); else /* Use GOTPLT entry. */ relocation = (h->plt.offset / plt_entry_size - 1 + 3) * 4; @@ -4122,10 +4126,39 @@ if (off >= (bfd_vma) -2) abort (); - relocation = htab->elf.sgot->output_section->vma - + htab->elf.sgot->output_offset + off - - htab->elf.sgotplt->output_section->vma - - htab->elf.sgotplt->output_offset; + relocation = (htab->elf.sgot->output_section->vma + + htab->elf.sgot->output_offset + off); + if ((*(contents + rel->r_offset - 1) & 0xc7) == 0x5) + { + if (bfd_link_pic (info)) + { + /* For PIC, disallow R_386_GOT32 without a base + register since we don't know what the GOT base + is. */ + const char *name; + +disallow_got32: + if (h == NULL) + name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, + NULL); + else + name = h->root.root.string; + + (*_bfd_error_handler) + (_("%B: direct GOT relocation %s against `%s' without base register can not be used when making a shared object"), + input_bfd, howto->name, name); + bfd_set_error (bfd_error_bad_value); + return FALSE; + } + } + else + { + /* Subtract the .got.plt section address only with a base + register. */ + relocation -= (htab->elf.sgotplt->output_section->vma + + htab->elf.sgotplt->output_offset); + } + break; case R_386_GOTOFF: @@ -4285,8 +4318,8 @@ else if (h != NULL && h->dynindx != -1 && (r_type == R_386_PC32 - || !bfd_link_pic (info) - || !SYMBOLIC_BIND (info, h) + || !(bfd_link_executable (info) + || SYMBOLIC_BIND (info, h)) || !h->def_regular)) outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); else @@ -5355,19 +5388,23 @@ bfd *abfd = info->output_bfd; const struct elf_backend_data *bed = get_elf_backend_data (abfd); struct elf_link_hash_table *htab = elf_hash_table (info); - unsigned long r_symndx = ELF32_R_SYM (rela->r_info); - Elf_Internal_Sym sym; - - if (htab->dynsym == NULL - || !bed->s->swap_symbol_in (abfd, - (htab->dynsym->contents - + r_symndx * sizeof (Elf32_External_Sym)), - 0, &sym)) - abort (); - /* Check relocation against STT_GNU_IFUNC symbol. */ - if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) - return reloc_class_ifunc; + if (htab->dynsym != NULL + && htab->dynsym->contents != NULL) + { + /* Check relocation against STT_GNU_IFUNC symbol if there are + dynamic symbols. */ + unsigned long r_symndx = ELF32_R_SYM (rela->r_info); + Elf_Internal_Sym sym; + if (!bed->s->swap_symbol_in (abfd, + (htab->dynsym->contents + + r_symndx * sizeof (Elf32_External_Sym)), + 0, &sym)) + abort (); + + if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) + return reloc_class_ifunc; + } switch (ELF32_R_TYPE (rela->r_info)) { diff --git a/binutils/bfd/elf32-ppc.c b/binutils/bfd/elf32-ppc.c index ea03598..cfc6e57 100644 --- a/binutils/bfd/elf32-ppc.c +++ b/binutils/bfd/elf32-ppc.c @@ -5166,6 +5166,7 @@ tga->root.type = bfd_link_hash_indirect; tga->root.u.i.link = &opt->root; ppc_elf_copy_indirect_symbol (info, opt, tga); + opt->forced_local = 0; if (opt->dynindx != -1) { /* Use __tls_get_addr_opt in dynamic relocations. */ diff --git a/binutils/bfd/elf64-hppa.c b/binutils/bfd/elf64-hppa.c index 3b628b4..aa9cfd2 100644 --- a/binutils/bfd/elf64-hppa.c +++ b/binutils/bfd/elf64-hppa.c @@ -2945,7 +2945,7 @@ static bfd_boolean elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info) { - bfd_boolean retval; + struct stat buf; struct elf64_hppa_link_hash_table *hppa_info = hppa_link_hash_table (info); if (hppa_info == NULL) @@ -3029,7 +3029,8 @@ info); /* Invoke the regular ELF backend linker to do all the work. */ - retval = bfd_elf_final_link (abfd, info); + if (!bfd_elf_final_link (abfd, info)) + return FALSE; elf_link_hash_traverse (elf_hash_table (info), elf_hppa_remark_useless_dynamic_symbols, @@ -3037,10 +3038,17 @@ /* If we're producing a final executable, sort the contents of the unwind section. */ - if (retval && !bfd_link_relocatable (info)) - retval = elf_hppa_sort_unwind (abfd); + if (bfd_link_relocatable (info)) + return TRUE; + + /* Do not attempt to sort non-regular files. This is here + especially for configure scripts and kernel builds which run + tests with "ld [...] -o /dev/null". */ + if (stat (abfd->filename, &buf) != 0 + || !S_ISREG(buf.st_mode)) + return TRUE; - return retval; + return elf_hppa_sort_unwind (abfd); } /* Relocate the given INSN. VALUE should be the actual value we want diff --git a/binutils/bfd/elf64-ppc.c b/binutils/bfd/elf64-ppc.c index 162862c..aa6fe08 100644 --- a/binutils/bfd/elf64-ppc.c +++ b/binutils/bfd/elf64-ppc.c @@ -2570,6 +2570,7 @@ elf_symbol_type *elfsym = (elf_symbol_type *) symbol; if (symbol->section->owner != abfd + && symbol->section->owner != NULL && abiversion (symbol->section->owner) >= 2) { unsigned int i; @@ -4344,14 +4345,20 @@ htab = ppc_hash_table (info); - /* Create .sfpr for code to save and restore fp regs. */ flags = (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED); - htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr", - flags); - if (htab->sfpr == NULL - || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2)) - return FALSE; + if (htab->params->save_restore_funcs) + { + /* Create .sfpr for code to save and restore fp regs. */ + htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr", + flags); + if (htab->sfpr == NULL + || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2)) + return FALSE; + } + + if (bfd_link_relocatable (info)) + return TRUE; /* Create .glink for lazy dynamic linking support. */ htab->glink = bfd_make_section_anyway_with_flags (dynobj, ".glink", @@ -4428,9 +4435,6 @@ return FALSE; htab->elf.dynobj = params->stub_bfd; htab->params = params; - - if (bfd_link_relocatable (info)) - return TRUE; return create_linkage_sections (htab->elf.dynobj, info); } @@ -6665,7 +6669,7 @@ sym[len + 0] = i / 10 + '0'; sym[len + 1] = i % 10 + '0'; h = (struct ppc_link_hash_entry *) - elf_link_hash_lookup (&htab->elf, sym, FALSE, FALSE, TRUE); + elf_link_hash_lookup (&htab->elf, sym, writing, TRUE, TRUE); if (stub_sec != NULL) { if (h != NULL @@ -6706,6 +6710,7 @@ h->elf.root.u.def.value = htab->sfpr->size; h->elf.type = STT_FUNC; h->elf.def_regular = 1; + h->elf.non_elf = 0; _bfd_elf_link_hash_hide_symbol (info, &h->elf, TRUE); writing = TRUE; if (htab->sfpr->contents == NULL) @@ -7050,14 +7055,28 @@ struct bfd_link_info *info) { struct ppc_link_hash_table *htab; - unsigned int i; htab = ppc_hash_table (info); if (htab == NULL) return FALSE; + + /* Provide any missing _save* and _rest* functions. */ + if (htab->sfpr != NULL) + { + unsigned int i; + + htab->sfpr->size = 0; + for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++) + if (!sfpr_define (info, &save_res_funcs[i], NULL)) + return FALSE; + if (htab->sfpr->size == 0) + htab->sfpr->flags |= SEC_EXCLUDE; + } + + if (bfd_link_relocatable (info)) + return TRUE; - if (!bfd_link_relocatable (info) - && htab->elf.hgot != NULL) + if (htab->elf.hgot != NULL) { _bfd_elf_link_hash_hide_symbol (info, htab->elf.hgot, TRUE); /* Make .TOC. defined so as to prevent it being made dynamic. @@ -7076,22 +7095,8 @@ | STV_HIDDEN); } - if (htab->sfpr == NULL) - /* We don't have any relocs. */ - return TRUE; - - /* Provide any missing _save* and _rest* functions. */ - htab->sfpr->size = 0; - if (htab->params->save_restore_funcs) - for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++) - if (!sfpr_define (info, &save_res_funcs[i], NULL)) - return FALSE; - elf_link_hash_traverse (&htab->elf, func_desc_adjust, info); - if (htab->sfpr->size == 0) - htab->sfpr->flags |= SEC_EXCLUDE; - return TRUE; } @@ -8224,6 +8229,7 @@ tga_fd->root.type = bfd_link_hash_indirect; tga_fd->root.u.i.link = &opt_fd->root; ppc64_elf_copy_indirect_symbol (info, opt_fd, tga_fd); + opt_fd->forced_local = 0; if (opt_fd->dynindx != -1) { /* Use __tls_get_addr_opt in dynamic relocations. */ @@ -8240,6 +8246,7 @@ tga->root.type = bfd_link_hash_indirect; tga->root.u.i.link = &opt->root; ppc64_elf_copy_indirect_symbol (info, opt, tga); + opt->forced_local = 0; _bfd_elf_link_hash_hide_symbol (info, opt, tga->forced_local); htab->tls_get_addr = (struct ppc_link_hash_entry *) opt; @@ -12176,6 +12183,13 @@ if (!group_sections (info, stub_group_size, stubs_always_before_branch)) return FALSE; + +#define STUB_SHRINK_ITER 20 + /* Loop until no stubs added. After iteration 20 of this loop we may + exit on a stub section shrinking. This is to break out of a + pathological case where adding stubs on one iteration decreases + section gaps (perhaps due to alignment), which then requires + fewer or smaller stubs on the next iteration. */ while (1) { @@ -12558,11 +12572,11 @@ stub_sec != NULL; stub_sec = stub_sec->next) if ((stub_sec->flags & SEC_LINKER_CREATED) == 0 - && stub_sec->rawsize != stub_sec->size) + && stub_sec->rawsize != stub_sec->size + && (htab->stub_iteration <= STUB_SHRINK_ITER + || stub_sec->rawsize < stub_sec->size)) break; - /* Exit from this loop when no stubs have been added, and no stubs - have changed size. */ if (stub_sec == NULL && (htab->glink_eh_frame == NULL || htab->glink_eh_frame->rawsize == htab->glink_eh_frame->size)) @@ -12893,9 +12907,6 @@ stub_sec->contents = bfd_zalloc (htab->params->stub_bfd, stub_sec->size); if (stub_sec->contents == NULL) return FALSE; - /* We want to check that built size is the same as calculated - size. rawsize is a convenient location to use. */ - stub_sec->rawsize = stub_sec->size; stub_sec->size = 0; } @@ -13084,7 +13095,9 @@ if ((stub_sec->flags & SEC_LINKER_CREATED) == 0) { stub_sec_count += 1; - if (stub_sec->rawsize != stub_sec->size) + if (stub_sec->rawsize != stub_sec->size + && (htab->stub_iteration <= STUB_SHRINK_ITER + || stub_sec->rawsize < stub_sec->size)) break; } diff --git a/binutils/bfd/elf64-x86-64.c b/binutils/bfd/elf64-x86-64.c index 63957bb..7261405 100644 --- a/binutils/bfd/elf64-x86-64.c +++ b/binutils/bfd/elf64-x86-64.c @@ -2029,7 +2029,8 @@ && (sec->flags & SEC_ALLOC) != 0 && (! IS_X86_64_PCREL_TYPE (r_type) || (h != NULL - && (! SYMBOLIC_BIND (info, h) + && (! (bfd_link_pie (info) + || SYMBOLIC_BIND (info, h)) || h->root.type == bfd_link_hash_defweak || !h->def_regular)))) || (ELIMINATE_COPY_RELOCS @@ -2723,12 +2724,14 @@ } else { + eh->plt_got.offset = (bfd_vma) -1; h->plt.offset = (bfd_vma) -1; h->needs_plt = 0; } } else { + eh->plt_got.offset = (bfd_vma) -1; h->plt.offset = (bfd_vma) -1; h->needs_plt = 0; } @@ -3151,6 +3154,11 @@ continue; } + /* Don't convert GOTPCREL relocation against large section. */ + if (elf_section_data (tsec) != NULL + && (elf_section_flags (tsec) & SHF_X86_64_LARGE) != 0) + continue; + if (tsec->sec_info_type == SEC_INFO_TYPE_MERGE) { /* At this stage in linking, no SEC_MERGE symbol has been @@ -3190,35 +3198,46 @@ } else { - asection *asect; - bfd_size_type size; + bfd_signed_vma distance; /* At this point, we don't know the load addresses of TSEC section nor SEC section. We estimate the distrance between - SEC and TSEC. */ - size = 0; - for (asect = sec->output_section; - asect != NULL && asect != tsec->output_section; - asect = asect->next) + SEC and TSEC. We store the estimated distances in the + compressed_size field of the output section, which is only + used to decompress the compressed input section. */ + if (sec->output_section->compressed_size == 0) { - asection *i; - for (i = asect->output_section->map_head.s; - i != NULL; - i = i->map_head.s) - { - size = align_power (size, i->alignment_power); - size += i->size; - } + asection *asect; + bfd_size_type size = 0; + for (asect = link_info->output_bfd->sections; + asect != NULL; + asect = asect->next) + /* Skip debug sections since compressed_size is used to + compress debug sections. */ + if ((asect->flags & SEC_DEBUGGING) == 0) + { + asection *i; + for (i = asect->map_head.s; + i != NULL; + i = i->map_head.s) + { + size = align_power (size, i->alignment_power); + size += i->size; + } + asect->compressed_size = size; + } } /* Don't convert GOTPCREL relocations if TSEC isn't placed after SEC. */ - if (asect == NULL) + distance = (tsec->output_section->compressed_size + - sec->output_section->compressed_size); + if (distance < 0) continue; /* Take PT_GNU_RELRO segment into account by adding maxpagesize. */ - if ((toff + size + maxpagesize - roff + 0x80000000) + if ((toff + distance + maxpagesize - roff + 0x80000000) > 0xffffffff) continue; } @@ -4631,8 +4650,8 @@ else if (h != NULL && h->dynindx != -1 && (IS_X86_64_PCREL_TYPE (r_type) - || ! bfd_link_pic (info) - || ! SYMBOLIC_BIND (info, h) + || !(bfd_link_executable (info) + || SYMBOLIC_BIND (info, h)) || ! h->def_regular)) { outrel.r_info = htab->r_info (h->dynindx, r_type); @@ -5728,19 +5747,23 @@ bfd *abfd = info->output_bfd; const struct elf_backend_data *bed = get_elf_backend_data (abfd); struct elf_x86_64_link_hash_table *htab = elf_x86_64_hash_table (info); - unsigned long r_symndx = htab->r_sym (rela->r_info); - Elf_Internal_Sym sym; - - if (htab->elf.dynsym == NULL - || !bed->s->swap_symbol_in (abfd, - (htab->elf.dynsym->contents - + r_symndx * bed->s->sizeof_sym), - 0, &sym)) - abort (); + + if (htab->elf.dynsym != NULL + && htab->elf.dynsym->contents != NULL) + { + /* Check relocation against STT_GNU_IFUNC symbol if there are + dynamic symbols. */ + unsigned long r_symndx = htab->r_sym (rela->r_info); + Elf_Internal_Sym sym; + if (!bed->s->swap_symbol_in (abfd, + (htab->elf.dynsym->contents + + r_symndx * bed->s->sizeof_sym), + 0, &sym)) + abort (); - /* Check relocation against STT_GNU_IFUNC symbol. */ - if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) - return reloc_class_ifunc; + if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) + return reloc_class_ifunc; + } switch ((int) ELF32_R_TYPE (rela->r_info)) { diff --git a/binutils/bfd/elflink.c b/binutils/bfd/elflink.c index 3d37bb4..4e7de0c 100644 --- a/binutils/bfd/elflink.c +++ b/binutils/bfd/elflink.c @@ -555,6 +555,19 @@ if (h == NULL) return provide; + if (h->versioned == unknown) + { + /* Set versioned if symbol version is unknown. */ + char *version = strrchr (name, ELF_VER_CHR); + if (version) + { + if (version > name && version[-1] != ELF_VER_CHR) + h->versioned = versioned_hidden; + else + h->versioned = versioned; + } + } + switch (h->root.type) { case bfd_link_hash_defined: @@ -1171,21 +1184,20 @@ oldfunc = (h->type != STT_NOTYPE && bed->is_function_type (h->type)); - /* When we try to create a default indirect symbol from the dynamic - definition with the default version, we skip it if its type and - the type of existing regular definition mismatch. */ + /* If creating a default indirect symbol ("foo" or "foo@") from a + dynamic versioned definition ("foo@@") skip doing so if there is + an existing regular definition with a different type. We don't + want, for example, a "time" variable in the executable overriding + a "time" function in a shared library. */ if (pold_alignment == NULL && newdyn && newdef && !olddyn - && (((olddef || h->root.type == bfd_link_hash_common) - && ELF_ST_TYPE (sym->st_info) != h->type - && ELF_ST_TYPE (sym->st_info) != STT_NOTYPE - && h->type != STT_NOTYPE - && !(newfunc && oldfunc)) - || (olddef - && ((h->type == STT_GNU_IFUNC) - != (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC))))) + && (olddef || h->root.type == bfd_link_hash_common) + && ELF_ST_TYPE (sym->st_info) != h->type + && ELF_ST_TYPE (sym->st_info) != STT_NOTYPE + && h->type != STT_NOTYPE + && !(newfunc && oldfunc)) { *skip = TRUE; return TRUE; @@ -1472,13 +1484,16 @@ represent variables; this can cause confusion in principle, but any such confusion would seem to indicate an erroneous program or shared library. We also permit a common symbol in a regular - object to override a weak symbol in a shared object. */ + object to override a weak symbol in a shared object. A common + symbol in executable also overrides a symbol in a shared object. */ if (newdyn && newdef && (olddef || (h->root.type == bfd_link_hash_common - && (newweak || newfunc)))) + && (newweak + || newfunc + || (!olddyn && bfd_link_executable (info)))))) { *override = TRUE; newdef = FALSE; @@ -1749,6 +1764,31 @@ if (skip) goto nondefault; + + if (hi->def_regular) + { + /* If the undecorated symbol will have a version added by a + script different to H, then don't indirect to/from the + undecorated symbol. This isn't ideal because we may not yet + have seen symbol versions, if given by a script on the + command line rather than via --version-script. */ + if (hi->verinfo.vertree == NULL && info->version_info != NULL) + { + bfd_boolean hide; + + hi->verinfo.vertree + = bfd_find_version_for_sym (info->version_info, + hi->root.root.string, &hide); + if (hi->verinfo.vertree != NULL && hide) + { + (*bed->elf_backend_hide_symbol) (info, hi, TRUE); + goto nondefault; + } + } + if (hi->verinfo.vertree != NULL + && strcmp (p + 1 + (p[1] == '@'), hi->verinfo.vertree->name) != 0) + goto nondefault; + } if (! override) { @@ -3481,8 +3521,7 @@ void *old_ent; struct bfd_link_hash_entry *old_undefs = NULL; struct bfd_link_hash_entry *old_undefs_tail = NULL; - long old_dynsymcount = 0; - bfd_size_type old_dynstr_size = 0; + void *old_strtab = NULL; size_t tabsize = 0; asection *s; bfd_boolean just_syms; @@ -3923,8 +3962,9 @@ old_table = htab->root.table.table; old_size = htab->root.table.size; old_count = htab->root.table.count; - old_dynsymcount = htab->dynsymcount; - old_dynstr_size = _bfd_elf_strtab_size (htab->dynstr); + old_strtab = _bfd_elf_strtab_save (htab->dynstr); + if (old_strtab == NULL) + goto error_free_vers; for (i = 0; i < htab->root.table.size; i++) { @@ -4562,8 +4602,10 @@ break; } - /* Don't add DT_NEEDED for references from the dummy bfd. */ + /* Don't add DT_NEEDED for references from the dummy bfd nor + for unmatched symbol. */ if (!add_needed + && matched && definition && ((dynsym && h->ref_regular_nonweak @@ -4633,7 +4675,9 @@ memcpy (htab->root.table.table, old_tab, tabsize); htab->root.undefs = old_undefs; htab->root.undefs_tail = old_undefs_tail; - _bfd_elf_strtab_restore_size (htab->dynstr, old_dynstr_size); + _bfd_elf_strtab_restore (htab->dynstr, old_strtab); + free (old_strtab); + old_strtab = NULL; for (i = 0; i < htab->root.table.size; i++) { struct bfd_hash_entry *p; @@ -4646,9 +4690,6 @@ h = (struct elf_link_hash_entry *) p; if (h->root.type == bfd_link_hash_warning) h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (h->dynindx >= old_dynsymcount - && h->dynstr_index < old_dynstr_size) - _bfd_elf_strtab_delref (htab->dynstr, h->dynstr_index); /* Preserve the maximum alignment and size for common symbols even if this dynamic lib isn't on DT_NEEDED @@ -5018,6 +5059,8 @@ error_free_vers: if (old_tab != NULL) free (old_tab); + if (old_strtab != NULL) + free (old_strtab); if (nondeflt_vers != NULL) free (nondeflt_vers); if (extversym != NULL) diff --git a/binutils/bfd/elfnn-aarch64.c b/binutils/bfd/elfnn-aarch64.c index 59c51cc..d83dc1b 100644 --- a/binutils/bfd/elfnn-aarch64.c +++ b/binutils/bfd/elfnn-aarch64.c @@ -2655,7 +2655,7 @@ bfd_boolean via_plt_p; if (st_type != STT_FUNC - && (sym_sec != bfd_abs_section_ptr)) + && (sym_sec == input_sec)) return stub_type; globals = elf_aarch64_hash_table (info); @@ -4174,7 +4174,7 @@ goto error_ret_free_internal; } - stub_entry->target_value = sym_value; + stub_entry->target_value = sym_value + irela->r_addend; stub_entry->target_section = sym_sec; stub_entry->stub_type = stub_type; stub_entry->h = hash; @@ -5280,15 +5280,28 @@ /* Check if a stub has to be inserted because the destination is too far away. */ struct elf_aarch64_stub_hash_entry *stub_entry = NULL; - if (! aarch64_valid_branch_p (value, place)) + + /* If the branch destination is directed to plt stub, "value" will be + the final destination, otherwise we should plus signed_addend, it may + contain non-zero value, for example call to local function symbol + which are turned into "sec_sym + sec_off", and sec_off is kept in + signed_addend. */ + if (! aarch64_valid_branch_p (via_plt_p ? value : value + signed_addend, + place)) /* The target is out of reach, so redirect the branch to the local stub for this function. */ stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec, h, rel, globals); if (stub_entry != NULL) - value = (stub_entry->stub_offset - + stub_entry->stub_sec->output_offset - + stub_entry->stub_sec->output_section->vma); + { + value = (stub_entry->stub_offset + + stub_entry->stub_sec->output_offset + + stub_entry->stub_sec->output_section->vma); + + /* We have redirected the destination to stub entry address, + so ignore any addend record in the original rela entry. */ + signed_addend = 0; + } } value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value, signed_addend, weak_undef_p); diff --git a/binutils/bfd/version.h b/binutils/bfd/version.h index ed51cc9..4806c47 100644 --- a/binutils/bfd/version.h +++ b/binutils/bfd/version.h @@ -1,4 +1,4 @@ -#define BFD_VERSION_DATE 20160125 +#define BFD_VERSION_DATE 20160629 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ #define REPORT_BUGS_TO @report_bugs_to@ diff --git a/binutils/bfd/version.m4 b/binutils/bfd/version.m4 index 9fb81c5..42fca3d 100644 --- a/binutils/bfd/version.m4 +++ b/binutils/bfd/version.m4 @@ -1,1 +1,1 @@ -m4_define([BFD_VERSION], [2.26]) +m4_define([BFD_VERSION], [2.26.1]) diff --git a/binutils/binutils/ChangeLog b/binutils/binutils/ChangeLog index 2250b30..9c26fe9 100644 --- a/binutils/binutils/ChangeLog +++ b/binutils/binutils/ChangeLog @@ -1,3 +1,48 @@ +2016-06-29 Tristan Gingold + + * configure: Regenerate. + +2016-06-28 Alan Modra + + PR 20304 + * objdump.c (objdump_print_symname): Don't attempt to retrieve + version info from synthetic symbols. + +2016-06-13 Alan Modra + + * objcopy.c (copy_main): Init newsym->othersym. + +2016-03-14 H.J. Lu + + Backport from master + 2016-01-28 H.J. Lu + + PR binutils/19523 + * Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to + runtest. + * Makefile.in: Regenerated. + * testsuite/binutils-all/compress.exp (test_gnu_debuglink): New + proc. + Run test_gnu_debuglink for native ELF build. + +2016-03-09 Nick Clifton + + PR binutils/19775 + * testsuite/binutils-all/ar.exp (proc empty_archive): New proc. + Run the new proc. + * testsuite/binutils-all/empty: New, empty, file. + +2016-02-12 H.J. Lu + + Backport from master + 2016-02-12 H.J. Lu + + * doc/binutils.texi: Fix a typo. + +2016-01-25 Tristan Gingold + + * configure: Regenerate. + 2016-01-25 Tristan Gingold * configure: Regenerate. @@ -238,12 +283,12 @@ 2015-07-10 H.J. Lu - PR binutils/18656 - * objcopy.c (setup_section): Call bfd_convert_section_size - to get the output section size. - (copy_section): Get the section size from the output section - and call bfd_get_full_section_contents to convert section - contents for output. + PR binutils/18656 + * objcopy.c (setup_section): Call bfd_convert_section_size + to get the output section size. + (copy_section): Get the section size from the output section + and call bfd_get_full_section_contents to convert section + contents for output. 2015-07-10 H.J. Lu diff --git a/binutils/binutils/Makefile.am b/binutils/binutils/Makefile.am index 1735022..4f618ce 100644 --- a/binutils/binutils/Makefile.am +++ b/binutils/binutils/Makefile.am @@ -192,6 +192,7 @@ EXPECT=$(EXPECT); export EXPECT; \ runtest=$(RUNTEST); \ if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ + CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \ CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \ $$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \ $(RUNTESTFLAGS); \ diff --git a/binutils/binutils/Makefile.in b/binutils/binutils/Makefile.in index 5642925..eddd617 100644 --- a/binutils/binutils/Makefile.in +++ b/binutils/binutils/Makefile.in @@ -1290,6 +1290,7 @@ EXPECT=$(EXPECT); export EXPECT; \ runtest=$(RUNTEST); \ if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ + CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \ CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \ $$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \ $(RUNTESTFLAGS); \ diff --git a/binutils/binutils/configure b/binutils/binutils/configure index 6e1f21e..53cb411 100755 --- a/binutils/binutils/configure +++ b/binutils/binutils/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for binutils 2.26. +# Generated by GNU Autoconf 2.64 for binutils 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='binutils' PACKAGE_TARNAME='binutils' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='binutils 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='binutils 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1335,7 +1335,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures binutils 2.26 to adapt to many kinds of systems. +\`configure' configures binutils 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1406,7 +1406,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of binutils 2.26:";; + short | recursive ) echo "Configuration of binutils 2.26.1:";; esac cat <<\_ACEOF @@ -1527,7 +1527,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -binutils configure 2.26 +binutils configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -2169,7 +2169,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by binutils $as_me 2.26, which was +It was created by binutils $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -3977,7 +3977,7 @@ # Define the identity of the package. PACKAGE='binutils' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -15142,7 +15142,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by binutils $as_me 2.26, which was +This file was extended by binutils $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -15206,7 +15206,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -binutils config.status 2.26 +binutils config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/binutils/objcopy.c b/binutils/binutils/objcopy.c index 4a9f043..7feddb4 100644 --- a/binutils/binutils/objcopy.c +++ b/binutils/binutils/objcopy.c @@ -4096,6 +4096,7 @@ } t = strchr (t + 1, ','); + newsym->othersym = NULL; if (t) newsym->flags = parse_symflags (t+1, &newsym->othersym); else diff --git a/binutils/binutils/objdump.c b/binutils/binutils/objdump.c index ba9cd7c..c85b023 100644 --- a/binutils/binutils/objdump.c +++ b/binutils/binutils/objdump.c @@ -809,7 +809,8 @@ name = alloc; } - version_string = bfd_get_symbol_version_string (abfd, sym, &hidden); + if ((sym->flags & BSF_SYNTHETIC) == 0) + version_string = bfd_get_symbol_version_string (abfd, sym, &hidden); if (bfd_is_und_section (bfd_get_section (sym))) hidden = TRUE; diff --git a/binutils/elfcpp/ChangeLog b/binutils/elfcpp/ChangeLog index 0f54787..f95130a 100644 --- a/binutils/elfcpp/ChangeLog +++ b/binutils/elfcpp/ChangeLog @@ -339,11 +339,11 @@ 2009-10-16 Doug Kwan - * elfcpp/elfcpp.h (DT_PREINIT_ARRAY): Correct enum value. + * elfcpp.h (DT_PREINIT_ARRAY): Correct enum value. 2009-10-09 Andrew Pinski - * elfcpp/elfcpp_file.h (Elf_file::section_name): Change shstr_size + * elfcpp_file.h (Elf_file::section_name): Change shstr_size to Elf_WXword. 2009-10-09 Mikolaj Zalewski diff --git a/binutils/gas/ChangeLog b/binutils/gas/ChangeLog index 534a954..0c55403 100644 --- a/binutils/gas/ChangeLog +++ b/binutils/gas/ChangeLog @@ -1,3 +1,191 @@ +2016-06-29 Tristan Gingold + + * configure: Regenerate. + +2016-06-29 Maciej W. Rozycki + + Backport from master + 2016-04-22 Maciej W. Rozycki + + * config/tc-mips.c (code_option_type): New enum. + (parse_code_option): Return status indicating option type. + (s_mipsset): Update `parse_code_option' call site accordingly. + Always set register sizes from the ISA with ISA overrides. + (s_module): Update `parse_code_option' call site. + * testsuite/gas/mips/isa-override-1.d: New test. + * testsuite/gas/mips/micromips@isa-override-1.d: New test. + * testsuite/gas/mips/mips1@isa-override-1.d: New test. + * testsuite/gas/mips/mips2@isa-override-1.d: New test. + * testsuite/gas/mips/mips32@isa-override-1.d: New test. + * testsuite/gas/mips/mips32r2@isa-override-1.d: New test. + * testsuite/gas/mips/mips32r3@isa-override-1.d: New test. + * testsuite/gas/mips/mips32r5@isa-override-1.d: New test. + * testsuite/gas/mips/mips32r6@isa-override-1.d: New test. + * testsuite/gas/mips/mips64r2@isa-override-1.d: New test. + * testsuite/gas/mips/mips64r3@isa-override-1.d: New test. + * testsuite/gas/mips/mips64r5@isa-override-1.d: New test. + * testsuite/gas/mips/mips64r6@isa-override-1.d: New test. + * testsuite/gas/mips/r3000@isa-override-1.d: New test. + * testsuite/gas/mips/r3900@isa-override-1.d: New test. + * testsuite/gas/mips/r5900@isa-override-1.d: New test. + * testsuite/gas/mips/octeon@isa-override-1.d: New test. + * testsuite/gas/mips/octeon3@isa-override-1.d: New test. + * testsuite/gas/mips/isa-override-2.l: New list test. + * testsuite/gas/mips/mips1@isa-override-2.l: New list test. + * testsuite/gas/mips/mips2@isa-override-2.l: New list test. + * testsuite/gas/mips/mips32@isa-override-2.l: New list test. + * testsuite/gas/mips/mips32r2@isa-override-2.l: New list test. + * testsuite/gas/mips/mips32r3@isa-override-2.l: New list test. + * testsuite/gas/mips/mips32r5@isa-override-2.l: New list test. + * testsuite/gas/mips/mips32r6@isa-override-2.l: New list test. + * testsuite/gas/mips/r3000@isa-override-2.l: New list test. + * testsuite/gas/mips/r3900@isa-override-2.l: New list test. + * testsuite/gas/mips/octeon3@isa-override-2.l: New list test. + * testsuite/gas/mips/octeon3@isa-override-1.l: New stderr + output. + * testsuite/gas/mips/isa-override-1.s: New test source. + * testsuite/gas/mips/r5900@isa-override-1.s: New test source. + * testsuite/gas/mips/isa-override-2.s: New test source. + * testsuite/gas/mips/mips1@isa-override-2.s: New test source. + * testsuite/gas/mips/mips2@isa-override-2.s: New test source. + * testsuite/gas/mips/mips32@isa-override-2.s: New test source. + * testsuite/gas/mips/mips32r2@isa-override-2.s: New test source. + * testsuite/gas/mips/mips32r3@isa-override-2.s: New test source. + * testsuite/gas/mips/mips32r5@isa-override-2.s: New test source. + * testsuite/gas/mips/mips32r6@isa-override-2.s: New test source. + * testsuite/gas/mips/r3000@isa-override-2.s: New test source. + * testsuite/gas/mips/r3900@isa-override-2.s: New test source. + * testsuite/gas/mips/octeon3@isa-override-2.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2016-06-29 Maciej W. Rozycki + + Backport from master + 2016-06-29 Maciej W. Rozycki + + * write.c: Remove "libbfd.h" inclusion. + +2016-06-23 Peter Bergner + + Apply from master. + 2016-06-22 Peter Bergner + + * testsuite/gas/ppc/power9.d : New tests. + * testsuite/gas/ppc/power9.s: Likewise. + +2016-06-03 Peter Bergner + + Backport from master + 2016-06-03 Peter Bergner + + PR binutils/20196 + * gas/testsuite/gas/ppc/e6500.s : Add tests. + * gas/testsuite/gas/ppc/e6500.d: Likewise. + * gas/testsuite/gas/ppc/power8.s: Likewise. + * gas/testsuite/gas/ppc/power8.d: Likewise. + * gas/testsuite/gas/ppc/power4.s : Add tests. + * gas/testsuite/gas/ppc/power4.d: Likewise. + +2016-06-01 Peter Bergner + + Backport from master + 2016-05-26 Peter Bergner + + * testsuite/gas/ppc/altivec3.d : Add test. + * testsuite/gas/ppc/altivec3.s: Likewise. + * testsuite/gas/ppc/power9.d : Add tests. + * testsuite/gas/ppc/power9.s: Likewise. + +2016-05-11 Nick Clifton + + PR gas/20047 + * config/tc-arc.c (md_parse_option): Return 1 for recognised dummy + options. + +2016-04-15 H.J. Lu + + Backport from master + 2016-04-04 H.J. Lu + + PR gas/19909 + * config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding + only if i.disp_encoding != disp_encoding_32bit. + * gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32. + * gas/testsuite/gas/i386/x86-64-disp32.s: Likewise. + * gas/testsuite/gas/i386/disp32.d: Updated. + * gas/testsuite/gas/i386/x86-64-disp32.d: Likewise. + +2016-02-20 H.J. Lu + + Backport from master + 2016-02-20 H.J. Lu + + * config/tc-i386.c (register_number): Check RegVRex. + * testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd + with %zmm19 and %zmm3. + * testsuite/gas/i386/x86-64-avx512f-intel.d: Updated. + * testsuite/gas/i386/x86-64-avx512f.d: Likewise. + +2016-02-03 H.J. Lu + + Backport from master + 2016-02-03 H.J. Lu + + PR gas/19520 + * NEWS: Mention new command line option -mrelax-relocations and + new configure option --enable-x86-relax-relocations for x86 + target. + * config.in: Regenerated. + * configure.ac: Add --enable-x86-relax-relocations. + (ac_default_x86_relax_relocations): New. Default to 1 except + for x86 Solaris targets older than Solaris 12. + (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define. + * configure: Likewise. + * config/tc-i386.c (generate_relax_relocations): New. + (OPTION_MRELAX_RELOCATIONS): Likewise. + (output_disp): Don't generate relax relocations if + generate_relax_relocations is 0. + (md_longopts): Add -mrelax-relocations. + (md_show_usage): Likewise. + (md_parse_option): Handle OPTION_MRELAX_RELOCATIONS. + * doc/c-i386.texi: Document -mrelax-relocations=. + * testsuite/gas/i386/got-no-relax.d: New file. + * testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise. + * testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as. + * testsuite/gas/i386/localpic.d: Likewise. + * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise. + * testsuite/gas/i386/reloc32.d: Likewise. + * testsuite/gas/i386/x86-64-gotpcrel.d: Likewise. + * testsuite/gas/i386/x86-64-localpic.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. + * testsuite/gas/i386/i386.exp: Run got-no-relax and + x86-64-gotpcrel-no-relax. + +2016-02-03 H.J. Lu + + Backport from master + 2016-02-03 H.J. Lu + + * NEWS: Remove duplicated marker for 2.26. + +2016-01-29 H.J. Lu + + Backport from master + 2016-01-29 H.J. Lu + + PR gas/19532 + * configure.ac (compressed_debug_sections): Replace == with =. + * configure: Regenerated. + +2016-01-25 Tristan Gingold + + * configure: Regenerate. + 2016-01-25 Tristan Gingold * configure: Regenerate. @@ -8,12 +196,8 @@ 2015-12-17 Ramana Radhakrishnan - * gas/config/tc-arm.c (aeabi_set_public_attributes): Adjust + * config/tc-arm.c (aeabi_set_public_attributes): Adjust TAG_ARCH_profile for armv8-a. - * gas/testsuite/gas/arm/armv8a-automatic-hlt.d: New test. - * gas/testsuite/gas/arm/armv8a-automatic-hlt.s: New test. - * gas/testsuite/gas/arm/armv8a-automatic-lda.d: New test. - * gas/testsuite/gas/arm/armv8a-automatic-lda.s: New test. 2015-12-15 Nick Clifton @@ -320,10 +504,10 @@ 2015-10-07 Claudiu Zissulescu - * config/tc-arc.c: Revamped file for ARC support. - * config/tc-arc.h: Likewise. - * doc/as.texinfo: Add new ARC options. - * doc/c-arc.texi: Likewise. + * config/tc-arc.c: Revamped file for ARC support. + * config/tc-arc.h: Likewise. + * doc/as.texinfo: Add new ARC options. + * doc/c-arc.texi: Likewise. 2015-10-02 Renlin Li @@ -572,9 +756,9 @@ 2015-08-17 Alan Modra - * gas/config/tc-arm.c (s_align): Delete. + * config/tc-arm.c (s_align): Delete. (md_pseudo_table): Use s_align_ptwo for "align". - * gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define. + * config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define. * read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT. 2015-08-13 Alan Modra @@ -952,7 +1136,7 @@ 2015-06-11 John David Anglin PR gas/18427 - * gas/config/tc-hppa.c (last_label_symbol): Declare. + * config/tc-hppa.c (last_label_symbol): Declare. (pa_get_label): Return last label in current space/segment or NULL. (pa_define_label): Record last label and add to root. (pa_undefine_label): Remove last label from root. @@ -1028,7 +1212,6 @@ Bernd Schmidt Paul Brook - gas/ * config/tc-alpha.c (all_cfi_sections): Declare. (s_alpha_ent): Initialize all_cfi_sections. (alpha_elf_md_end): Invoke cfi_set_sections. @@ -1796,7 +1979,7 @@ 2015-01-12 Jan Beulich - * gas/dw2gencfi.c (cfi_add_label, dot_cfi_label): New. + * dw2gencfi.c (cfi_add_label, dot_cfi_label): New. (cfi_pseudo_table): Add "cfi_label". (output_cfi_insn): Handle CFI_label. (select_cie_for_fde): Als terminate CIE when encountering @@ -1809,7 +1992,7 @@ 2015-01-12 Jan Beulich - * gas/config/tc-arm.c (do_neon_shl_imm): Check immediate range. + * config/tc-arm.c (do_neon_shl_imm): Check immediate range. (do_neon_qshl_imm): Likewise. 2015-01-12 Alan Modra diff --git a/binutils/gas/NEWS b/binutils/gas/NEWS index 2cb2fab..e20a073 100644 --- a/binutils/gas/NEWS +++ b/binutils/gas/NEWS @@ -1,5 +1,12 @@ -*- text -*- +* Add a configure option --enable-x86-relax-relocations to decide whether + x86 assembler should generate relax relocations by default. Default to + yes, except for x86 Solaris targets older than Solaris 12. + +* New command line option -mrelax-relocations= for x86 target to control + whether to generate relax relocations. + Changes in 2.26: * Add a configure option --enable-compressed-debug-sections={all,gas} to @@ -7,8 +14,6 @@ * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove assembler support for Argonaut RISC architectures. - -Changes in 2.26: * Symbol and label names can now be enclosed in double quotes (") which allows them to contain characters that are not part of valid symbol names in high diff --git a/binutils/gas/config.in b/binutils/gas/config.in index 35c8202..8b040fc 100644 --- a/binutils/gas/config.in +++ b/binutils/gas/config.in @@ -39,6 +39,9 @@ /* Define if you want compressed debug sections by default. */ #undef DEFAULT_FLAG_COMPRESS_DEBUG +/* Define to 1 if you want to generate x86 relax relocations by default. */ +#undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS + /* Supported emulations. */ #undef EMULATIONS diff --git a/binutils/gas/configure b/binutils/gas/configure index f959e95..46ee87a 100755 --- a/binutils/gas/configure +++ b/binutils/gas/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for gas 2.26. +# Generated by GNU Autoconf 2.64 for gas 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='gas' PACKAGE_TARNAME='gas' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='gas 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='gas 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -765,6 +765,7 @@ enable_targets enable_checking enable_compressed_debug_sections +enable_x86_relax_relocations enable_werror enable_build_warnings enable_nls @@ -1323,7 +1324,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures gas 2.26 to adapt to many kinds of systems. +\`configure' configures gas 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1394,7 +1395,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of gas 2.26:";; + short | recursive ) echo "Configuration of gas 2.26.1:";; esac cat <<\_ACEOF @@ -1415,6 +1416,8 @@ --enable-checking enable run-time checks --enable-compressed-debug-sections={all,gas,none} compress debug sections by default] + --enable-x86-relax-relocations + generate x86 relax relocations by default --enable-werror treat compile warnings as errors --enable-build-warnings enable build-time compiler warnings --disable-nls do not use Native Language Support @@ -1510,7 +1513,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -gas configure 2.26 +gas configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -1920,7 +1923,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by gas $as_me 2.26, which was +It was created by gas $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -3728,7 +3731,7 @@ # Define the identity of the package. PACKAGE='gas' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -10972,7 +10975,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 10975 "configure" +#line 10978 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -11078,7 +11081,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11081 "configure" +#line 11084 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -11680,6 +11683,17 @@ esac fi +# PR gas/19520 +# Decide if x86 assembler should generate relax relocations. +ac_default_x86_relax_relocations=unset +# Provide a configure time option to override our default. +# Check whether --enable-x86_relax_relocations was given. +if test "${enable_x86_relax_relocations+set}" = set; then : + enableval=$enable_x86_relax_relocations; case "${enableval}" in + no) ac_default_x86_relax_relocations=0 ;; +esac +fi + using_cgen=no @@ -12082,7 +12096,18 @@ | i386-go32-rtems*) $as_echo "#define STRICTCOFF 1" >>confdefs.h + + ;; + i386-*-solaris2 \ + | x86_64-*-solaris2 \ + | i386-*-solaris2.[0-9] \ + | i386-*-solaris2.1[01] \ + | x86_64-*-solaris2.1[01]) + if test ${this_target} = $target \ + && test ${ac_default_x86_relax_relocations} = unset; then + ac_default_x86_relax_relocations=0 + fi ;; i860-*-*) @@ -12504,8 +12529,17 @@ emulations="$emulations $emulation" done + +if test ${ac_default_x86_relax_relocations} = unset; then + ac_default_x86_relax_relocations=1 +fi + +cat >>confdefs.h <<_ACEOF +#define DEFAULT_GENERATE_X86_RELAX_RELOCATIONS $ac_default_x86_relax_relocations +_ACEOF + -if test x$ac_default_compressed_debug_sections == xyes ; then +if test x$ac_default_compressed_debug_sections = xyes ; then $as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h @@ -15029,7 +15063,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by gas $as_me 2.26, which was +This file was extended by gas $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -15093,7 +15127,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -gas config.status 2.26 +gas config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/gas/configure.ac b/binutils/gas/configure.ac index 07f825d..0e22593 100644 --- a/binutils/gas/configure.ac +++ b/binutils/gas/configure.ac @@ -77,6 +77,17 @@ *) ac_default_compressed_debug_sections=unset ;; esac])dnl +# PR gas/19520 +# Decide if x86 assembler should generate relax relocations. +ac_default_x86_relax_relocations=unset +# Provide a configure time option to override our default. +AC_ARG_ENABLE(x86_relax_relocations, + AS_HELP_STRING([--enable-x86-relax-relocations], + [generate x86 relax relocations by default]), +[case "${enableval}" in + no) ac_default_x86_relax_relocations=0 ;; +esac])dnl + using_cgen=no AM_BINUTILS_WARNINGS @@ -166,6 +177,17 @@ | i386-*-go32* \ | i386-go32-rtems*) AC_DEFINE(STRICTCOFF, 1, [Using strict COFF?]) + ;; + + i386-*-solaris2 \ + | x86_64-*-solaris2 \ + | i386-*-solaris2.[[0-9]] \ + | i386-*-solaris2.1[[01]] \ + | x86_64-*-solaris2.1[[01]]) + if test ${this_target} = $target \ + && test ${ac_default_x86_relax_relocations} = unset; then + ac_default_x86_relax_relocations=0 + fi ;; i860-*-*) @@ -549,7 +571,14 @@ done -if test x$ac_default_compressed_debug_sections == xyes ; then +if test ${ac_default_x86_relax_relocations} = unset; then + ac_default_x86_relax_relocations=1 +fi +AC_DEFINE_UNQUOTED(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS, + $ac_default_x86_relax_relocations, + [Define to 1 if you want to generate x86 relax relocations by default.]) + +if test x$ac_default_compressed_debug_sections = xyes ; then AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.]) fi diff --git a/binutils/gas/write.c b/binutils/gas/write.c index a76813d..1ce8a8d 100644 --- a/binutils/gas/write.c +++ b/binutils/gas/write.c @@ -25,7 +25,6 @@ #include "obstack.h" #include "output-file.h" #include "dwarf2dbg.h" -#include "libbfd.h" #include "compress-debug.h" #ifndef TC_FORCE_RELOCATION diff --git a/binutils/gold/ChangeLog b/binutils/gold/ChangeLog index b283a88..ec8dacb 100644 --- a/binutils/gold/ChangeLog +++ b/binutils/gold/ChangeLog @@ -1,3 +1,11 @@ +2016-02-05 Sriraman Tallam + + PR gold/19047 + * icf.cc (get_rel_addend): New function. + (get_section_contents): Move merge section addend computation to a + new function. Ignore negative values for SHT_REL and SHT_RELA addends. + Fix bug to not read past the length of the section. + 2015-12-16 Roland McGrath PR ld/17473 @@ -33,7 +41,7 @@ 2015-11-11 Alan Modra Peter Bergner - * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. + * powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. @@ -339,7 +347,7 @@ 2015-07-26 Doug Kwan * testsuite/arm_unaligned_reloc.{s,sh}: Make test less sensitive to - disassembler output format. + disassembler output format. 2015-07-23 Ian Coolidge Plumb --pic-veneer option for gold. @@ -566,7 +574,7 @@ 2015-06-29 Doug Kwan * testsuite/arm_bl_out_of_range.s: Align stub table so that it appears - at address expected by test. + at address expected by test. * testsuite/arm_cortex_a8_b.s: Ditto. * testsuite/arm_cortex_a8_b_cond.s: Ditto. * testsuite/arm_cortex_a8_bl.s: Ditto. @@ -940,7 +948,6 @@ 2015-04-07 HC Yen Add AArch32 support for gold linker. - gold/ * arm.cc: Add V8 arch combine table. 2015-04-06 Rafael Ávila de Espíndola @@ -1455,7 +1462,6 @@ (Output_data_plt_arm::entry_count): Modified. (Output_data_plt_arm::address_for_global): New method. (Output_data_plt_arm::address_for_local): New method. -gold/ (Output_data_plt_arm::set_final_data_size): Add irelative_count_. (Output_data_plt_arm::insert_irelative_data): New method. (Output_data_plt_arm::irelative_rel_): New member. @@ -2490,7 +2496,7 @@ Add .gdb_index version 7 support. - * gold/dwarf_reader.cc: include (for make_pair). + * dwarf_reader.cc: include (for make_pair). (Dwarf_abbrev_table::do_read_abbrevs): Check for compressed debug sections. (Dwarf_ranges_table::read_ranges_table): Likewise. @@ -2501,21 +2507,21 @@ for end of list by offset, not by offset == 0. (Dwarf_info_reader::do_read_string_table): Check for compressed debug sections. - * gold/dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table): + * dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table): Initialize new data members. (Dwarf_pubnames_table::next_name): return flag_byte. (Dwarf_pubnames_table::end_of_table_): New data member. (Dwarf_pubnames_table::is_gnu_style_): New data member. - * gold/gdb-index.cc (gdb_index_version): Update to version 7. + * gdb-index.cc (gdb_index_version): Update to version 7. (Gdb_index_info_reader::read_pubtable): Read flag_byte. (Gdb_index_info_reader::read_pubnames_and_pubtypes): Don't read skeleton type unit DIEs. (Gdb_index::add_symbol): Add flag_byte; adjust all callers. (Gdb_index::do_write): Write flag_byte. - * gold/gdb-index.h (Gdb_index::add_symbol): Add flags parameter. + * gdb-index.h (Gdb_index::add_symbol): Add flags parameter. (Gdb_index::Cu_vector): Store flags along with cu indexes. - * gold/testsuite/gdb_index_test_3.sh: Allow versions 4-7. - * gold/testsuite/gdb_index_test_comm.sh: Likewise. + * testsuite/gdb_index_test_3.sh: Allow versions 4-7. + * testsuite/gdb_index_test_comm.sh: Likewise. 2014-01-08 H.J. Lu @@ -5554,15 +5560,15 @@ 2012-01-03 Cary Coutant - * gold/incremental.cc (Sized_incremental_binary::do_process_got_plt): + * incremental.cc (Sized_incremental_binary::do_process_got_plt): Use abstract base class for GOT. - * gold/output.h (class Output_data_got_base): New abstract base class. + * output.h (class Output_data_got_base): New abstract base class. (class Output_data_got): Derive from new base class, adjust ctors. (Output_data_got::reserve_slot): Make virtual; rename to do_reserve_slot; Adjust callers. - * gold/target.h (Sized_target::init_got_plt_for_update): Return + * target.h (Sized_target::init_got_plt_for_update): Return pointer to abstract base class. - * gold/x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise. + * x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise. 2011-12-18 Ian Lance Taylor @@ -6073,10 +6079,10 @@ 2011-08-01 Cary Coutant - * gold/testsuite/Makefile.am (justsyms_exec): New testcase. - * gold/testsuite/Makefile.in: Regenerate. - * gold/testsuite/justsyms_exec.c: New source file. - * gold/testsuite/justsyms_lib.c: New source file. + * testsuite/Makefile.am (justsyms_exec): New testcase. + * testsuite/Makefile.in: Regenerate. + * testsuite/justsyms_exec.c: New source file. + * testsuite/justsyms_lib.c: New source file. 2011-08-01 Cary Coutant @@ -6402,7 +6408,7 @@ 2011-07-06 Cary Coutant - * gold/incremental.cc + * incremental.cc (Output_section_incremental_inputs::write_info_blocks): Check for hidden and internal symbols. @@ -6943,9 +6949,9 @@ 2011-06-09 Cary Coutant PR gold/12804 - * gold/gold.cc (queue_initial_tasks): Warn if --incremental is + * gold.cc (queue_initial_tasks): Warn if --incremental is used with --compress-debug-sections. - * gold/object.cc (Sized_relobj_file::do_layout): Report + * object.cc (Sized_relobj_file::do_layout): Report uncompressed size of compressed input sections. 2011-06-08 Cary Coutant @@ -7073,10 +7079,10 @@ 2011-06-02 Cary Coutant PR gold/12163 - * gold/archive.cc (Archive::Archive): Initialize new data member. + * archive.cc (Archive::Archive): Initialize new data member. (Archive::include_all_members): Return if archive has already been included. - * gold/archive.h (Archive::include_all_members_): New data member. + * archive.h (Archive::include_all_members_): New data member. 2011-06-02 Nick Clifton @@ -7593,9 +7599,9 @@ 2011-04-14 Cary Coutant - * gold/layout.cc (Layout::symtab_section_offset): New function. - * gold/layout.h (Layout::symtab_section_offset): New function. - * gold/reloc.cc (Sized_relobj::do_relocate): Call it. + * layout.cc (Layout::symtab_section_offset): New function. + * layout.h (Layout::symtab_section_offset): New function. + * reloc.cc (Sized_relobj::do_relocate): Call it. 2011-04-12 Ian Lance Taylor @@ -8706,7 +8712,7 @@ 2010-10-17 Doug Kwan - * gold/arm.cc (Target_arm::got_section): Use correct order and set + * arm.cc (Target_arm::got_section): Use correct order and set GOT output section to be writable. 2010-10-14 Cary Coutant @@ -8858,7 +8864,7 @@ 2010-09-30 Doug Kwan - * gold/testsuite/arm_branch_out_of_range.sh: Fix broken tests. + * testsuite/arm_branch_out_of_range.sh: Fix broken tests. 2010-09-28 Sriraman Tallam @@ -8902,13 +8908,13 @@ 2010-09-15 Doug Kwan - * gold/testsuite/script_test_3.t: Add ARM special sections. - * gold/testsuite/script_test_4.t: Same. - * gold/testsuite/script_test_5.t: Same. - * gold/testsuite/script_test_6.t: Same. - * gold/testsuite/script_test_7.t: Same. - * gold/testsuite/script_test_7.t: Same. - * gold/testsuite/thumb_blx_out_of_range.s: Fix instruction alignment. + * testsuite/script_test_3.t: Add ARM special sections. + * testsuite/script_test_4.t: Same. + * testsuite/script_test_5.t: Same. + * testsuite/script_test_6.t: Same. + * testsuite/script_test_7.t: Same. + * testsuite/script_test_7.t: Same. + * testsuite/thumb_blx_out_of_range.s: Fix instruction alignment. 2010-09-14 Cary Coutant @@ -9041,7 +9047,7 @@ 2010-08-27 Doug Kwan - * gold/resolve.cc (Symbol_table::should_override): Let a weak + * resolve.cc (Symbol_table::should_override): Let a weak reference override an existing dynamic weak reference. * testsuite/Makefile.am: Add new test dyn_weak_ref. * testsuite/Makefile.in: Regenerate. @@ -9133,11 +9139,11 @@ 2010-08-19 Neil Vachharajani Cary Coutant - * gold/archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust + * archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust constructor, and set_blocker. - * gold/archive.cc (Add_lib_group_symbols::is_runnable): Also check + * archive.cc (Add_lib_group_symbols::is_runnable): Also check readsyms_blocker_. - * gold/readsyms.cc (Read_symbols::do_lib_group): Also pass + * readsyms.cc (Read_symbols::do_lib_group): Also pass this->this_blocker_ to Add_lib_group_symbols::set_blocker. * testsuite/Makefile.am (start_lib_test): New test case. * testsuite/Makefile.in: Regenerate. @@ -9740,9 +9746,9 @@ 2010-07-27 Jeffrey Yasskin * testsuite/debug_msg.sh: Test mixed weak/strong symbol behavior. - * gold/testsuite/debug_msg.cc: Likewise. - * gold/testsuite/odr_violation1.cc - * gold/testsuite/odr_violation2.cc + * testsuite/debug_msg.cc: Likewise. + * testsuite/odr_violation1.cc + * testsuite/odr_violation2.cc 2010-07-21 Cary Coutant @@ -10087,13 +10093,13 @@ 2010-05-26 Rafael Espindola PR 11604 - * gold/object.cc(Sized_relobj::do_layout_deferred_sections): Avoid + * object.cc(Sized_relobj::do_layout_deferred_sections): Avoid adding sections the garbage collector removed. - * gold/testsuite/Makefile.am: Add test. - * gold/testsuite/Makefile.in: Regenerate. - * gold/testsuite/plugin_test_7.sh: New. - * gold/testsuite/plugin_test_7_1.c: New. - * gold/testsuite/plugin_test_7_2.c: New. + * testsuite/Makefile.am: Add test. + * testsuite/Makefile.in: Regenerate. + * testsuite/plugin_test_7.sh: New. + * testsuite/plugin_test_7_1.c: New. + * testsuite/plugin_test_7_2.c: New. 2010-05-26 Rafael Espindola @@ -10577,7 +10583,7 @@ 2010-03-25 Doug Kwan - * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code + * arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code to avoid a conversion warning on a 32-bit host. 2010-03-24 Ian Lance Taylor @@ -10781,7 +10787,7 @@ 2010-03-08 Doug Kwan - * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage + * arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage due to a conversion warning. (Arm_relobj::update_output_local_symbol_count): Check for local symbol with unset output index. @@ -11403,7 +11409,7 @@ 2010-01-29 Viktor Kutuzov - * gold/arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8, + * arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8, R_ARM_THM_PC12, R_ARM_THM_ALU_PREL_11_0. (Arm_relocate_functions::thm_alu11): New Method. (Arm_relocate_functions::thm_pc8): New Method. @@ -11553,12 +11559,12 @@ 2010-01-22 Viktor Kutuzov - * gold/arm.cc (Target_arm): Updated fix_v4bx method and usage of + * arm.cc (Target_arm): Updated fix_v4bx method and usage of Fix_v4bx enum values . - * gold/options.h (General_options): New option definitions. + * options.h (General_options): New option definitions. (General_options::fix_v4bx): New method. (General_options::Fix_v4bx): New enum. - * gold/options.cc (General_options::parse_fix_v4bx): New method. + * options.cc (General_options::parse_fix_v4bx): New method. (General_options::parse_fix_v4bx_interworking): New method. 2010-01-22 Doug Kwan @@ -11618,7 +11624,7 @@ 2010-01-20 Viktor Kutuzov - * gold/arm.cc: Added support for R_ARM_V4BX relocation + * arm.cc: Added support for R_ARM_V4BX relocation (class Arm_v4bx_stub): New class. (DEF_STUBS): Updated definition to support v4_veneer_bx. (Stub_factory::make_arm_v4bx_stub): New method. @@ -12675,7 +12681,7 @@ attributes_section and attributes_vendor. * i386.cc (Target_i386::i386_info): Same. * object.cc (Sized_relobj::do_layout): Skip attribute section. - * gold/powerpc.cc (Target_powerpc::powerpc_info): Initialize new + * powerpc.cc (Target_powerpc::powerpc_info): Initialize new fields attributes_section and attributes_vendor. * sparc.cc (Target_sparc::sparc_info): Same. * target.h (Target::attributes_section, Target::attributes_vendor, @@ -13322,7 +13328,7 @@ (Segment_start_expression::value): New method definition. (script_exp_function_segment_start): Return a new Segment_start_expression. - * gold/script-c.h (script_saw_segment_start_expression): New function + * script-c.h (script_saw_segment_start_expression): New function prototype. * script-sections.cc (Script_sections::Script_sections): Initialize SAW_SEGMENT_START_EXPRESSION_ to false. @@ -14113,9 +14119,9 @@ (Script_sections::attach_sections_using_phdrs_clause): Do not modify segment list. (Script_sections::release_segments): New method definition. - * gold/script-sections.h (Script_sections::release_segments): New + * script-sections.h (Script_sections::release_segments): New method declaration. - * gold/target.h (Target::may_relax, Target::relax, + * target.h (Target::may_relax, Target::relax, Target::do_may_relax, Target::do_relax): New method definitions. 2009-09-17 Viktor Kutuzov @@ -14689,7 +14695,7 @@ 2009-06-03 Doug Kwan - * gold/arm.cc (namespace utils): New. + * arm.cc (namespace utils): New. (Target_arm::reloc_is_non_pic): Define new method. (class Arm_relocate_functions): New. (Target_arm::Relocate::relocate): Handle relocation types used by @@ -14701,7 +14707,7 @@ 2009-06-02 Doug Kwan - * gold/arm.cc (Target_arm::Scan::Scan): Initialize + * arm.cc (Target_arm::Scan::Scan): Initialize issued_non_pic_error_. (class Target_arm::Scan): Declare new method check_non_pic. Define new method symbol_needs_plt_entry. @@ -14722,7 +14728,7 @@ 2009-05-29 Doug Kwan - * gold/arm.cc (Output_data_plt_arm): Forward declaration for new + * arm.cc (Output_data_plt_arm): Forward declaration for new template class. (class Target_arm): Update comment. (Target_arm::Target_arm): Initialize new data members GOT_, diff --git a/binutils/gold/icf.cc b/binutils/gold/icf.cc index 96b7f2d..663d579 100644 --- a/binutils/gold/icf.cc +++ b/binutils/gold/icf.cc @@ -213,6 +213,45 @@ } } +// For SHF_MERGE sections that use REL relocations, the addend is stored in +// the text section at the relocation offset. Read the addend value given +// the pointer to the addend in the text section and the addend size. +// Update the addend value if a valid addend is found. +// Parameters: +// RELOC_ADDEND_PTR : Pointer to the addend in the text section. +// ADDEND_SIZE : The size of the addend. +// RELOC_ADDEND_VALUE : Pointer to the addend that is updated. + +inline void +get_rel_addend(const unsigned char* reloc_addend_ptr, + const unsigned int addend_size, + uint64_t* reloc_addend_value) +{ + switch (addend_size) + { + case 0: + break; + case 1: + *reloc_addend_value = + read_from_pointer<8>(reloc_addend_ptr); + break; + case 2: + *reloc_addend_value = + read_from_pointer<16>(reloc_addend_ptr); + break; + case 4: + *reloc_addend_value = + read_from_pointer<32>(reloc_addend_ptr); + break; + case 8: + *reloc_addend_value = + read_from_pointer<64>(reloc_addend_ptr); + break; + default: + gold_unreachable(); + } +} + // This returns the buffer containing the section's contents, both // text and relocs. Relocs are differentiated as those pointing to // sections that could be folded and those that cannot. Only relocs @@ -397,58 +436,36 @@ uint64_t entsize = (it_v->first)->section_entsize(it_v->second); long long offset = it_a->first; - - unsigned long long addend = it_a->second; - // Ignoring the addend when it is a negative value. See the - // comments in Merged_symbol_value::Value in object.h. - if (addend < 0xffffff00) - offset = offset + addend; - - // For SHT_REL relocation sections, the addend is stored in the - // text section at the relocation offset. - uint64_t reloc_addend_value = 0; + // Handle SHT_RELA and SHT_REL addends, only one of these + // addends exists. + // Get the SHT_RELA addend. For RELA relocations, we have + // the addend from the relocation. + uint64_t reloc_addend_value = it_a->second; + + // Handle SHT_REL addends. + // For REL relocations, we need to fetch the addend from the + // section contents. const unsigned char* reloc_addend_ptr = contents + static_cast(*it_o); - switch(*it_addend_size) - { - case 0: - { - break; - } - case 1: - { - reloc_addend_value = - read_from_pointer<8>(reloc_addend_ptr); - break; - } - case 2: - { - reloc_addend_value = - read_from_pointer<16>(reloc_addend_ptr); - break; - } - case 4: - { - reloc_addend_value = - read_from_pointer<32>(reloc_addend_ptr); - break; - } - case 8: - { - reloc_addend_value = - read_from_pointer<64>(reloc_addend_ptr); - break; - } - default: - gold_unreachable(); - } - offset = offset + reloc_addend_value; + + // Update the addend value with the SHT_REL addend if + // available. + get_rel_addend(reloc_addend_ptr, *it_addend_size, + &reloc_addend_value); + // Ignore the addend when it is a negative value. See the + // comments in Merged_symbol_value::value in object.h. + if (reloc_addend_value < 0xffffff00) + offset = offset + reloc_addend_value; + section_size_type secn_len; + const unsigned char* str_contents = (it_v->first)->section_contents(it_v->second, &secn_len, false) + offset; + gold_assert (offset < (long long) secn_len); + if ((secn_flags & elfcpp::SHF_STRINGS) != 0) { // String merge section. @@ -489,10 +506,14 @@ } else { - // Use the entsize to determine the length. - buffer.append(reinterpret_cast secn_len) + bufsize = secn_len - offset; + buffer.append(reinterpret_cast(str_contents), - entsize); + bufsize); } buffer.append("@"); } diff --git a/binutils/gprof/ChangeLog b/binutils/gprof/ChangeLog index 9fa2109..92fcc6f 100644 --- a/binutils/gprof/ChangeLog +++ b/binutils/gprof/ChangeLog @@ -1,3 +1,11 @@ +2016-06-29 Tristan Gingold + + * configure: Regenerate. + +2016-01-25 Tristan Gingold + + * configure: Regenerate. + 2016-01-25 Tristan Gingold * configure: Regenerate. diff --git a/binutils/gprof/configure b/binutils/gprof/configure index 8ea2c70..777ec3c 100755 --- a/binutils/gprof/configure +++ b/binutils/gprof/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for gprof 2.26. +# Generated by GNU Autoconf 2.64 for gprof 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='gprof' PACKAGE_TARNAME='gprof' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='gprof 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='gprof 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1299,7 +1299,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures gprof 2.26 to adapt to many kinds of systems. +\`configure' configures gprof 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1370,7 +1370,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of gprof 2.26:";; + short | recursive ) echo "Configuration of gprof 2.26.1:";; esac cat <<\_ACEOF @@ -1476,7 +1476,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -gprof configure 2.26 +gprof configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -1841,7 +1841,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by gprof $as_me 2.26, which was +It was created by gprof $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -3649,7 +3649,7 @@ # Define the identity of the package. PACKAGE='gprof' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -12706,7 +12706,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by gprof $as_me 2.26, which was +This file was extended by gprof $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -12770,7 +12770,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -gprof config.status 2.26 +gprof config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/include/ChangeLog b/binutils/include/ChangeLog index 01a25de..0ceba89 100644 --- a/binutils/include/ChangeLog +++ b/binutils/include/ChangeLog @@ -30,10 +30,6 @@ * dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New attributes. -2015-09-26 James Bowman - - * opcode/ft32.h: Add instruction macros FT32_*() - 2015-09-20 Rich Felker * bfdlink.h (struct bfd_link_info): Add "nointerp" field. @@ -55,7 +51,7 @@ 2015-08-18 H.J. Lu - * include/bfdlink.h (output_type): New enum. + * bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. @@ -70,10 +66,6 @@ 2015-08-11 Trevor Saunders * ansidecl.h (GCC_FINAL): New macro. - -2015-07-16 Jiong Wang - - * elf/aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration. 2015-07-14 H.J. Lu @@ -96,36 +88,19 @@ PR target/65261 * ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro. - -2015-07-09 Catherine Moore - - * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. - -2015-07-08 Pitchumani Sivanupandi - - * elf/avr.h: Add new 32 bit PC relative relocation. -2015-06-26 Matthew Fortune - - * elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro. - 2015-06-22 Nick Clifton * dis-asm.h (struct disassemble_info): Add stop_vma field. 2015-05-28 Catherine Moore - include/ * bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. 2015-05-22 Yunlian Jiang * libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is not defined. - -2015-05-12 Jiong Wang - - * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration. 2015-05-01 H.J. Lu @@ -160,11 +135,6 @@ PR ld/pr17709 * bfdlink.h (bfd_link_info): Add extern_protected_data. -2015-03-10 Matthew Wahab - - PR ld/16572 - * elf/arm.h (EF_ARM_HASENTRY): Remove. - 2015-02-19 Pedro Alves * floatformat.h [__cplusplus]: Wrap in extern "C". @@ -247,31 +217,14 @@ PR debug/63239 * dwarf2.def (DW_AT_GNU_deleted): New attribute. -2014-11-21 Terry Guo - - * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. - (FPU_VFP_V5D16): Likewise. - (FPU_VFP_V5_SP_D16): Likewise. - (FPU_ARCH_VFP_V5D16): Likewise. - (FPU_ARCH_VFP_V5_SP_D16): Likewise. - 2014-11-18 Igor Zamyatin * bfdlink.h (struct bfd_link_info): Add bndplt. - -2014-10-30 Andrew Pinski - * elf/mips.h (AFL_EXT_OCTEON3): Define. - INSN_OCTEON3, CPU_OCTEON3): Define. - 2014-10-28 Yury Gribov * libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes. - -2014-10-22 Matthew Fortune - * elf/mips.h (AFL_ASE_MASK): Define. - 2014-10-15 David Malcolm * libiberty.h (choose_tmpdir): New prototype. @@ -302,28 +255,6 @@ 2014-08-12 Alan Modra * bfdlink.h (struct bfd_link_info): Add lto_plugin_active. - -2014-07-29 Matthew Fortune - - * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. - (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. - (Val_GNU_MIPS_ABI_FP_64): Redefine. - (Val_GNU_MIPS_ABI_FP_XX): Define. - (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. - (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. - (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. - (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. - (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. - (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. - (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. - (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. - (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. - (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. - (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. - (AFL_EXT_LOONGSON_2F): Likewise. - (bfd_mips_elf_swap_abiflags_v0_in): Prototype. - (bfd_mips_elf_swap_abiflags_v0_out): Likewise. - (bfd_mips_isa_ext): Likewise. 2014-06-13 Alan Modra @@ -340,19 +271,11 @@ 2014-05-01 Steve Ellcey - * include/longlong.h: Import latest version from GCC tree. + * longlong.h: Import latest version from GCC tree. -2014-04-23 Andrew Bennett - - * opcode/mips.h (ASE_XPA): New define. - 2014-04-22 Christian Svensson * dis-asm.h: Remove openrisc and or32 support. Add support for or1k. - -2014-04-10 Senthil Kumar Selvaraj - - * elf/avr.h: Add new DIFF relocs. 2014-03-05 Alan Modra @@ -386,11 +309,6 @@ * longlong.h: New file. -2013-11-11 Catherine Moore - - * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... - (INSN_LOAD_MEMORY): ...this. - 2013-10-29 Marc Glisse PR tree-optimization/58689 @@ -400,10 +318,6 @@ (concat, reconcat, concat_copy2, choose_temp_base, xstrerror, xmalloc, xrealloc, xcalloc, xstrdup, xstrndup, xmemdup, pex_init): Mark with attribute returns_nonnull. - -2013-10-22 Sterling Augustine - - * gdb/gdb-index.h: Merge from gdb tree. 2013-10-10 Sean Keys @@ -423,53 +337,14 @@ 2013-08-02 Caroline Tice * vtv-change-permission.h: New file. - -2013-08-05 Eric Botcazou - Konrad Eisele - - * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON. - -2013-06-08 Catherine Moore - - * opcode/mips.h (mips_opcode): Add ase field. - (INSN_ASE_MASK): Delete. - (INSN_DSP): Rename to ASE_DSP. Provide new value. - (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value. - (INSN_MCU): Rename to ASE_MCU. Provide new value. - (INSN_MDMX): Rename to ASE_MDMX. Provide new value. - (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value. - (INSN_MT): Rename to ASE_MT. Provide new value. - (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value. - (INSN_VIRT): Rename to ASE_VIRT. Provide new value. - (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value. - (opcode_is_member): Add ase argument. Check ase. - -2013-05-06 Paul Brook - include/elf/ - * mips.h (R_MIPS_PC32): Update comment. - 2013-04-03 Jason Merrill Demangle C++11 ref-qualifier. * demangle.h (enum demangle_component_type): Add DEMANGLE_COMPONENT_REFERENCE_THIS, DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS. - -2013-03-12 Sebastian Huber - - * opcode/nios2.h: Edit comment. - -2013-03-11 Sebastian Huber - * opcode/nios2.h (OPX_WRPRS): New define. - (OP_MATCH_WRPRS): Likewise. - -2013-03-11 Sebastian Huber - - * opcode/nios2.h (OP_RDPRS): New define. - (OP_MATCH_RDPRS): Likewise. - 2013-03-01 Cary Coutant * dwarf2.h (enum dwarf_sect): New enum type. @@ -516,13 +391,7 @@ * fopen-bin.h: Likewise. * fopen-same.h: Likewise. * fopen-vms.h: Likewise. - * aout/hppa.h: Likewise. - * opcode/tahoe.h: Likewise. - -2012-12-11 Edgar E. Iglesias - * elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS - 2012-11-09 Jason Merrill * demangle.h (enum demangle_component_type): Add @@ -569,15 +438,7 @@ PR other/54411 * objalloc.h (objalloc_alloc): Do not use fast path on wraparound. - -2012-09-27 Anthony Green - - * opcode/moxie.h (MOXIE_BAD): New define. - -2012-09-12 Chris Schlumberger-Socha - * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. - 2012-09-06 Cary Coutant * dwarf2.def: Edit comment. @@ -591,30 +452,6 @@ (LDPT_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val. (tv_allow_unique_segment_for_sections): New member. (tv_unique_segment_for_sections): New member. - -2012-08-24 Matthew Gretton-Dann - - * opcode/arm.h (ARM_CPU_IS_ANY): New define. - -2012-08-24 Matthew Gretton-Dann - - * elf/arm.h (TAG_CPU_ARCH_V8): New define. - (MAX_TAG_CPU_ARCH): Update. - * opcode/arm.h (ARM_EXT_V8): New define. - (FPU_VFP_EXT_ARMV8): Likewise. - (FPU_NEON_EXT_ARMV8): Likewise. - (FPU_CRYPTO_EXT_ARMV8): Likewise. - (ARM_AEXT_V8A): Likewise. - (FPU_VFP_ARMV8): Likwise. - (FPU_NEON_ARMV8): Likewise. - (FPU_CRYPTO_ARMV8): Likewise. - (FPU_ARCH_VFP_ARMV8): Likewise. - (FPU_ARCH_NEON_VFP_ARMV8): Likewise. - (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. - (ARM_ARCH_V8A): Likwise. - (ARM_ARCH_V8A_FP): Likewise. - (ARM_ARCH_V8A_SIMD): Likewise. - (ARM_ARCH_V8A_CRYPTO): Likewise. 2012-08-13 Ian Bolton Laurent Desnogues @@ -631,10 +468,6 @@ (print_aarch64_disassembler_options): New declaration. (aarch64_symbol_is_valid): New declaration. -2012-08-02 Sean Keys - - * elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200 - 2012-07-24 Stephan McCamant Dr David Alan Gilbert @@ -645,16 +478,7 @@ * filenames.h: #include "hashtab.h". (filename_hash, filename_eq): Declare. - -2012-07-13 Andreas Krebbel - * elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc. - -2012-07-05 Sean Keys - - * opcode/xgate.h: Changed the format string for mode - XGATE_OP_DYA_MON. - 2012-06-18 Doug Evans * dwarf2.def (DW_OP): Add DW_OP_GNU_const_index. @@ -723,12 +547,7 @@ (get_DW_TAG_name, get_DW_AT_name, get_DW_FORM_name) (get_DW_OP_name, get_DW_ATE_name): Declare. * dwarf2.def: New file, from dwarf2.h. - -2012-04-12 David S. Miller - * elf/sparc.h (R_SPARC_WDISP10): New reloc. - * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10. - 2012-04-10 Tristan Gingold * splay-tree.h: Conditionnaly includes stdint.h and inttypes.h @@ -746,7 +565,7 @@ Add DWARF attribute value for the "Borland fastcall" calling convention. - * elf/dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant. + * dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant. 2012-01-31 H.J. Lu @@ -1048,15 +867,7 @@ 2010-10-06 Andi Kleen * libiberty.h (setproctitle): Add prototype. - -2010-09-29 Bernd Schmidt - - * opcode/tic6x-control-registers.h (tscl): Now read_write. - -2010-09-27 Andreas Krebbel - * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. - 2010-09-23 Matthew Gretton-Dann * arm.h (ARM_EXT_V6Z): Remove. @@ -1259,7 +1070,7 @@ 2009-10-15 Jakub Jelinek - * include/dwarf2.h (DW_LANG_Python): Add comment that it is + * dwarf2.h (DW_LANG_Python): Add comment that it is a DWARF 4 addition. 2009-10-14 Alan Modra @@ -1347,17 +1158,7 @@ * bfdlink.h (struct bfd_link_hash_common_entry): Move to top level. - -2009-09-04 Jie Zhang - * opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp. - (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define. - (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, - PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask): - Adjust accordingly. - (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and - PseudoDbg_Assert_grp_mask. - 2009-08-06 Michael Eager * dis-asm.h: Decl print_insn_microblaze(). @@ -1517,11 +1318,7 @@ * demangle.h (enum demangle_component_type): Add DEMANGLE_COMPONENT_PACK_EXPANSION. - -2008-09-24 Richard Henderson - * elf/dwarf2.h (DW_OP_GNU_encoded_addr): New. - 2008-09-22 Rafael Espindola * plugin-api.h (ld_plugin_status): Remove comma from the last item. @@ -1549,33 +1346,18 @@ 2008-08-17 Alan Modra * bfdlink.h (bfd_generic_link_read_symbols): Declare. - -2008-08-08 Anatoly Sokolov - * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, - E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. - (EF_AVR_MACH): Redefine to 0x7F. - * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. - (AVR_ISA_AVR3): Redefine. - (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, - AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, - AVR_ISA_AVR6): Define. - 2008-07-12 Jie Zhang Revert 2008-07-12 Jie Zhang * bfdlink.h (struct bfd_link_info): Add sep_code member variable. - * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. - (EF_BFIN_DATA_IN_L1): Define. 2008-07-12 Jie Zhang * bfdlink.h (struct bfd_link_info): Add sep_code member variable. - * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. - (EF_BFIN_DATA_IN_L1): Define. 2008-07-07 Stan Shebs @@ -1937,10 +1719,6 @@ 2005-06-20 Geoffrey Keating * libiberty.h (strverscmp): Prototype. - -2005-06-17 Jakub Jelinek - - * elf/external.h (GRP_ENTRY_SIZE): Define. 2005-06-08 Zack Weinberg diff --git a/binutils/ld/ChangeLog b/binutils/ld/ChangeLog index 75fd708..3c60c93 100644 --- a/binutils/ld/ChangeLog +++ b/binutils/ld/ChangeLog @@ -1,3 +1,454 @@ +2016-06-29 Tristan Gingold + + * configure: Regenerate. + +2016-06-14 Senthil Kumar Selvaraj + + Backport from master + 2016-06-14 Senthil Kumar Selvaraj + + PR ld/20254 + * testsuite/ld-avr/avr-prop-6.d: New test. + * testsuite/ld-avr/avr-prop-6.s: New test. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-13 H.J. Lu + + PR ld/20244 + * testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b, + pr20244-2c and pr20244-2d. + * testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b. + * testsuite/ld-i386/pr20244-2.s: New file. + * testsuite/ld-i386/pr20244-2a.d: Likewise. + * testsuite/ld-i386/pr20244-2b.d: Likewise. + * testsuite/ld-i386/pr20244-2c.d: Likewise. + * testsuite/ld-i386/pr20244-2d.d: Likewise. + * testsuite/ld-i386/pr20244-3a.c: Likewise. + * testsuite/ld-i386/pr20244-3b.S: Likewise. + * testsuite/ld-i386/pr20244-3c.S: Likewise. + * testsuite/ld-i386/pr20244-3d.S: Likewise. + + 2016-06-13 H.J. Lu + + * testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b. + * testsuite/ld-i386/ifunc-1a.c: New file. + * testsuite/ld-i386/ifunc-1b.S: Likewise. + * testsuite/ld-i386/ifunc-1c.S: Likewise. + * testsuite/ld-i386/ifunc-1d.S: Likewise. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-11 H.J. Lu + + PR ld/20244 + * testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b. + * testsuite/ld-i386/pr20244-1.s: New file. + * testsuite/ld-i386/pr20244-1a.d: Likewise. + * testsuite/ld-i386/pr20244-1b.d: Likewise. + * testsuite/ld-i386/pr20244-1c.d: Likewise. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-08 H.J. Lu + + * testsuite/ld-i386/libno-plt-1b.dd: New file. + * testsuite/ld-i386/libno-plt-1b.rd: Likewise. + * testsuite/ld-i386/no-plt-1a.dd: Likewise. + * testsuite/ld-i386/no-plt-1a.rd: Likewise. + * testsuite/ld-i386/no-plt-1b.dd: Likewise. + * testsuite/ld-i386/no-plt-1b.rd: Likewise. + * testsuite/ld-i386/no-plt-1c.dd: Likewise. + * testsuite/ld-i386/no-plt-1c.rd: Likewise. + * testsuite/ld-i386/no-plt-1d.dd: Likewise. + * testsuite/ld-i386/no-plt-1d.rd: Likewise. + * testsuite/ld-i386/no-plt-1e.dd: Likewise. + * testsuite/ld-i386/no-plt-1e.rd: Likewise. + * testsuite/ld-i386/no-plt-1f.dd: Likewise. + * testsuite/ld-i386/no-plt-1f.rd: Likewise. + * testsuite/ld-i386/no-plt-1g.dd: Likewise. + * testsuite/ld-i386/no-plt-1g.rd: Likewise. + * testsuite/ld-i386/no-plt-1h.dd: Likewise. + * testsuite/ld-i386/no-plt-1h.rd: Likewise. + * testsuite/ld-i386/no-plt-1i.dd: Likewise. + * testsuite/ld-i386/no-plt-1i.rd: Likewise. + * testsuite/ld-i386/no-plt-1j.dd: Likewise. + * testsuite/ld-i386/no-plt-1j.rd: Likewise. + * testsuite/ld-i386/no-plt-check1a.S: Likewise. + * testsuite/ld-i386/no-plt-check1b.S: Likewise. + * testsuite/ld-i386/no-plt-extern1a.S: Likewise. + * testsuite/ld-i386/no-plt-extern1b.S: Likewise. + * testsuite/ld-i386/no-plt-func1.c: Likewise. + * testsuite/ld-i386/no-plt-main1.c: Likewise. + * testsuite/ld-i386/no-plt.exp: Likewise. + * testsuite/ld-i386/pass.out Likewise. + +2016-06-14 H.J. Lu + + Backport from master + 2016-06-12 H.J. Lu + + * testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32. + * testsuite/ld-x86-64/libno-plt-1b.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1a.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1a.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1b.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1b.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1c.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1c.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1d.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1e.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1e.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1f.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1f.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1g.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1g.rd: Likewise. + + 2016-06-08 H.J. Lu + + * testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order. + * testsuite/ld-x86-64/no-plt-1b.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1c.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1d.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1e.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1f.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1g.rd: Likewise. + * testsuite/ld-x86-64/no-plt.exp: Fix a typo. + + 2016-06-08 H.J. Lu + + * testsuite/ld-x86-64/libno-plt-1b.dd: Likewise. + * testsuite/ld-x86-64/libno-plt-1b.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1a.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1a.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1b.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1b.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1c.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1c.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1d.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1d.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1e.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1e.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1f.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1f.rd: Likewise. + * testsuite/ld-x86-64/no-plt-1g.dd: Likewise. + * testsuite/ld-x86-64/no-plt-1g.rd: Likewise. + * testsuite/ld-x86-64/no-plt-check1.S: Likewise. + * testsuite/ld-x86-64/no-plt.exp: Likewise. + * testsuite/ld-x86-64/no-plt-extern1.S: Likewise. + * testsuite/ld-x86-64/no-plt-func1.c: Likewise. + * testsuite/ld-x86-64/no-plt-main1.c: Likewise. + * testsuite/ld-x86-64/pass.out Likewise. + +2016-06-13 Senthil Kumar Selvaraj + + Backport from master + 2016-06-08 Senthil Kumar Selvaraj + + PR ld/20221 + * testsuite/ld-avr/avr-prop-5.d: New. + * testsuite/ld-avr/avr-prop-5.s: New. + +2016-06-11 H.J. Lu + + Backport from master + 2016-04-13 H.J. Lu + + PR ld/19774 + * testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before + tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed + tests. + + 2016-03-07 H.J. Lu + + PR ld/19774 + * testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before + tmpdir/pr18900.so and test --as-needed. Link tmpdir/gotpc1.o + before tmpdir/got1d.so and test --as-needed. + * testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before + tmpdir/pr18900.so and test --as-needed. + + 2016-03-06 H.J. Lu + + * testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o + before tmpdir/copyreloc-lib.so and test --as-needed. + * testsuite/ld-x86-64/x86-64.exp: Likewise. + +2016-05-20 H.J. Lu + + Backport from master + 2016-05-19 H.J. Lu + + PR ld/20117 + * testsuite/ld-i386/i386.exp: Run pr20117. + * testsuite/ld-i386/pr20117.d: New file. + * testsuite/ld-i386/pr20117.s: Likewise. + +2016-05-18 Christophe Monat + + Backport from master + 2016-05-09 Christophe Monat + PR ld/20030 + * testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp + tests. Fix misnamed stm32l4xx-fix-all. + * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple + loads with DP registers. + * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file. + * testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment. + * testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple + loads with DP registers. + * testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference. + +2016-05-15 H.J. Lu + + Backport from master + 2016-05-13 H.J. Lu + + PR ld/20093 + * testsuite/ld-x86-64/pr20093-1.d: New file. + * testsuite/ld-x86-64/pr20093-1.s: Likewise. + * testsuite/ld-x86-64/pr20093-2.d: Likewise. + * testsuite/ld-x86-64/pr20093-2.s: Likewise. + * testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2. + +2016-05-11 Alan Modra + + PR 20060 + * testsuite/ld-powerpc/powerpc.exp: Run new tests. + * testsuite/ld-powerpc/tlsdll.s: New. + * testsuite/ld-powerpc/tlsdll.ver: New. + * testsuite/ld-powerpc/tlsdll_32.s: New. + * testsuite/ld-powerpc/tlsopt5.d: New. + * testsuite/ld-powerpc/tlsopt5.s: New. + * testsuite/ld-powerpc/tlsopt5_32.d: New. + * testsuite/ld-powerpc/tlsopt5_32.s: New. + +2016-04-30 H.J. Lu + + Backport from master + 2016-04-27 H.J. Lu + + PR ld/20006 + * testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New. + (visibility_run): Pass COMPRESS_LDFLAG to visibility_test on + ELF targets. + +2016-04-30 H.J. Lu + + Backport from master + 2016-04-27 H.J. Lu + + * testsuite/ld-elf/compressed1b.d: Only run for Linux/GNU targets. + + 2016-04-27 H.J. Lu + + * testsuite/ld-elf/compressed1b.d: Pass + --compress-debug-sections=none to ld. + * testsuite/ld-elf/compressed1c.d: Likewise. + +2016-04-04 H.J. Lu + + Backport from master + 2016-04-04 H.J. Lu + + PR ld/19827 + * testsuite/ld-i386/pr19827-nacl.rd: New file. + * testsuite/ld-x86-64/pr19827-nacl.rd: Likewise. + +2016-03-17 H.J. Lu + + Backport from master + 2016-03-15 H.J. Lu + + PR ld/19827 + * testsuite/ld-i386/i386.exp: Run PR ld/19827 tests. + * testsuite/ld-x86-64/x86-64.exp: Likewise. + * testsuite/ld-i386/pr19827.rd: New file. + * testsuite/ld-i386/pr19827a.S: Likewise. + * testsuite/ld-i386/pr19827b.S: Likewise. + * testsuite/ld-x86-64/pr19827.rd: Likewise. + * testsuite/ld-x86-64/pr19827a.S: Likewise. + * testsuite/ld-x86-64/pr19827b.S: Likewise. + +2016-03-15 H.J. Lu + + Backport from master + 2016-02-20 H.J. Lu + + * testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets. + + 2016-01-30 H.J. Lu + + PR ld/19539 + * testsuite/ld-elf/pr19539.d: New file. + * testsuite/ld-elf/pr19539.s: Likewise. + * testsuite/ld-elf/pr19539.t: Likewise. + +2016-03-14 H.J. Lu + + Backport from master + 2015-12-07 Jan Beulich + + * ld-elf/gabiend.rt: Accept any alignment. + * ld-elf/gabinormal.rt: Likewise. + +2016-03-09 H.J. Lu + + Backport from master + 2016-03-04 H.J. Lu + + PR ld/19579 + * testsuite/ld-elf/pr19579a.c: New file. + * testsuite/ld-elf/pr19579b.c: Likewise. + * testsuite/ld-elf/shared.exp: Run PR ld/19579 test. + +2016-03-04 H.J. Lu + + Backport from master + 2016-03-02 H.J. Lu + + PR ld/19739 + * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't + merge flags of other input sections for relocatable link. + * emultempl/mmo.em (mmo_place_orphan): Likewise. + * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise. + * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise. + +2016-03-01 H.J. Lu + + Backport from master + 2016-03-01 H.J. Lu + + * testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6. + +2016-02-26 H.J. Lu + + Backport from master + 2016-02-24 H.J. Lu + + PR ld/19698 + * testsuite/ld-elf/pr19698.d: New file. + * testsuite/ld-elf/pr19698.s: Likewise. + * testsuite/ld-elf/pr19698.t: Likewise. + +2016-02-26 H.J. Lu + + Backport from master + 2016-02-01 H.J. Lu + + PR ld/19553 + * testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553. + * testsuite/ld-elf/pr19553.map: New file. + * testsuite/ld-elf/pr19553.map: Likewise. + * testsuite/ld-elf/pr19553a.c: Likewise. + * testsuite/ld-elf/pr19553b.c: Likewise. + * testsuite/ld-elf/pr19553b.out: Likewise. + * testsuite/ld-elf/pr19553c.c: Likewise. + * testsuite/ld-elf/pr19553c.out: Likewise. + * testsuite/ld-elf/pr19553d.c: Likewise. + * testsuite/ld-elf/pr19553d.out: Likewise. + +2016-02-25 Jiong Wang + + Backport from master + 2016-01-20 Jiong Wang + + * testsuite/ld-aarch64/farcall-section.d: Delete. + * testsuite/ld-aarch64/farcall-section.s: Delete. + * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. + * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. + * testsuite/ld-aarch64/farcall-b-section.s: New testcase. + * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. + * testsuite/ld-aarch64/aarch64-elf.exp: Likewise. + +2016-02-11 H.J. Lu + + Backport from master + 2016-02-11 H.J. Lu + + PR ld/19615 + * ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for + PIE. + * lexsup.c (parse_args): Enable -Bsymbolic and + -Bsymbolic-functions for PIE. + * testsuite/ld-i386/i386.exp: Run pr19615. + * testsuite/ld-i386/pr19615.d: New file. + * testsuite/ld-i386/pr19615.s: Likewise. + * testsuite/ld-x86-64/pr19615.d: Likewise. + * testsuite/ld-x86-64/pr19615.s: Likewise. + +2016-02-03 H.J. Lu + + Backport from master + 2016-02-03 H.J. Lu + + PR gas/19520 + * testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as. + * testsuite/ld-i386/call1.d: Likewise. + * testsuite/ld-i386/call2.d: Likewise. + * testsuite/ld-i386/call3a.d: Likewise. + * testsuite/ld-i386/call3b.d: Likewise. + * testsuite/ld-i386/call3c.d: Likewise. + * testsuite/ld-i386/call3d.d: Likewise. + * testsuite/ld-i386/call3e.d: Likewise. + * testsuite/ld-i386/call3f.d: Likewise. + * testsuite/ld-i386/call3g.d: Likewise. + * testsuite/ld-i386/call3h.d: Likewise. + * testsuite/ld-i386/jmp1.d: Likewise. + * testsuite/ld-i386/jmp2.d: Likewise. + * testsuite/ld-i386/lea1c.d: Likewise. + * testsuite/ld-i386/load1.d: Likewise. + * testsuite/ld-i386/load2.d: Likewise. + * testsuite/ld-i386/load3.d: Likewise. + * testsuite/ld-i386/load4a.d: Likewise. + * testsuite/ld-i386/load5a.d: Likewise. + * testsuite/ld-i386/mov2b.d: Likewise. + * testsuite/ld-i386/mov3.d: Likewise. + * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. + * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. + * testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise. + * testsuite/ld-x86-64/call1a.d: Likewise. + * testsuite/ld-x86-64/call1b.d: Likewise. + * testsuite/ld-x86-64/call1c.d: Likewise. + * testsuite/ld-x86-64/call1d.d: Likewise. + * testsuite/ld-x86-64/call1e.d: Likewise. + * testsuite/ld-x86-64/call1f.d: Likewise. + * testsuite/ld-x86-64/call1h.d: Likewise. + * testsuite/ld-x86-64/call1i.d: Likewise. + * testsuite/ld-x86-64/load1a.d: Likewise. + * testsuite/ld-x86-64/load1b.d: Likewise. + * testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it. + * testsuite/ld-i386/got1.dd: Updated. + * testsuite/ld-i386/got1d.S (1): Removed. + * testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes. + * testsuite/ld-x86-64/x86-64.exp: Likewise. + +2016-02-02 H.J. Lu + + Backport from master + 2016-02-02 H.J. Lu + + PR ld/18591 + * testsuite/ld-x86-64/pr18591.d: New file. + * testsuite/ld-x86-64/pr18591.s: Likewise. + * testsuite/ld-x86-64/x86-64.exp: Run pr18591. + +2016-01-29 H.J. Lu + + Backport from master + 2016-01-29 H.J. Lu + + PR ld/19533 + * configure.ac (compressed_debug_sections): Replace == with =. + * configure: Regenerated. + +2016-01-25 Tristan Gingold + + * configure: Regenerate. + 2016-01-25 Tristan Gingold * configure: Regenerate. @@ -89,7 +540,7 @@ decide placement. 2015-10-27 Laurent Alfonsi - Christophe Monat + Christophe Monat * ld.texinfo: Add description of the STM32L4xx erratum workaround. @@ -129,7 +580,7 @@ 2015-10-22 H.J. Lu - * ld/ld.texinfo: Document "-z call-nop=PADDING" option. + * ld.texinfo: Document "-z call-nop=PADDING" option. * emulparams/call_nop.sh: New file. * emulparams/elf_i386_be.sh: Source ${srcdir}/emulparams/call_nop.sh. @@ -165,7 +616,7 @@ 2015-10-15 Simon Dardis - * ld/ldexp.c: (try_copy_symbol_flags): New. Factored out from... + * ldexp.c: (try_copy_symbol_flags): New. Factored out from... (exp_fold_tree_1): Here. Cope with ternary operator in assignments. Use new helper. @@ -308,7 +759,7 @@ 2015-09-09 James Bowman * scripttempl/ft32.sc: default linker script RAM and - FLASH size symbols + FLASH size symbols 2015-09-09 Nick Clifton @@ -359,58 +810,58 @@ 2015-08-18 H.J. Lu - * ld/ldctor.c: Replace shared, executable, relocatable and pie + * ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. - * ld/ldemul.c: Likewise. - * ld/ldfile.c: Likewise. - * ld/ldlang.c: Likewise. - * ld/ldmain.c: Likewise. - * ld/ldwrite.c: Likewise. - * ld/lexsup.c: Likewise. - * ld/pe-dll.c: Likewise. - * ld/plugin.c: Likewise. - * ld/emultempl/aarch64elf.em: Likewise. - * ld/emultempl/aix.em: Likewise. - * ld/emultempl/alphaelf.em: Likewise. - * ld/emultempl/armcoff.em: Likewise. - * ld/emultempl/armelf.em: Likewise. - * ld/emultempl/avrelf.em: Likewise. - * ld/emultempl/beos.em: Likewise. - * ld/emultempl/cr16elf.em: Likewise. - * ld/emultempl/elf-generic.em: Likewise. - * ld/emultempl/elf32.em: Likewise. - * ld/emultempl/genelf.em: Likewise. - * ld/emultempl/generic.em: Likewise. - * ld/emultempl/gld960.em: Likewise. - * ld/emultempl/gld960c.em: Likewise. - * ld/emultempl/hppaelf.em: Likewise. - * ld/emultempl/irix.em: Likewise. - * ld/emultempl/linux.em: Likewise. - * ld/emultempl/lnk960.em: Likewise. - * ld/emultempl/m68hc1xelf.em: Likewise. - * ld/emultempl/m68kcoff.em: Likewise. - * ld/emultempl/m68kelf.em: Likewise. - * ld/emultempl/metagelf.em: Likewise. - * ld/emultempl/mipself.em: Likewise. - * ld/emultempl/mmo.em: Likewise. - * ld/emultempl/msp430.em: Likewise. - * ld/emultempl/nds32elf.em: Likewise. - * ld/emultempl/needrelax.em: Likewise. - * ld/emultempl/nios2elf.em: Likewise. - * ld/emultempl/pe.em: Likewise. - * ld/emultempl/pep.em: Likewise. - * ld/emultempl/ppc32elf.em: Likewise. - * ld/emultempl/ppc64elf.em: Likewise. - * ld/emultempl/sh64elf.em: Likewise. - * ld/emultempl/solaris2.em: Likewise. - * ld/emultempl/spuelf.em: Likewise. - * ld/emultempl/sunos.em: Likewise. - * ld/emultempl/tic6xdsbt.em: Likewise. - * ld/emultempl/ticoff.em: Likewise. - * ld/emultempl/v850elf.em: Likewise. - * ld/emultempl/vms.em: Likewise. - * ld/emultempl/vxworks.em: Likewise. + * ldemul.c: Likewise. + * ldfile.c: Likewise. + * ldlang.c: Likewise. + * ldmain.c: Likewise. + * ldwrite.c: Likewise. + * lexsup.c: Likewise. + * pe-dll.c: Likewise. + * plugin.c: Likewise. + * emultempl/aarch64elf.em: Likewise. + * emultempl/aix.em: Likewise. + * emultempl/alphaelf.em: Likewise. + * emultempl/armcoff.em: Likewise. + * emultempl/armelf.em: Likewise. + * emultempl/avrelf.em: Likewise. + * emultempl/beos.em: Likewise. + * emultempl/cr16elf.em: Likewise. + * emultempl/elf-generic.em: Likewise. + * emultempl/elf32.em: Likewise. + * emultempl/genelf.em: Likewise. + * emultempl/generic.em: Likewise. + * emultempl/gld960.em: Likewise. + * emultempl/gld960c.em: Likewise. + * emultempl/hppaelf.em: Likewise. + * emultempl/irix.em: Likewise. + * emultempl/linux.em: Likewise. + * emultempl/lnk960.em: Likewise. + * emultempl/m68hc1xelf.em: Likewise. + * emultempl/m68kcoff.em: Likewise. + * emultempl/m68kelf.em: Likewise. + * emultempl/metagelf.em: Likewise. + * emultempl/mipself.em: Likewise. + * emultempl/mmo.em: Likewise. + * emultempl/msp430.em: Likewise. + * emultempl/nds32elf.em: Likewise. + * emultempl/needrelax.em: Likewise. + * emultempl/nios2elf.em: Likewise. + * emultempl/pe.em: Likewise. + * emultempl/pep.em: Likewise. + * emultempl/ppc32elf.em: Likewise. + * emultempl/ppc64elf.em: Likewise. + * emultempl/sh64elf.em: Likewise. + * emultempl/solaris2.em: Likewise. + * emultempl/spuelf.em: Likewise. + * emultempl/sunos.em: Likewise. + * emultempl/tic6xdsbt.em: Likewise. + * emultempl/ticoff.em: Likewise. + * emultempl/v850elf.em: Likewise. + * emultempl/vms.em: Likewise. + * emultempl/vxworks.em: Likewise. 2015-08-18 Alan Modra diff --git a/binutils/ld/configure b/binutils/ld/configure index a446283..9bcae92 100755 --- a/binutils/ld/configure +++ b/binutils/ld/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for ld 2.26. +# Generated by GNU Autoconf 2.64 for ld 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='ld' PACKAGE_TARNAME='ld' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='ld 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='ld 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1350,7 +1350,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures ld 2.26 to adapt to many kinds of systems. +\`configure' configures ld 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1421,7 +1421,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of ld 2.26:";; + short | recursive ) echo "Configuration of ld 2.26.1:";; esac cat <<\_ACEOF @@ -1545,7 +1545,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -ld configure 2.26 +ld configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -2254,7 +2254,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by ld $as_me 2.26, which was +It was created by ld $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -4063,7 +4063,7 @@ # Define the identity of the package. PACKAGE='ld' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -17134,7 +17134,7 @@ fi done -if test x$ac_default_compressed_debug_sections == xyes ; then +if test x$ac_default_compressed_debug_sections = xyes ; then $as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h @@ -17740,7 +17740,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by ld $as_me 2.26, which was +This file was extended by ld $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -17804,7 +17804,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -ld config.status 2.26 +ld config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/ld/configure.ac b/binutils/ld/configure.ac index 188172d..e28f38e 100644 --- a/binutils/ld/configure.ac +++ b/binutils/ld/configure.ac @@ -384,7 +384,7 @@ fi done -if test x$ac_default_compressed_debug_sections == xyes ; then +if test x$ac_default_compressed_debug_sections = xyes ; then AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.]) fi diff --git a/binutils/ld/ld.1 b/binutils/ld/ld.1 index fb67502..a2a28f1 100644 --- a/binutils/ld/ld.1 +++ b/binutils/ld/ld.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "LD 1" -.TH LD 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH LD 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -1196,14 +1196,20 @@ When creating a shared library, bind references to global symbols to the definition within the shared library, if any. Normally, it is possible for a program linked against a shared library to override the definition -within the shared library. This option is only meaningful on \s-1ELF\s0 -platforms which support shared libraries. +within the shared library. This option can also be used with the +\&\fB\-\-export\-dynamic\fR option, when creating a position independent +executable, to bind references to global symbols to the definition within +the executable. This option is only meaningful on \s-1ELF\s0 platforms which +support shared libraries and position independent executables. .IP "\fB\-Bsymbolic\-functions\fR" 4 .IX Item "-Bsymbolic-functions" When creating a shared library, bind references to global function symbols to the definition within the shared library, if any. +This option can also be used with the \fB\-\-export\-dynamic\fR option, +when creating a position independent executable, to bind references +to global function symbols to the definition within the executable. This option is only meaningful on \s-1ELF\s0 platforms which support shared -libraries. +libraries and position independent executables. .IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4 .IX Item "--dynamic-list=dynamic-list-file" Specify the name of a dynamic list file to the linker. This is diff --git a/binutils/ld/ld.info b/binutils/ld/ld.info index f1e387e..6103812 100644 --- a/binutils/ld/ld.info +++ b/binutils/ld/ld.info @@ -980,14 +980,21 @@ When creating a shared library, bind references to global symbols to the definition within the shared library, if any. Normally, it is possible for a program linked against a shared library to - override the definition within the shared library. This option is - only meaningful on ELF platforms which support shared libraries. + override the definition within the shared library. This option + can also be used with the `--export-dynamic' option, when creating + a position independent executable, to bind references to global + symbols to the definition within the executable. This option is + only meaningful on ELF platforms which support shared libraries + and position independent executables. `-Bsymbolic-functions' When creating a shared library, bind references to global function symbols to the definition within the shared library, if any. This - option is only meaningful on ELF platforms which support shared - libraries. + option can also be used with the `--export-dynamic' option, when + creating a position independent executable, to bind references to + global function symbols to the definition within the executable. + This option is only meaningful on ELF platforms which support + shared libraries and position independent executables. `--dynamic-list=DYNAMIC-LIST-FILE' Specify the name of a dynamic list file to the linker. This is @@ -7592,76 +7599,76 @@ * -(: Options. (line 804) * --accept-unknown-input-arch: Options. (line 822) * --add-needed: Options. (line 850) -* --add-stdcall-alias: Options. (line 1743) -* --allow-multiple-definition: Options. (line 1121) -* --allow-shlib-undefined: Options. (line 1127) +* --add-stdcall-alias: Options. (line 1750) +* --allow-multiple-definition: Options. (line 1128) +* --allow-shlib-undefined: Options. (line 1134) * --architecture=ARCH: Options. (line 123) * --as-needed: Options. (line 832) * --audit AUDITLIB: Options. (line 112) * --auxiliary=NAME: Options. (line 255) -* --bank-window: Options. (line 2197) -* --base-file: Options. (line 1748) +* --bank-window: Options. (line 2204) +* --base-file: Options. (line 1755) * --be8: ARM. (line 28) * --bss-plt: PowerPC ELF32. (line 16) -* --build-id: Options. (line 1705) -* --build-id=STYLE: Options. (line 1705) -* --check-sections: Options. (line 929) -* --compress-debug-sections=none: Options. (line 1675) -* --compress-debug-sections=zlib: Options. (line 1675) -* --compress-debug-sections=zlib-gabi: Options. (line 1675) -* --compress-debug-sections=zlib-gnu: Options. (line 1675) -* --copy-dt-needed-entries: Options. (line 941) -* --cref: Options. (line 961) -* --default-imported-symver: Options. (line 1164) +* --build-id: Options. (line 1712) +* --build-id=STYLE: Options. (line 1712) +* --check-sections: Options. (line 936) +* --compress-debug-sections=none: Options. (line 1682) +* --compress-debug-sections=zlib: Options. (line 1682) +* --compress-debug-sections=zlib-gabi: Options. (line 1682) +* --compress-debug-sections=zlib-gnu: Options. (line 1682) +* --copy-dt-needed-entries: Options. (line 948) +* --cref: Options. (line 968) +* --default-imported-symver: Options. (line 1171) * --default-script=SCRIPT: Options. (line 562) -* --default-symver: Options. (line 1160) -* --defsym=SYMBOL=EXP: Options. (line 990) -* --demangle[=STYLE]: Options. (line 1002) +* --default-symver: Options. (line 1167) +* --defsym=SYMBOL=EXP: Options. (line 997) +* --demangle[=STYLE]: Options. (line 1009) * --depaudit AUDITLIB: Options. (line 177) -* --disable-auto-image-base: Options. (line 1935) -* --disable-auto-import: Options. (line 2070) -* --disable-large-address-aware: Options. (line 1874) -* --disable-long-section-names: Options. (line 1758) -* --disable-new-dtags: Options. (line 1651) -* --disable-runtime-pseudo-reloc: Options. (line 2083) -* --disable-stdcall-fixup: Options. (line 1780) +* --disable-auto-image-base: Options. (line 1942) +* --disable-auto-import: Options. (line 2077) +* --disable-large-address-aware: Options. (line 1881) +* --disable-long-section-names: Options. (line 1765) +* --disable-new-dtags: Options. (line 1658) +* --disable-runtime-pseudo-reloc: Options. (line 2090) +* --disable-stdcall-fixup: Options. (line 1787) * --discard-all: Options. (line 647) * --discard-locals: Options. (line 651) -* --dll: Options. (line 1753) -* --dll-search-prefix: Options. (line 1941) +* --dll: Options. (line 1760) +* --dll-search-prefix: Options. (line 1948) * --dotsyms: PowerPC64 ELF64. (line 33) -* --dsbt-index: Options. (line 2174) -* --dsbt-size: Options. (line 2169) -* --dynamic-linker=FILE: Options. (line 1015) -* --dynamic-list-cpp-new: Options. (line 921) -* --dynamic-list-cpp-typeinfo: Options. (line 925) -* --dynamic-list-data: Options. (line 918) -* --dynamic-list=DYNAMIC-LIST-FILE: Options. (line 905) -* --dynamicbase: Options. (line 2123) -* --eh-frame-hdr: Options. (line 1642) +* --dsbt-index: Options. (line 2181) +* --dsbt-size: Options. (line 2176) +* --dynamic-linker=FILE: Options. (line 1022) +* --dynamic-list-cpp-new: Options. (line 928) +* --dynamic-list-cpp-typeinfo: Options. (line 932) +* --dynamic-list-data: Options. (line 925) +* --dynamic-list=DYNAMIC-LIST-FILE: Options. (line 912) +* --dynamicbase: Options. (line 2130) +* --eh-frame-hdr: Options. (line 1649) * --emit-relocs: Options. (line 497) * --emit-stack-syms: SPU ELF. (line 46) * --emit-stub-syms <1>: PowerPC ELF32. (line 47) * --emit-stub-syms <2>: SPU ELF. (line 15) * --emit-stub-syms: PowerPC64 ELF64. (line 29) -* --enable-auto-image-base: Options. (line 1926) -* --enable-auto-import: Options. (line 1950) -* --enable-extra-pe-debug: Options. (line 2088) -* --enable-long-section-names: Options. (line 1758) -* --enable-new-dtags: Options. (line 1651) -* --enable-runtime-pseudo-reloc: Options. (line 2075) -* --enable-stdcall-fixup: Options. (line 1780) +* --enable-auto-image-base: Options. (line 1933) +* --enable-auto-import: Options. (line 1957) +* --enable-extra-pe-debug: Options. (line 2095) +* --enable-long-section-names: Options. (line 1765) +* --enable-new-dtags: Options. (line 1658) +* --enable-runtime-pseudo-reloc: Options. (line 2082) +* --enable-stdcall-fixup: Options. (line 1787) * --entry=ENTRY: Options. (line 187) -* --error-unresolved-symbols: Options. (line 1595) -* --exclude-all-symbols: Options. (line 1834) +* --error-unresolved-symbols: Options. (line 1602) +* --exclude-all-symbols: Options. (line 1841) * --exclude-libs: Options. (line 197) * --exclude-modules-for-implib: Options. (line 208) -* --exclude-symbols: Options. (line 1828) -* --export-all-symbols: Options. (line 1804) +* --exclude-symbols: Options. (line 1835) +* --export-all-symbols: Options. (line 1811) * --export-dynamic: Options. (line 221) * --extra-overlay-stubs: SPU ELF. (line 19) -* --fatal-warnings: Options. (line 1028) -* --file-alignment: Options. (line 1838) +* --fatal-warnings: Options. (line 1035) +* --file-alignment: Options. (line 1845) * --filter=NAME: Options. (line 276) * --fix-arm1176: ARM. (line 112) * --fix-cortex-a53-835769: ARM. (line 213) @@ -7670,66 +7677,66 @@ * --fix-v4bx: ARM. (line 50) * --fix-v4bx-interworking: ARM. (line 63) * --force-dynamic: Options. (line 506) -* --force-exe-suffix: Options. (line 1033) -* --forceinteg: Options. (line 2128) +* --force-exe-suffix: Options. (line 1040) +* --forceinteg: Options. (line 2135) * --format=FORMAT: Options. (line 134) * --format=VERSION: TI COFF. (line 6) -* --gc-sections: Options. (line 1043) -* --got: Options. (line 2210) +* --gc-sections: Options. (line 1050) +* --got: Options. (line 2217) * --got=TYPE: M68K. (line 6) * --gpsize=VALUE: Options. (line 309) -* --hash-size=NUMBER: Options. (line 1661) -* --hash-style=STYLE: Options. (line 1669) -* --heap: Options. (line 1844) -* --help: Options. (line 1094) -* --high-entropy-va: Options. (line 2119) -* --image-base: Options. (line 1851) -* --insert-timestamp: Options. (line 2151) +* --hash-size=NUMBER: Options. (line 1668) +* --hash-style=STYLE: Options. (line 1676) +* --heap: Options. (line 1851) +* --help: Options. (line 1101) +* --high-entropy-va: Options. (line 2126) +* --image-base: Options. (line 1858) +* --insert-timestamp: Options. (line 2158) * --insn32 <1>: MIPS. (line 6) -* --insn32: Options. (line 2222) +* --insn32: Options. (line 2229) * --just-symbols=FILE: Options. (line 529) -* --kill-at: Options. (line 1860) -* --large-address-aware: Options. (line 1865) -* --ld-generated-unwind-info: Options. (line 1646) -* --leading-underscore: Options. (line 1798) +* --kill-at: Options. (line 1867) +* --large-address-aware: Options. (line 1872) +* --ld-generated-unwind-info: Options. (line 1653) +* --leading-underscore: Options. (line 1805) * --library-path=DIR: Options. (line 367) * --library=NAMESPEC: Options. (line 334) * --local-store=lo:hi: SPU ELF. (line 24) * --long-plt: ARM. (line 224) -* --major-image-version: Options. (line 1881) -* --major-os-version: Options. (line 1886) -* --major-subsystem-version: Options. (line 1890) +* --major-image-version: Options. (line 1888) +* --major-os-version: Options. (line 1893) +* --major-subsystem-version: Options. (line 1897) * --merge-exidx-entries: ARM. (line 221) -* --minor-image-version: Options. (line 1895) -* --minor-os-version: Options. (line 1900) -* --minor-subsystem-version: Options. (line 1904) +* --minor-image-version: Options. (line 1902) +* --minor-os-version: Options. (line 1907) +* --minor-subsystem-version: Options. (line 1911) * --mri-script=MRI-CMDFILE: Options. (line 158) * --multi-subspace: HPPA ELF32. (line 6) * --nmagic: Options. (line 439) * --no-accept-unknown-input-arch: Options. (line 822) * --no-add-needed: Options. (line 850) -* --no-allow-shlib-undefined: Options. (line 1127) +* --no-allow-shlib-undefined: Options. (line 1134) * --no-as-needed: Options. (line 832) -* --no-bind: Options. (line 2142) -* --no-check-sections: Options. (line 929) -* --no-copy-dt-needed-entries: Options. (line 941) -* --no-define-common: Options. (line 974) -* --no-demangle: Options. (line 1002) +* --no-bind: Options. (line 2149) +* --no-check-sections: Options. (line 936) +* --no-copy-dt-needed-entries: Options. (line 948) +* --no-define-common: Options. (line 981) +* --no-demangle: Options. (line 1009) * --no-dotsyms: PowerPC64 ELF64. (line 33) -* --no-dynamic-linker: Options. (line 1022) +* --no-dynamic-linker: Options. (line 1029) * --no-enum-size-warning: ARM. (line 159) * --no-export-dynamic: Options. (line 221) -* --no-fatal-warnings: Options. (line 1028) +* --no-fatal-warnings: Options. (line 1035) * --no-fix-arm1176: ARM. (line 112) * --no-fix-cortex-a53-835769: ARM. (line 213) * --no-fix-cortex-a8: ARM. (line 204) -* --no-gc-sections: Options. (line 1043) -* --no-insn32 <1>: Options. (line 2223) +* --no-gc-sections: Options. (line 1050) +* --no-insn32 <1>: Options. (line 2230) * --no-insn32: MIPS. (line 6) -* --no-isolation: Options. (line 2135) -* --no-keep-memory: Options. (line 1106) -* --no-leading-underscore: Options. (line 1798) -* --no-merge-exidx-entries <1>: Options. (line 2181) +* --no-isolation: Options. (line 2142) +* --no-keep-memory: Options. (line 1113) +* --no-leading-underscore: Options. (line 1805) +* --no-merge-exidx-entries <1>: Options. (line 2188) * --no-merge-exidx-entries: ARM. (line 221) * --no-multi-toc: PowerPC64 ELF64. (line 97) * --no-omagic: Options. (line 454) @@ -7738,74 +7745,74 @@ * --no-plt-align: PowerPC64 ELF64. (line 119) * --no-plt-static-chain: PowerPC64 ELF64. (line 127) * --no-plt-thread-safe: PowerPC64 ELF64. (line 133) -* --no-print-gc-sections: Options. (line 1067) +* --no-print-gc-sections: Options. (line 1074) * --no-save-restore-funcs: PowerPC64 ELF64. (line 44) -* --no-seh: Options. (line 2138) +* --no-seh: Options. (line 2145) * --no-tls-get-addr-optimize: PowerPC64 ELF64. (line 57) * --no-tls-optimize <1>: PowerPC64 ELF64. (line 52) * --no-tls-optimize: PowerPC ELF32. (line 51) * --no-toc-optimize: PowerPC64 ELF64. (line 83) * --no-toc-sort: PowerPC64 ELF64. (line 109) -* --no-trampoline: Options. (line 2191) -* --no-undefined: Options. (line 1113) -* --no-undefined-version: Options. (line 1155) -* --no-warn-mismatch: Options. (line 1168) -* --no-warn-search-mismatch: Options. (line 1177) +* --no-trampoline: Options. (line 2198) +* --no-undefined: Options. (line 1120) +* --no-undefined-version: Options. (line 1162) +* --no-warn-mismatch: Options. (line 1175) +* --no-warn-search-mismatch: Options. (line 1184) * --no-wchar-size-warning: ARM. (line 166) -* --no-whole-archive: Options. (line 1181) -* --noinhibit-exec: Options. (line 1185) +* --no-whole-archive: Options. (line 1188) +* --noinhibit-exec: Options. (line 1192) * --non-overlapping-opd: PowerPC64 ELF64. (line 77) -* --nxcompat: Options. (line 2131) -* --oformat=OUTPUT-FORMAT: Options. (line 1197) +* --nxcompat: Options. (line 2138) +* --oformat=OUTPUT-FORMAT: Options. (line 1204) * --omagic: Options. (line 445) * --orphan-handling=MODE: Options. (line 606) -* --out-implib: Options. (line 1917) -* --output-def: Options. (line 1909) +* --out-implib: Options. (line 1924) +* --output-def: Options. (line 1916) * --output=OUTPUT: Options. (line 460) -* --pic-executable: Options. (line 1210) +* --pic-executable: Options. (line 1217) * --pic-veneer: ARM. (line 172) * --plt-align: PowerPC64 ELF64. (line 119) * --plt-static-chain: PowerPC64 ELF64. (line 127) * --plt-thread-safe: PowerPC64 ELF64. (line 133) * --plugin: SPU ELF. (line 6) * --pop-state: Options. (line 494) -* --print-gc-sections: Options. (line 1067) +* --print-gc-sections: Options. (line 1074) * --print-map: Options. (line 402) -* --print-memory-usage: Options. (line 1082) -* --print-output-format: Options. (line 1076) +* --print-memory-usage: Options. (line 1089) +* --print-output-format: Options. (line 1083) * --push-state: Options. (line 476) -* --reduce-memory-overheads: Options. (line 1691) -* --relax: Options. (line 1226) +* --reduce-memory-overheads: Options. (line 1698) +* --relax: Options. (line 1233) * --relax on i960: i960. (line 31) * --relax on Nios II: Nios II. (line 6) * --relax on PowerPC: PowerPC ELF32. (line 6) * --relax on Xtensa: Xtensa. (line 27) * --relocatable: Options. (line 510) * --require-defined=SYMBOL: Options. (line 588) -* --retain-symbols-file=FILENAME: Options. (line 1252) +* --retain-symbols-file=FILENAME: Options. (line 1259) * --save-restore-funcs: PowerPC64 ELF64. (line 44) * --script=SCRIPT: Options. (line 553) * --sdata-got: PowerPC ELF32. (line 33) -* --section-alignment: Options. (line 2093) -* --section-start=SECTIONNAME=ORG: Options. (line 1408) +* --section-alignment: Options. (line 2100) +* --section-start=SECTIONNAME=ORG: Options. (line 1415) * --secure-plt: PowerPC ELF32. (line 26) -* --sort-common: Options. (line 1350) -* --sort-section=alignment: Options. (line 1365) -* --sort-section=name: Options. (line 1361) -* --split-by-file: Options. (line 1369) -* --split-by-reloc: Options. (line 1374) -* --stack: Options. (line 2099) +* --sort-common: Options. (line 1357) +* --sort-section=alignment: Options. (line 1372) +* --sort-section=name: Options. (line 1368) +* --split-by-file: Options. (line 1376) +* --split-by-reloc: Options. (line 1381) +* --stack: Options. (line 2106) * --stack-analysis: SPU ELF. (line 29) -* --stats: Options. (line 1387) +* --stats: Options. (line 1394) * --strip-all: Options. (line 540) * --strip-debug: Options. (line 544) * --stub-group-size: PowerPC64 ELF64. (line 6) * --stub-group-size=N <1>: HPPA ELF32. (line 12) * --stub-group-size=N: ARM. (line 177) -* --subsystem: Options. (line 2106) +* --subsystem: Options. (line 2113) * --support-old-code: ARM. (line 6) -* --sysroot=DIRECTORY: Options. (line 1391) -* --target-help: Options. (line 1098) +* --sysroot=DIRECTORY: Options. (line 1398) +* --target-help: Options. (line 1105) * --target1-abs: ARM. (line 33) * --target1-rel: ARM. (line 33) * --target2=TYPE: ARM. (line 38) @@ -7813,38 +7820,38 @@ * --tls-get-addr-optimize: PowerPC64 ELF64. (line 57) * --trace: Options. (line 549) * --trace-symbol=SYMBOL: Options. (line 657) -* --traditional-format: Options. (line 1396) -* --tsaware: Options. (line 2148) +* --traditional-format: Options. (line 1403) +* --tsaware: Options. (line 2155) * --undefined=SYMBOL: Options. (line 575) * --unique[=SECTION]: Options. (line 632) -* --unresolved-symbols: Options. (line 1438) +* --unresolved-symbols: Options. (line 1445) * --use-blx: ARM. (line 75) * --use-nul-prefixed-import-tables: ARM. (line 23) -* --verbose[=NUMBER]: Options. (line 1467) +* --verbose[=NUMBER]: Options. (line 1474) * --version: Options. (line 641) -* --version-script=VERSION-SCRIPTFILE: Options. (line 1475) +* --version-script=VERSION-SCRIPTFILE: Options. (line 1482) * --vfp11-denorm-fix: ARM. (line 84) -* --warn-alternate-em: Options. (line 1587) -* --warn-common: Options. (line 1486) -* --warn-constructors: Options. (line 1554) -* --warn-multiple-gp: Options. (line 1559) -* --warn-once: Options. (line 1573) -* --warn-section-align: Options. (line 1577) -* --warn-shared-textrel: Options. (line 1584) -* --warn-unresolved-symbols: Options. (line 1590) -* --wdmdriver: Options. (line 2145) -* --whole-archive: Options. (line 1599) -* --wrap=SYMBOL: Options. (line 1613) +* --warn-alternate-em: Options. (line 1594) +* --warn-common: Options. (line 1493) +* --warn-constructors: Options. (line 1561) +* --warn-multiple-gp: Options. (line 1566) +* --warn-once: Options. (line 1580) +* --warn-section-align: Options. (line 1584) +* --warn-shared-textrel: Options. (line 1591) +* --warn-unresolved-symbols: Options. (line 1597) +* --wdmdriver: Options. (line 2152) +* --whole-archive: Options. (line 1606) +* --wrap=SYMBOL: Options. (line 1620) * -A ARCH: Options. (line 122) * -a KEYWORD: Options. (line 105) * -assert KEYWORD: Options. (line 857) * -b FORMAT: Options. (line 134) * -Bdynamic: Options. (line 860) * -Bgroup: Options. (line 870) -* -Bshareable: Options. (line 1343) +* -Bshareable: Options. (line 1350) * -Bstatic: Options. (line 877) * -Bsymbolic: Options. (line 892) -* -Bsymbolic-functions: Options. (line 899) +* -Bsymbolic-functions: Options. (line 903) * -c MRI-CMDFILE: Options. (line 158) * -call_shared: Options. (line 860) * -d: Options. (line 168) @@ -7864,42 +7871,42 @@ * -G VALUE: Options. (line 309) * -h NAME: Options. (line 316) * -i: Options. (line 325) -* -IFILE: Options. (line 1015) +* -IFILE: Options. (line 1022) * -init=NAME: Options. (line 328) * -L DIR: Options. (line 367) * -l NAMESPEC: Options. (line 334) * -M: Options. (line 402) * -m EMULATION: Options. (line 392) -* -Map=MAPFILE: Options. (line 1102) +* -Map=MAPFILE: Options. (line 1109) * -n: Options. (line 439) * -N: Options. (line 445) -* -no-relax: Options. (line 1226) +* -no-relax: Options. (line 1233) * -non_shared: Options. (line 877) -* -nostdlib: Options. (line 1191) +* -nostdlib: Options. (line 1198) * -O LEVEL: Options. (line 466) * -o OUTPUT: Options. (line 460) * -P AUDITLIB: Options. (line 177) -* -pie: Options. (line 1210) +* -pie: Options. (line 1217) * -q: Options. (line 497) -* -qmagic: Options. (line 1220) -* -Qy: Options. (line 1223) +* -qmagic: Options. (line 1227) +* -Qy: Options. (line 1230) * -r: Options. (line 510) * -R FILE: Options. (line 529) -* -rpath-link=DIR: Options. (line 1288) -* -rpath=DIR: Options. (line 1266) +* -rpath-link=DIR: Options. (line 1295) +* -rpath=DIR: Options. (line 1273) * -s: Options. (line 540) * -S: Options. (line 544) -* -shared: Options. (line 1343) +* -shared: Options. (line 1350) * -soname=NAME: Options. (line 316) * -static: Options. (line 877) * -t: Options. (line 549) * -T SCRIPT: Options. (line 553) -* -Tbss=ORG: Options. (line 1417) -* -Tdata=ORG: Options. (line 1417) -* -Tldata-segment=ORG: Options. (line 1433) -* -Trodata-segment=ORG: Options. (line 1427) -* -Ttext-segment=ORG: Options. (line 1423) -* -Ttext=ORG: Options. (line 1417) +* -Tbss=ORG: Options. (line 1424) +* -Tdata=ORG: Options. (line 1424) +* -Tldata-segment=ORG: Options. (line 1440) +* -Trodata-segment=ORG: Options. (line 1434) +* -Ttext-segment=ORG: Options. (line 1430) +* -Ttext=ORG: Options. (line 1424) * -u SYMBOL: Options. (line 575) * -Ur: Options. (line 596) * -v: Options. (line 641) @@ -7908,9 +7915,9 @@ * -X: Options. (line 651) * -Y PATH: Options. (line 666) * -y SYMBOL: Options. (line 657) -* -z defs: Options. (line 1113) +* -z defs: Options. (line 1120) * -z KEYWORD: Options. (line 670) -* -z muldefs: Options. (line 1121) +* -z muldefs: Options. (line 1128) * .: Location Counter. (line 6) * /DISCARD/: Output Section Discarding. (line 26) @@ -7976,7 +7983,7 @@ (line 19) * CHIP (MRI): MRI. (line 58) * COLLECT_NO_DEMANGLE: Environment. (line 29) -* combining symbols, warnings on: Options. (line 1486) +* combining symbols, warnings on: Options. (line 1493) * command files: Scripts. (line 6) * command line: Options. (line 6) * common allocation: Options. (line 168) @@ -8001,7 +8008,7 @@ * CREATE_OBJECT_SYMBOLS: Output Section Keywords. (line 9) * creating a DEF file: WIN32. (line 158) -* cross reference table: Options. (line 961) +* cross reference table: Options. (line 968) * cross references: Miscellaneous Commands. (line 82) * current output location: Location Counter. (line 6) @@ -8011,25 +8018,25 @@ (line 82) * DATA_SEGMENT_END(EXP): Builtin Functions. (line 104) * DATA_SEGMENT_RELRO_END(OFFSET, EXP): Builtin Functions. (line 110) -* dbx: Options. (line 1401) -* DEF files, creating: Options. (line 1909) +* dbx: Options. (line 1408) +* DEF files, creating: Options. (line 1916) * default emulation: Environment. (line 21) * default input format: Environment. (line 9) * defined symbol: Options. (line 588) * DEFINED(SYMBOL): Builtin Functions. (line 123) * deleting local symbols: Options. (line 647) * demangling, default: Environment. (line 29) -* demangling, from command line: Options. (line 1002) +* demangling, from command line: Options. (line 1009) * direct linking to a dll: WIN32. (line 239) * discarding sections: Output Section Discarding. (line 6) * discontinuous memory: MEMORY. (line 6) -* DLLs, creating: Options. (line 1917) -* DLLs, linking to: Options. (line 1941) +* DLLs, creating: Options. (line 1924) +* DLLs, linking to: Options. (line 1948) * dot: Location Counter. (line 6) * dot inside sections: Location Counter. (line 36) * dot outside sections: Location Counter. (line 66) -* dynamic linker, from command line: Options. (line 1015) +* dynamic linker, from command line: Options. (line 1022) * dynamic symbol table: Options. (line 221) * ELF program headers: PHDRS. (line 6) * emulation: Options. (line 392) @@ -8073,7 +8080,7 @@ * forcing the creation of dynamic sections: Options. (line 506) * FORMAT (MRI): MRI. (line 66) * functions in expressions: Builtin Functions. (line 6) -* garbage collection <1>: Options. (line 1043) +* garbage collection <1>: Options. (line 1050) * garbage collection: Input Section Keep. (line 6) * generating optimized output: Options. (line 466) * GNU linker: Overview. (line 6) @@ -8083,8 +8090,8 @@ * groups of archives: Options. (line 804) * H8/300 support: H8/300. (line 6) * header size: Builtin Functions. (line 191) -* heap size: Options. (line 1844) -* help: Options. (line 1094) +* heap size: Options. (line 1851) +* help: Options. (line 1101) * HIDDEN: HIDDEN. (line 6) * holes: Location Counter. (line 12) * holes, filling: Output Section Data. @@ -8092,13 +8099,13 @@ * HPPA multiple sub-space stubs: HPPA ELF32. (line 6) * HPPA stub grouping: HPPA ELF32. (line 12) * i960 support: i960. (line 6) -* image base: Options. (line 1851) +* image base: Options. (line 1858) * implicit linker scripts: Implicit Linker Scripts. (line 6) * import libraries: WIN32. (line 10) * INCLUDE FILENAME: File Commands. (line 9) * including a linker script: File Commands. (line 9) -* including an entire archive: Options. (line 1599) +* including an entire archive: Options. (line 1606) * incremental link: Options. (line 325) * INHIBIT_COMMON_ALLOCATION: Miscellaneous Commands. (line 51) @@ -8134,14 +8141,14 @@ * ld bugs, reporting: Bug Reporting. (line 6) * LD_FEATURE(STRING): Miscellaneous Commands. (line 104) -* ldata segment origin, cmd line: Options. (line 1434) +* ldata segment origin, cmd line: Options. (line 1441) * LDEMULATION: Environment. (line 21) * len =: MEMORY. (line 74) * LENGTH =: MEMORY. (line 74) * LENGTH(MEMORY): Builtin Functions. (line 140) * library search path in linker script: File Commands. (line 76) * link map: Options. (line 402) -* link-time runtime library search path: Options. (line 1288) +* link-time runtime library search path: Options. (line 1295) * linker crash: Bug Criteria. (line 9) * linker script concepts: Basic Script Concepts. (line 6) @@ -8176,7 +8183,7 @@ * memory regions: MEMORY. (line 6) * memory regions and sections: Output Section Region. (line 6) -* memory usage: Options. (line 1106) +* memory usage: Options. (line 1113) * Merging exidx entries: ARM. (line 221) * MIN: Builtin Functions. (line 153) * MIPS microMIPS instruction choice selection: MIPS. (line 6) @@ -8218,10 +8225,10 @@ * ORIGIN(MEMORY): Builtin Functions. (line 163) * orphan: Orphan Sections. (line 6) * orphan sections: Options. (line 606) -* output file after errors: Options. (line 1185) +* output file after errors: Options. (line 1192) * output file format in linker script: Format Commands. (line 10) * output file name in linker script: File Commands. (line 66) -* output format: Options. (line 1076) +* output format: Options. (line 1083) * output section alignment: Forced Output Alignment. (line 6) * output section attributes: Output Section Attributes. @@ -8241,7 +8248,7 @@ * PHDRS: PHDRS. (line 6) * PIC_VENEER: ARM. (line 172) * pop state governing input file handling: Options. (line 494) -* position independent executables: Options. (line 1212) +* position independent executables: Options. (line 1219) * PowerPC ELF32 options: PowerPC ELF32. (line 16) * PowerPC GOT: PowerPC ELF32. (line 33) * PowerPC long branches: PowerPC ELF32. (line 6) @@ -8286,7 +8293,7 @@ * REGION_ALIAS(ALIAS, REGION): REGION_ALIAS. (line 6) * regions of memory: MEMORY. (line 6) * relative expressions: Expression Section. (line 6) -* relaxing addressing modes: Options. (line 1226) +* relaxing addressing modes: Options. (line 1233) * relaxing on H8/300: H8/300. (line 9) * relaxing on i960: i960. (line 31) * relaxing on M68HC11: M68HC11/68HC12. (line 12) @@ -8299,13 +8306,13 @@ * reporting bugs in ld: Reporting Bugs. (line 6) * requirements for BFD: BFD. (line 16) * retain relocations in final executable: Options. (line 497) -* retaining specified symbols: Options. (line 1252) -* rodata segment origin, cmd line: Options. (line 1428) +* retaining specified symbols: Options. (line 1259) +* rodata segment origin, cmd line: Options. (line 1435) * ROM initialized data: Output Section LMA. (line 39) * round up expression: Builtin Functions. (line 38) * round up location counter: Builtin Functions. (line 38) * runtime library name: Options. (line 316) -* runtime library search path: Options. (line 1266) +* runtime library search path: Options. (line 1273) * runtime pseudo-relocation: WIN32. (line 217) * scaled integers: Constants. (line 15) * scommon section: Input Section Common. @@ -8320,7 +8327,7 @@ (line 6) * section address in expression: Builtin Functions. (line 17) * section alignment: Builtin Functions. (line 64) -* section alignment, warnings on: Options. (line 1577) +* section alignment, warnings on: Options. (line 1584) * section data: Output Section Data. (line 6) * section fill pattern: Output Section Fill. @@ -8340,10 +8347,10 @@ * sections, discarding: Output Section Discarding. (line 6) * sections, orphan: Options. (line 606) -* segment origins, cmd line: Options. (line 1417) +* segment origins, cmd line: Options. (line 1424) * SEGMENT_START(SEGMENT, DEFAULT): Builtin Functions. (line 166) * segments, ELF: PHDRS. (line 6) -* shared libraries: Options. (line 1345) +* shared libraries: Options. (line 1352) * SHORT(EXPRESSION): Output Section Data. (line 6) * SIZEOF(SECTION): Builtin Functions. (line 175) @@ -8369,14 +8376,14 @@ * SPU plugins: SPU ELF. (line 6) * SQUAD(EXPRESSION): Output Section Data. (line 6) -* stack size: Options. (line 2099) +* stack size: Options. (line 2106) * standard Unix system: Options. (line 7) * start of execution: Entry Point. (line 6) * STARTUP(FILENAME): File Commands. (line 84) * STM32L4xx erratum workaround: ARM. (line 121) * strip all symbols: Options. (line 540) * strip debugger symbols: Options. (line 544) -* stripping all but some symbols: Options. (line 1252) +* stripping all but some symbols: Options. (line 1259) * STUB_GROUP_SIZE: ARM. (line 177) * SUBALIGN(SUBSECTION_ALIGN): Forced Input Alignment. (line 6) @@ -8388,46 +8395,46 @@ * symbol versions: VERSION. (line 6) * symbol-only input: Options. (line 529) * symbolic constants: Symbolic Constants. (line 6) -* symbols, from command line: Options. (line 990) +* symbols, from command line: Options. (line 997) * symbols, relocatable and absolute: Expression Section. (line 6) * symbols, require defined: Options. (line 588) -* symbols, retaining selectively: Options. (line 1252) -* synthesizing linker: Options. (line 1226) +* symbols, retaining selectively: Options. (line 1259) +* synthesizing linker: Options. (line 1233) * synthesizing on H8/300: H8/300. (line 14) * TARGET(BFDNAME): Format Commands. (line 35) * TARGET1: ARM. (line 33) * TARGET2: ARM. (line 38) -* text segment origin, cmd line: Options. (line 1424) +* text segment origin, cmd line: Options. (line 1431) * thumb entry point: ARM. (line 17) * TI COFF versions: TI COFF. (line 6) -* traditional format: Options. (line 1396) +* traditional format: Options. (line 1403) * trampoline generation on M68HC11: M68HC11/68HC12. (line 31) * trampoline generation on M68HC12: M68HC11/68HC12. (line 31) * unallocated address, next: Builtin Functions. (line 157) * undefined symbol: Options. (line 575) * undefined symbol in linker script: Miscellaneous Commands. (line 39) -* undefined symbols, warnings on: Options. (line 1573) +* undefined symbols, warnings on: Options. (line 1580) * uninitialized data placement: Input Section Common. (line 6) * unspecified memory: Output Section Data. (line 39) -* usage: Options. (line 1094) +* usage: Options. (line 1101) * USE_BLX: ARM. (line 75) * using a DEF file: WIN32. (line 57) * using auto-export functionality: WIN32. (line 22) * Using decorations: WIN32. (line 162) * variables, defining: Assignments. (line 6) -* verbose[=NUMBER]: Options. (line 1467) +* verbose[=NUMBER]: Options. (line 1474) * version: Options. (line 641) * version script: VERSION. (line 6) -* version script, symbol versions: Options. (line 1475) +* version script, symbol versions: Options. (line 1482) * VERSION {script text}: VERSION. (line 6) * versions of symbols: VERSION. (line 6) * VFP11_DENORM_FIX: ARM. (line 84) -* warnings, on combining symbols: Options. (line 1486) -* warnings, on section alignment: Options. (line 1577) -* warnings, on undefined symbols: Options. (line 1573) +* warnings, on combining symbols: Options. (line 1493) +* warnings, on section alignment: Options. (line 1584) +* warnings, on undefined symbols: Options. (line 1580) * weak externals: WIN32. (line 407) * what is this?: Overview. (line 6) * wildcard file name patterns: Input Section Wildcards. @@ -8442,87 +8449,87 @@ Node: Overview1493 Node: Invocation2607 Node: Options3015 -Node: Environment103651 -Node: Scripts105411 -Node: Basic Script Concepts107145 -Node: Script Format109853 -Node: Simple Example110716 -Node: Simple Commands113812 -Node: Entry Point114318 -Node: File Commands115251 -Node: Format Commands119371 -Node: REGION_ALIAS121327 -Node: Miscellaneous Commands126159 -Node: Assignments130783 -Node: Simple Assignments131294 -Node: HIDDEN133029 -Node: PROVIDE133659 -Node: PROVIDE_HIDDEN134852 -Node: Source Code Reference135096 -Node: SECTIONS139012 -Node: Output Section Description140903 -Node: Output Section Name142147 -Node: Output Section Address143023 -Node: Input Section145258 -Node: Input Section Basics146059 -Node: Input Section Wildcards149965 -Node: Input Section Common155172 -Node: Input Section Keep156654 -Node: Input Section Example157144 -Node: Output Section Data158112 -Node: Output Section Keywords160889 -Node: Output Section Discarding164458 -Node: Output Section Attributes165951 -Node: Output Section Type167052 -Node: Output Section LMA168123 -Node: Forced Output Alignment171194 -Node: Forced Input Alignment171624 -Node: Output Section Constraint172013 -Node: Output Section Region172441 -Node: Output Section Phdr172874 -Node: Output Section Fill173538 -Node: Overlay Description174680 -Node: MEMORY179126 -Node: PHDRS183503 -Node: VERSION188757 -Node: Expressions196850 -Node: Constants197779 -Node: Symbolic Constants198654 -Node: Symbols199205 -Node: Orphan Sections199952 -Node: Location Counter201289 -Node: Operators205725 -Node: Evaluation206647 -Node: Expression Section208011 -Node: Builtin Functions211875 -Node: Implicit Linker Scripts220115 -Node: Machine Dependent220890 -Node: H8/300222014 -Node: i960224076 -Node: M68HC11/68HC12225772 -Node: ARM227214 -Node: HPPA ELF32238234 -Node: M68K239857 -Node: MIPS240766 -Node: MMIX241290 -Node: MSP430242455 -Node: NDS32243495 -Node: Nios II244461 -Node: PowerPC ELF32245777 -Node: PowerPC64 ELF64248608 -Node: SPU ELF255940 -Node: TI COFF258572 -Node: WIN32259098 -Node: Xtensa279224 -Node: BFD282189 -Node: BFD outline283644 -Node: BFD information loss284930 -Node: Canonical format287447 -Node: Reporting Bugs291804 -Node: Bug Criteria292498 -Node: Bug Reporting293197 -Node: MRI300236 -Node: GNU Free Documentation License304879 -Node: LD Index330035 +Node: Environment104154 +Node: Scripts105914 +Node: Basic Script Concepts107648 +Node: Script Format110356 +Node: Simple Example111219 +Node: Simple Commands114315 +Node: Entry Point114821 +Node: File Commands115754 +Node: Format Commands119874 +Node: REGION_ALIAS121830 +Node: Miscellaneous Commands126662 +Node: Assignments131286 +Node: Simple Assignments131797 +Node: HIDDEN133532 +Node: PROVIDE134162 +Node: PROVIDE_HIDDEN135355 +Node: Source Code Reference135599 +Node: SECTIONS139515 +Node: Output Section Description141406 +Node: Output Section Name142650 +Node: Output Section Address143526 +Node: Input Section145761 +Node: Input Section Basics146562 +Node: Input Section Wildcards150468 +Node: Input Section Common155675 +Node: Input Section Keep157157 +Node: Input Section Example157647 +Node: Output Section Data158615 +Node: Output Section Keywords161392 +Node: Output Section Discarding164961 +Node: Output Section Attributes166454 +Node: Output Section Type167555 +Node: Output Section LMA168626 +Node: Forced Output Alignment171697 +Node: Forced Input Alignment172127 +Node: Output Section Constraint172516 +Node: Output Section Region172944 +Node: Output Section Phdr173377 +Node: Output Section Fill174041 +Node: Overlay Description175183 +Node: MEMORY179629 +Node: PHDRS184006 +Node: VERSION189260 +Node: Expressions197353 +Node: Constants198282 +Node: Symbolic Constants199157 +Node: Symbols199708 +Node: Orphan Sections200455 +Node: Location Counter201792 +Node: Operators206228 +Node: Evaluation207150 +Node: Expression Section208514 +Node: Builtin Functions212378 +Node: Implicit Linker Scripts220618 +Node: Machine Dependent221393 +Node: H8/300222517 +Node: i960224579 +Node: M68HC11/68HC12226275 +Node: ARM227717 +Node: HPPA ELF32238737 +Node: M68K240360 +Node: MIPS241269 +Node: MMIX241793 +Node: MSP430242958 +Node: NDS32243998 +Node: Nios II244964 +Node: PowerPC ELF32246280 +Node: PowerPC64 ELF64249111 +Node: SPU ELF256443 +Node: TI COFF259075 +Node: WIN32259601 +Node: Xtensa279727 +Node: BFD282692 +Node: BFD outline284147 +Node: BFD information loss285433 +Node: Canonical format287950 +Node: Reporting Bugs292307 +Node: Bug Criteria293001 +Node: Bug Reporting293700 +Node: MRI300739 +Node: GNU Free Documentation License305382 +Node: LD Index330538  End Tag Table diff --git a/binutils/ld/ld.texinfo b/binutils/ld/ld.texinfo index 1dd7492..2389661 100644 --- a/binutils/ld/ld.texinfo +++ b/binutils/ld/ld.texinfo @@ -1325,15 +1325,21 @@ When creating a shared library, bind references to global symbols to the definition within the shared library, if any. Normally, it is possible for a program linked against a shared library to override the definition -within the shared library. This option is only meaningful on ELF -platforms which support shared libraries. +within the shared library. This option can also be used with the +@option{--export-dynamic} option, when creating a position independent +executable, to bind references to global symbols to the definition within +the executable. This option is only meaningful on ELF platforms which +support shared libraries and position independent executables. @kindex -Bsymbolic-functions @item -Bsymbolic-functions When creating a shared library, bind references to global function symbols to the definition within the shared library, if any. +This option can also be used with the @option{--export-dynamic} option, +when creating a position independent executable, to bind references +to global function symbols to the definition within the executable. This option is only meaningful on ELF platforms which support shared -libraries. +libraries and position independent executables. @kindex --dynamic-list=@var{dynamic-list-file} @item --dynamic-list=@var{dynamic-list-file} diff --git a/binutils/ld/lexsup.c b/binutils/ld/lexsup.c index 4cad209..e2fb212 100644 --- a/binutils/ld/lexsup.c +++ b/binutils/ld/lexsup.c @@ -1586,15 +1586,14 @@ /* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data, --dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and --dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are - for shared libraries. -Bsymbolic overrides all others and vice - versa. */ + for PIC outputs. -Bsymbolic overrides all others and vice versa. */ switch (command_line.symbolic) { case symbolic_unset: break; case symbolic: - /* -Bsymbolic is for shared library only. */ - if (bfd_link_dll (&link_info)) + /* -Bsymbolic is for PIC output only. */ + if (bfd_link_pic (&link_info)) { link_info.symbolic = TRUE; /* Should we free the unused memory? */ @@ -1603,8 +1602,8 @@ } break; case symbolic_functions: - /* -Bsymbolic-functions is for shared library only. */ - if (bfd_link_dll (&link_info)) + /* -Bsymbolic-functions is for PIC output only. */ + if (bfd_link_pic (&link_info)) command_line.dynamic_list = dynamic_list_data; break; } diff --git a/binutils/opcodes/ChangeLog b/binutils/opcodes/ChangeLog index 726335d..94a6a6b 100644 --- a/binutils/opcodes/ChangeLog +++ b/binutils/opcodes/ChangeLog @@ -1,3 +1,58 @@ +2016-06-29 Tristan Gingold + + * configure: Regenerate. + +2016-06-23 Peter Bergner + + Apply from master. + 2016-06-22 Peter Bergner + + * ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines. + (powerpc_opcodes) : New mnemonics. + : Change to a VX form instruction. + (insert_sh6): Add support for rldixor. + (extract_sh6): Likewise. + +2016-06-03 Peter Bergner + + Backport from master + 2016-06-03 Peter Bergner + + PR binutils/20196 + * ppc-opc.c (powerpc_opcodes ): Enable + opcodes for E6500. + +2016-06-01 Peter Bergner + + Backport from master + 2016-05-26 Peter Bergner + + * ppc-opc.c (CY): New define. Document it. + (powerpc_opcodes) : New mnemonics. + +2016-02-26 Alan Modra + + Apply from master. + 2015-12-12 Alan Modra + PR 19359 + * ppc-opc.c (insert_fxm): Remove "ignored" from error message. + (powerpc_opcodes): Remove single-operand mfcr. + +2016-02-15 H.J. Lu + + Backport from master + 2016-02-15 H.J. Lu + + * i386-dis.c (print_insn): Parenthesize expression to prevent + truncated addresses. + (OP_J): Likewise. + +2016-01-25 Tristan Gingold + + * configure: Regenerate. + 2016-01-25 Tristan Gingold * configure: Regenerate. @@ -810,7 +865,7 @@ 2015-05-11 H.J. Lu - * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit + * i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit direct branch. (jmp): Likewise. * i386-tbl.h: Regenerated. diff --git a/binutils/opcodes/configure b/binutils/opcodes/configure index 3be129b..bdef518 100755 --- a/binutils/opcodes/configure +++ b/binutils/opcodes/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.64 for opcodes 2.26. +# Generated by GNU Autoconf 2.64 for opcodes 2.26.1. # # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software @@ -556,8 +556,8 @@ # Identity of this package. PACKAGE_NAME='opcodes' PACKAGE_TARNAME='opcodes' -PACKAGE_VERSION='2.26' -PACKAGE_STRING='opcodes 2.26' +PACKAGE_VERSION='2.26.1' +PACKAGE_STRING='opcodes 2.26.1' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1319,7 +1319,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures opcodes 2.26 to adapt to many kinds of systems. +\`configure' configures opcodes 2.26.1 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1390,7 +1390,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of opcodes 2.26:";; + short | recursive ) echo "Configuration of opcodes 2.26.1:";; esac cat <<\_ACEOF @@ -1497,7 +1497,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -opcodes configure 2.26 +opcodes configure 2.26.1 generated by GNU Autoconf 2.64 Copyright (C) 2009 Free Software Foundation, Inc. @@ -1907,7 +1907,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by opcodes $as_me 2.26, which was +It was created by opcodes $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was $ $0 $@ @@ -3715,7 +3715,7 @@ # Define the identity of the package. PACKAGE='opcodes' - VERSION='2.26' + VERSION='2.26.1' cat >>confdefs.h <<_ACEOF @@ -13223,7 +13223,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by opcodes $as_me 2.26, which was +This file was extended by opcodes $as_me 2.26.1, which was generated by GNU Autoconf 2.64. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -13287,7 +13287,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_version="\\ -opcodes config.status 2.26 +opcodes config.status 2.26.1 configured by $0, generated by GNU Autoconf 2.64, with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" diff --git a/binutils/opcodes/i386-dis.c b/binutils/opcodes/i386-dis.c index 1b4c51a..3712b59 100644 --- a/binutils/opcodes/i386-dis.c +++ b/binutils/opcodes/i386-dis.c @@ -13644,7 +13644,7 @@ if (op_index[i] != -1 && op_riprel[i]) { (*info->fprintf_func) (info->stream, " # "); - (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep + (*info->print_address_func) ((bfd_vma) (start_pc + (codep - start_codep) + op_address[op_index[i]]), info); break; } @@ -16158,7 +16158,7 @@ the displacement is added! */ mask = 0xffff; if ((prefixes & PREFIX_DATA) == 0) - segment = ((start_pc + codep - start_codep) + segment = ((start_pc + (codep - start_codep)) & ~((bfd_vma) 0xffff)); } if (address_mode != mode_64bit diff --git a/binutils/opcodes/ppc-opc.c b/binutils/opcodes/ppc-opc.c index e8c92f6..21932f8 100644 --- a/binutils/opcodes/ppc-opc.c +++ b/binutils/opcodes/ppc-opc.c @@ -238,7 +238,11 @@ #define BOE BO + 1 { 0x1e, 21, insert_boe, extract_boe, 0 }, -#define BH BOE + 1 + /* The RM field in an X form instruction. */ +#define RM BOE + 1 + { 0x3, 11, NULL, NULL, 0 }, + +#define BH RM + 1 { 0x3, 11, NULL, NULL, PPC_OPERAND_OPTIONAL }, /* The BT field in an X or XL form instruction. */ @@ -778,8 +782,9 @@ #define EVUIMM_8 EVUIMM_4 + 1 { 0xf8, 8, NULL, NULL, PPC_OPERAND_PARENS }, - /* The WS field. */ + /* The WS or DRM field in an X form instruction. */ #define WS EVUIMM_8 + 1 +#define DRM WS { 0x7, 11, NULL, NULL, 0 }, /* PowerPC paired singles extensions. */ @@ -807,7 +812,9 @@ #define X_R A_L { 0x1, 16, NULL, NULL, PPC_OPERAND_OPTIONAL }, + /* The RMC or CY field in a Z23 form instruction. */ #define RMC A_L + 1 +#define CY RMC { 0x3, 9, NULL, NULL, 0 }, #define R RMC + 1 @@ -1434,7 +1441,7 @@ /* A value of -1 means we used the one operand form of mfcr which is valid. */ if (value != -1) - *errmsg = _("ignoring invalid mfcr mask"); + *errmsg = _("invalid mfcr mask"); value = 0; } @@ -2007,7 +2014,11 @@ ppc_cpu_t dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) { - return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4); + /* SH6 operand in the rldixor instructions. */ + if (PPC_OP (insn) == 4) + return insn | ((value & 0x1f) << 6) | ((value & 0x20) >> 5); + else + return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4); } static long @@ -2015,7 +2026,11 @@ ppc_cpu_t dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) { - return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20); + /* SH6 operand in the rldixor instructions. */ + if (PPC_OP (insn) == 4) + return ((insn >> 6) & 0x1f) | ((insn << 5) & 0x20); + else + return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20); } /* The SPR field in an XFX form instruction. This is flipped--the @@ -2598,6 +2613,9 @@ /* A VX form instruction with a VA tertiary opcode. */ #define VXVA(op, xop, vaop) (VX(op,xop) | (((vaop) & 0x1f) << 16)) +#define VXASH(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) +#define VXASH_MASK VXASH (0x3f, 0x1f) + /* An X form instruction. */ #define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) @@ -2634,6 +2652,9 @@ /* A X form instruction for Quad-Precision FP Instructions with RC bit. */ #define XVARC(op, xop, vaop, rc) (XVA ((op), (xop), (vaop)) | ((rc) & 1)) +/* An X form instruction with the RA bits specified as two ops. */ +#define XMMF(op, xop, mop0, mop1) (X ((op), (xop)) | ((mop0) & 3) << 19 | ((mop1) & 7) << 16) + /* A Z form instruction with the RC bit specified. */ #define ZRC(op, xop, rc) (Z ((op), (xop)) | ((rc) & 1)) @@ -2685,6 +2706,9 @@ /* An X form wait instruction with everything filled in except the WC field. */ #define XWC_MASK (XRC (0x3f, 0x3ff, 1) | (7 << 23) | RA_MASK | RB_MASK) + +/* The mask for an XMMF form instruction. */ +#define XMMF_MASK (XMMF (0x3f, 0x3ff, 3, 7) | (1)) /* The mask for a Z form instruction. */ #define Z_MASK ZRC (0x3f, 0x1ff, 1) @@ -3130,6 +3154,7 @@ {"machhwu.", XO (4, 12,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}}, {"ps_muls1", A (4, 13,0), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}}, {"ps_muls1.", A (4, 13,1), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}}, +{"rldixor", VXASH(4,26), VXASH_MASK, POWER9, PPCNONE, {RA, RS, SH6, RB}}, {"ps_madds0", A (4, 14,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, {"ps_madds0.", A (4, 14,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, {"ps_madds1", A (4, 15,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, @@ -3137,6 +3162,7 @@ {"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}}, {"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}}, {"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}}, +{"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}}, {"ps_div", A (4, 18,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, {"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}}, {"ps_div.", A (4, 18,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}}, @@ -3175,6 +3201,8 @@ {"ps_nmadd", A (4, 31,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, {"ps_nmadd.", A (4, 31,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}}, {"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, PPCNONE, {BF, FRA, FRB}}, +{"xor3", VXA(4, 54), VXA_MASK, POWER9, PPCNONE, {RA, RS, RB, RC}}, +{"nandxor", VXA(4, 55), VXA_MASK, POWER9, PPCNONE, {RA, RS, RB, RC}}, {"vpermr", VXA(4, 59), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}}, {"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, {"vaddecuq", VXA(4, 61), VXA_MASK, PPCVEC2, PPCNONE, {VD, VA, VB, VC}}, @@ -4742,8 +4770,7 @@ {"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}}, {"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}}, -{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}}, -{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}}, +{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}}, {"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}}, {"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, @@ -4814,7 +4841,7 @@ {"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}}, {"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}}, -{"lbarx", X(31,52), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, +{"lbarx", X(31,52), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, {"ldux", X(31,53), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}}, @@ -4894,7 +4921,7 @@ {"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}}, {"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}}, -{"lharx", X(31,116), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, +{"lharx", X(31,116), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, {"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}}, @@ -4909,7 +4936,8 @@ {"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}}, -{"setb", X(31,128), XRB_MASK|(3<<16), POWER9, PPCNONE, {RT, BFA}}, +{"setb", VX(31,256), VXVB_MASK|(3<<16), POWER9, PPCNONE, {RT, BFA}}, +{"setbool", VX(31,257), VXVB_MASK, POWER9, PPCNONE, {RT, BA}}, {"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {RS}}, @@ -4959,6 +4987,8 @@ {"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2|PPC476, PPCNONE, {RA, RS}}, +{"brw", X(31,155), XRB_MASK, POWER9, PPCNONE, {RA, RS}}, + {"stdepx", X(31,157), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}}, {"stwepx", X(31,159), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}}, @@ -4970,6 +5000,9 @@ {"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA0, RB}}, {"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}}, +{"addex", ZRC(31,170,0), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}}, +{"addex.", ZRC(31,170,1), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}}, + {"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}}, {"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}}, @@ -4992,6 +5025,8 @@ {"sliq.", XRC(31,184,1), X_MASK, M601, PPCNONE, {RA, RS, SH}}, {"prtyd", X(31,186), XRB_MASK, POWER6|PPCA2, PPCNONE, {RA, RS}}, + +{"brd", X(31,187), XRB_MASK, POWER9, PPCNONE, {RA, RS}}, {"cmprb", X(31,192), XCMP_MASK, POWER9, PPCNONE, {BF, L, RA, RB}}, @@ -5031,6 +5066,8 @@ {"sleq", XRC(31,217,0), X_MASK, M601, PPCNONE, {RA, RS, RB}}, {"sleq.", XRC(31,217,1), X_MASK, M601, PPCNONE, {RA, RS, RB}}, +{"brh", X(31,219), XRB_MASK, POWER9, PPCNONE, {RA, RS}}, + {"stbepx", X(31,223), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA0, RB}}, {"cmpeqb", X(31,224), XCMPL_MASK, POWER9, PPCNONE, {BF, RA, RB}}, @@ -5497,6 +5534,8 @@ {"mtvsrdd", X(31,435), XX1_MASK, PPCVSX3, PPCNONE, {XT6, RA0, RB}}, +{"lwzmx", X(31,437), X_MASK, POWER9, PPCNONE, {RT, RA0, RB}}, + {"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}}, {"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}}, @@ -5939,7 +5978,7 @@ {"tendall.", XRC(31,686,1)|(1<<25), XRTRARB_MASK, PPCHTM, PPCNONE, {0}}, {"tend.", XRC(31,686,1), XRTARARB_MASK, PPCHTM, PPCNONE, {HTM_A}}, -{"stbcx.", XRC(31,694,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}}, +{"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}}, {"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}}, @@ -5971,7 +6010,7 @@ {"stswi", X(31,725), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, NB}}, {"stsi", X(31,725), X_MASK, PWRCOM, PPCNONE, {RS, RA0, NB}}, -{"sthcx.", XRC(31,726,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}}, +{"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}}, {"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}}, @@ -6899,6 +6938,13 @@ {"mffs", XRC(63,583,0), XRARB_MASK, COM, PPCEFS, {FRT}}, {"mffs.", XRC(63,583,1), XRARB_MASK, COM, PPCEFS, {FRT}}, + +{"mffsce", XMMF(63,583,0,1), XMMF_MASK|RB_MASK, POWER9, PPCNONE, {FRT}}, +{"mffscdrn", XMMF(63,583,2,4), XMMF_MASK, POWER9, PPCNONE, {FRT, FRB}}, +{"mffscdrni", XMMF(63,583,2,5), XMMF_MASK|(3<<14), POWER9, PPCNONE, {FRT, DRM}}, +{"mffscrn", XMMF(63,583,2,6), XMMF_MASK, POWER9, PPCNONE, {FRT, FRB}}, +{"mffscrni", XMMF(63,583,2,7), XMMF_MASK|(7<<13), POWER9, PPCNONE, {FRT, RM}}, +{"mffsl", XMMF(63,583,3,0), XMMF_MASK|RB_MASK, POWER9, PPCNONE, {FRT}}, {"dcmpuq", X(63,642), X_MASK, POWER6, PPCNONE, {BF, FRAp, FRBp}}, diff --git a/binutils/binutils/doc/addr2line.1 b/binutils/binutils/doc/addr2line.1 index 8a312d5..f94e214 100644 --- a/binutils/binutils/doc/addr2line.1 +++ b/binutils/binutils/doc/addr2line.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "ADDR2LINE 1" -.TH ADDR2LINE 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH ADDR2LINE 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/ar.1 b/binutils/binutils/doc/ar.1 index fed5051..df9dacb 100644 --- a/binutils/binutils/doc/ar.1 +++ b/binutils/binutils/doc/ar.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "AR 1" -.TH AR 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH AR 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/binutils.info b/binutils/binutils/doc/binutils.info index 6fb8e16..27d74f1 100644 --- a/binutils/binutils/doc/binutils.info +++ b/binutils/binutils/doc/binutils.info @@ -1627,7 +1627,7 @@ `--compress-debug-sections=zlib-gabi' For ELF files, these options control how DWARF debug sections are compressed. `--compress-debug-sections=none' is equivalent to - `--nocompress-debug-sections'. `--compress-debug-sections=zlib' + `--decompress-debug-sections'. `--compress-debug-sections=zlib' and `--compress-debug-sections=zlib-gabi' are equivalent to `--compress-debug-sections'. `--compress-debug-sections=zlib-gnu' compresses DWARF debug sections using zlib. The debug sections diff --git a/binutils/binutils/doc/binutils.texi b/binutils/binutils/doc/binutils.texi index 7dc09c3..2e424ef 100644 --- a/binutils/binutils/doc/binutils.texi +++ b/binutils/binutils/doc/binutils.texi @@ -1872,7 +1872,7 @@ @itemx --compress-debug-sections=zlib-gabi For ELF files, these options control how DWARF debug sections are compressed. @option{--compress-debug-sections=none} is equivalent -to @option{--nocompress-debug-sections}. +to @option{--decompress-debug-sections}. @option{--compress-debug-sections=zlib} and @option{--compress-debug-sections=zlib-gabi} are equivalent to @option{--compress-debug-sections}. diff --git a/binutils/binutils/doc/cxxfilt.man b/binutils/binutils/doc/cxxfilt.man index 635157a..4f9cdbb 100644 --- a/binutils/binutils/doc/cxxfilt.man +++ b/binutils/binutils/doc/cxxfilt.man @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "C++FILT 1" -.TH C++FILT 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH C++FILT 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/dlltool.1 b/binutils/binutils/doc/dlltool.1 index 272d9ac..6590354 100644 --- a/binutils/binutils/doc/dlltool.1 +++ b/binutils/binutils/doc/dlltool.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "DLLTOOL 1" -.TH DLLTOOL 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH DLLTOOL 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/nlmconv.1 b/binutils/binutils/doc/nlmconv.1 index cf4511e..bae36b4 100644 --- a/binutils/binutils/doc/nlmconv.1 +++ b/binutils/binutils/doc/nlmconv.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "NLMCONV 1" -.TH NLMCONV 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH NLMCONV 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/nm.1 b/binutils/binutils/doc/nm.1 index f0b9478..17e58a4 100644 --- a/binutils/binutils/doc/nm.1 +++ b/binutils/binutils/doc/nm.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "NM 1" -.TH NM 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH NM 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/objcopy.1 b/binutils/binutils/doc/objcopy.1 index 9ec54c1..f7feb84 100644 --- a/binutils/binutils/doc/objcopy.1 +++ b/binutils/binutils/doc/objcopy.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "OBJCOPY 1" -.TH OBJCOPY 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH OBJCOPY 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -1070,7 +1070,7 @@ .PD For \s-1ELF\s0 files, these options control how \s-1DWARF\s0 debug sections are compressed. \fB\-\-compress\-debug\-sections=none\fR is equivalent -to \fB\-\-nocompress\-debug\-sections\fR. +to \fB\-\-decompress\-debug\-sections\fR. \&\fB\-\-compress\-debug\-sections=zlib\fR and \&\fB\-\-compress\-debug\-sections=zlib\-gabi\fR are equivalent to \&\fB\-\-compress\-debug\-sections\fR. diff --git a/binutils/binutils/doc/objdump.1 b/binutils/binutils/doc/objdump.1 index a5300e3..b4c1c45 100644 --- a/binutils/binutils/doc/objdump.1 +++ b/binutils/binutils/doc/objdump.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "OBJDUMP 1" -.TH OBJDUMP 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH OBJDUMP 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/ranlib.1 b/binutils/binutils/doc/ranlib.1 index 0408f36..41f5b1e 100644 --- a/binutils/binutils/doc/ranlib.1 +++ b/binutils/binutils/doc/ranlib.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "RANLIB 1" -.TH RANLIB 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH RANLIB 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/readelf.1 b/binutils/binutils/doc/readelf.1 index e4725da..1e4f9fd 100644 --- a/binutils/binutils/doc/readelf.1 +++ b/binutils/binutils/doc/readelf.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "READELF 1" -.TH READELF 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH READELF 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/size.1 b/binutils/binutils/doc/size.1 index 9ed29f6..e170e14 100644 --- a/binutils/binutils/doc/size.1 +++ b/binutils/binutils/doc/size.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "SIZE 1" -.TH SIZE 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH SIZE 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/strings.1 b/binutils/binutils/doc/strings.1 index 07bcb09..ef69493 100644 --- a/binutils/binutils/doc/strings.1 +++ b/binutils/binutils/doc/strings.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "STRINGS 1" -.TH STRINGS 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH STRINGS 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/strip.1 b/binutils/binutils/doc/strip.1 index c77bab5..dc09006 100644 --- a/binutils/binutils/doc/strip.1 +++ b/binutils/binutils/doc/strip.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "STRIP 1" -.TH STRIP 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH STRIP 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/windmc.1 b/binutils/binutils/doc/windmc.1 index dc9d090..e43c4ea 100644 --- a/binutils/binutils/doc/windmc.1 +++ b/binutils/binutils/doc/windmc.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "WINDMC 1" -.TH WINDMC 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH WINDMC 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/doc/windres.1 b/binutils/binutils/doc/windres.1 index 1ee77e1..2b6977b 100644 --- a/binutils/binutils/doc/windres.1 +++ b/binutils/binutils/doc/windres.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "WINDRES 1" -.TH WINDRES 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH WINDRES 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/binutils/binutils/testsuite/ChangeLog b/binutils/binutils/testsuite/ChangeLog index c579c69..52ddadc 100644 --- a/binutils/binutils/testsuite/ChangeLog +++ b/binutils/binutils/testsuite/ChangeLog @@ -90,7 +90,7 @@ * binutils-all/localize-hidden-1.d: Allow for extra symbols in the output. - * binutils-all/strip-11.d: Skip for the RL78. + * binutils-all/strip-11.d: Skip for the RL78. 2015-07-14 H.J. Lu @@ -98,9 +98,9 @@ 2015-07-10 H.J. Lu - PR binutils/18656 - * binutils-all/compress.exp (convert_test): New proc. - Run conversion tests between x86-64 and x32. + PR binutils/18656 + * binutils-all/compress.exp (convert_test): New proc. + Run conversion tests between x86-64 and x32. 2015-07-10 H.J. Lu diff --git a/binutils/gas/config/tc-arc.c b/binutils/gas/config/tc-arc.c index ca43566..1ec01cb 100644 --- a/binutils/gas/config/tc-arc.c +++ b/binutils/gas/config/tc-arc.c @@ -1747,6 +1747,7 @@ case OPTION_RTSC: case OPTION_FPUDA: /* Dummy options. */ + break; default: return 0; diff --git a/binutils/gas/config/tc-i386.c b/binutils/gas/config/tc-i386.c index 1573043..664f381 100644 --- a/binutils/gas/config/tc-i386.c +++ b/binutils/gas/config/tc-i386.c @@ -552,6 +552,10 @@ specified explicitly. */ static int omit_lock_prefix = 0; +/* 1 if the assembler should generate relax relocations. */ +static int generate_relax_relocations + = DEFAULT_GENERATE_X86_RELAX_RELOCATIONS; + static enum check_kind { check_none = 0, @@ -1870,6 +1874,9 @@ if (r->reg_flags & RegRex) nr += 8; + + if (r->reg_flags & RegVRex) + nr += 16; return nr; } @@ -4557,7 +4564,9 @@ && i.op[op].disps->X_op == O_constant) { offsetT value = i.op[op].disps->X_add_number; - int vec_disp8_ok = fits_in_vec_disp8 (value); + int vec_disp8_ok + = (i.disp_encoding != disp_encoding_32bit + && fits_in_vec_disp8 (value)); if (t->operand_types [op].bitfield.vec_disp8) { if (vec_disp8_ok) @@ -7241,9 +7250,14 @@ /* Check for "call/jmp *mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor - instructions. */ - if ((i.rm.mode == 2 - || (i.rm.mode == 0 && i.rm.regmem == 5)) + instructions. Always generate R_386_GOT32X for + "sym*GOT" operand in 32-bit mode. */ + if ((generate_relax_relocations + || (!object_64bit + && i.rm.mode == 0 + && i.rm.regmem == 5)) + && (i.rm.mode == 2 + || (i.rm.mode == 0 && i.rm.regmem == 5)) && ((i.operands == 1 && i.tm.base_opcode == 0xff && (i.rm.reg == 2 || i.rm.reg == 4)) @@ -9616,6 +9630,7 @@ #define OPTION_MSHARED (OPTION_MD_BASE + 21) #define OPTION_MAMD64 (OPTION_MD_BASE + 22) #define OPTION_MINTEL64 (OPTION_MD_BASE + 23) +#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 24) struct option md_longopts[] = { @@ -9647,6 +9662,7 @@ {"mbig-obj", no_argument, NULL, OPTION_MBIG_OBJ}, #endif {"momit-lock-prefix", required_argument, NULL, OPTION_OMIT_LOCK_PREFIX}, + {"mrelax-relocations", required_argument, NULL, OPTION_MRELAX_RELOCATIONS}, {"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG}, {"mamd64", no_argument, NULL, OPTION_MAMD64}, {"mintel64", no_argument, NULL, OPTION_MINTEL64}, @@ -9964,6 +9980,15 @@ omit_lock_prefix = 0; else as_fatal (_("invalid -momit-lock-prefix= option: `%s'"), arg); + break; + + case OPTION_MRELAX_RELOCATIONS: + if (strcasecmp (arg, "yes") == 0) + generate_relax_relocations = 1; + else if (strcasecmp (arg, "no") == 0) + generate_relax_relocations = 0; + else + as_fatal (_("invalid -mrelax-relocations= option: `%s'"), arg); break; case OPTION_MAMD64: @@ -10145,6 +10170,9 @@ fprintf (stream, _("\ -momit-lock-prefix=[no|yes]\n\ strip all lock prefixes\n")); + fprintf (stream, _("\ + -mrelax-relocations=[no|yes]\n\ + generate relax relocations\n")); fprintf (stream, _("\ -mamd64 accept only AMD64 ISA\n")); fprintf (stream, _("\ diff --git a/binutils/gas/config/tc-mips.c b/binutils/gas/config/tc-mips.c index a2d45a4..b99a17c 100644 --- a/binutils/gas/config/tc-mips.c +++ b/binutils/gas/config/tc-mips.c @@ -15506,10 +15506,29 @@ static struct mips_option_stack *mips_opts_stack; -static bfd_boolean +/* Return status for .set/.module option handling. */ + +enum code_option_type +{ + /* Unrecognized option. */ + OPTION_TYPE_BAD = -1, + + /* Ordinary option. */ + OPTION_TYPE_NORMAL, + + /* ISA changing option. */ + OPTION_TYPE_ISA +}; + +/* Handle common .set/.module options. Return status indicating option + type. */ + +static enum code_option_type parse_code_option (char * name) { + bfd_boolean isa_set = FALSE; const struct mips_ase *ase; + if (strncmp (name, "at=", 3) == 0) { char *s = name + 3; @@ -15582,6 +15601,7 @@ { mips_opts.arch = p->cpu; mips_opts.isa = p->isa; + isa_set = TRUE; } } else if (strncmp (name, "mips", 4) == 0) @@ -15595,6 +15615,7 @@ { mips_opts.arch = p->cpu; mips_opts.isa = p->isa; + isa_set = TRUE; } } else @@ -15613,8 +15634,9 @@ else if (strcmp (name, "nosym32") == 0) mips_opts.sym32 = FALSE; else - return FALSE; - return TRUE; + return OPTION_TYPE_BAD; + + return isa_set ? OPTION_TYPE_ISA : OPTION_TYPE_NORMAL; } /* Handle the .set pseudo-op. */ @@ -15622,8 +15644,8 @@ static void s_mipsset (int x ATTRIBUTE_UNUSED) { + enum code_option_type type = OPTION_TYPE_NORMAL; char *name = input_line_pointer, ch; - int prev_isa = mips_opts.isa; file_mips_check_options (); @@ -15699,13 +15721,17 @@ mips_opts_stack = s->next; free (s); } + } + else + { + type = parse_code_option (name); + if (type == OPTION_TYPE_BAD) + as_warn (_("tried to set unrecognized symbol: %s\n"), name); } - else if (!parse_code_option (name)) - as_warn (_("tried to set unrecognized symbol: %s\n"), name); /* The use of .set [arch|cpu]= historically 'fixes' the width of gp and fp registers based on what is supported by the arch/cpu. */ - if (mips_opts.isa != prev_isa) + if (type == OPTION_TYPE_ISA) { switch (mips_opts.isa) { @@ -15772,7 +15798,7 @@ if (!file_mips_opts_checked) { - if (!parse_code_option (name)) + if (parse_code_option (name) == OPTION_TYPE_BAD) as_bad (_(".module used with unrecognized symbol: %s\n"), name); /* Update module level settings from mips_opts. */ diff --git a/binutils/gas/doc/as.1 b/binutils/gas/doc/as.1 index 8ea59af..32c06c5 100644 --- a/binutils/gas/doc/as.1 +++ b/binutils/gas/doc/as.1 @@ -133,7 +133,7 @@ .\" ======================================================================== .\" .IX Title "AS 1" -.TH AS 1 "2016-01-25" "binutils-2.26" "GNU Development Tools" +.TH AS 1 "2016-06-29" "binutils-2.26.1" "GNU Development Tools" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -1274,6 +1274,19 @@ \&\fB\-momit\-lock\-prefix=\fR\fIyes\fR will omit all lock prefixes. \&\fB\-momit\-lock\-prefix=\fR\fIno\fR will encode lock prefix as usual, which is the default. +.IP "\fB\-mrelax\-relocations=\fR\fIno\fR" 4 +.IX Item "-mrelax-relocations=no" +.PD 0 +.IP "\fB\-mrelax\-relocations=\fR\fIyes\fR" 4 +.IX Item "-mrelax-relocations=yes" +.PD +These options control whether the assembler should generate relax +relocations, R_386_GOT32X, in 32\-bit mode, or R_X86_64_GOTPCRELX and +R_X86_64_REX_GOTPCRELX, in 64\-bit mode. +\&\fB\-mrelax\-relocations=\fR\fIyes\fR will generate relax relocations. +\&\fB\-mrelax\-relocations=\fR\fIno\fR will not generate relax +relocations. The default can be controlled by a configure option +\&\fB\-\-enable\-x86\-relax\-relocations\fR. .IP "\fB\-mevexrcig=\fR\fIrne\fR" 4 .IX Item "-mevexrcig=rne" .PD 0 diff --git a/binutils/gas/doc/as.info b/binutils/gas/doc/as.info index a52195a..5e399ab 100644 --- a/binutils/gas/doc/as.info +++ b/binutils/gas/doc/as.info @@ -10710,6 +10710,16 @@ omit all lock prefixes. `-momit-lock-prefix=NO' will encode lock prefix as usual, which is the default. +`-mrelax-relocations=NO' +`-mrelax-relocations=YES' + These options control whether the assembler should generate relax + relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX + and R_X86_64_REX_GOTPCRELX, in 64-bit mode. + `-mrelax-relocations=YES' will generate relax relocations. + `-mrelax-relocations=NO' will not generate relax relocations. The + default can be controlled by a configure option + `--enable-x86-relax-relocations'. + `-mevexrcig=RNE' `-mevexrcig=RD' `-mevexrcig=RU' @@ -24009,11 +24019,11 @@ * #: Comments. (line 33) * #APP: Preprocessing. (line 27) * #NO_APP: Preprocessing. (line 27) -* $ in symbol names <1>: D10V-Chars. (line 53) -* $ in symbol names <2>: Meta-Chars. (line 10) -* $ in symbol names <3>: SH64-Chars. (line 15) -* $ in symbol names <4>: SH-Chars. (line 15) -* $ in symbol names: D30V-Chars. (line 70) +* $ in symbol names <1>: SH64-Chars. (line 15) +* $ in symbol names <2>: SH-Chars. (line 15) +* $ in symbol names <3>: D30V-Chars. (line 70) +* $ in symbol names <4>: Meta-Chars. (line 10) +* $ in symbol names: D10V-Chars. (line 53) * $a: ARM Mapping Symbols. (line 9) * $acos math builtin, TIC54X: TIC54X-Builtins. (line 10) * $asin math builtin, TIC54X: TIC54X-Builtins. (line 13) @@ -24198,8 +24208,8 @@ * -EL option, TILE-Gx: TILE-Gx Options. (line 11) * -f: f. (line 6) * -F command line option, Alpha: Alpha Options. (line 57) -* -g command line option, Alpha: Alpha Options. (line 47) * -G command line option, Alpha: Alpha Options. (line 53) +* -g command line option, Alpha: Alpha Options. (line 47) * -G option (MIPS): MIPS Options. (line 8) * -h option, VAX/VMS: VAX-Opts. (line 45) * -H option, VAX/VMS: VAX-Opts. (line 81) @@ -24271,7 +24281,7 @@ * -mall-enabled command line option, LM32: LM32 Options. (line 30) * -mall-extensions: PDP-11-Options. (line 26) * -mall-opcodes command line option, AVR: AVR Options. (line 109) -* -mamd64 option, x86-64: i386-Options. (line 165) +* -mamd64 option, x86-64: i386-Options. (line 175) * -mapcs-26 command line option, ARM: ARM Options. (line 134) * -mapcs-32 command line option, ARM: ARM Options. (line 134) * -mapcs-float command line option, ARM: ARM Options. (line 148) @@ -24317,8 +24327,8 @@ * -mesa option, s390: s390 Options. (line 17) * -mevexlig= option, i386: i386-Options. (line 94) * -mevexlig= option, x86-64: i386-Options. (line 94) -* -mevexrcig= option, i386: i386-Options. (line 155) -* -mevexrcig= option, x86-64: i386-Options. (line 155) +* -mevexrcig= option, i386: i386-Options. (line 165) +* -mevexrcig= option, x86-64: i386-Options. (line 165) * -mevexwig= option, i386: i386-Options. (line 104) * -mevexwig= option, x86-64: i386-Options. (line 104) * -mf option, far-mode: TIC54X-Opts. (line 8) @@ -24337,7 +24347,7 @@ * -micache-enabled command line option, LM32: LM32 Options. (line 21) * -mimplicit-it command line option, ARM: ARM Options. (line 118) * -mint-register: RX-Opts. (line 57) -* -mintel64 option, x86-64: i386-Options. (line 165) +* -mintel64 option, x86-64: i386-Options. (line 175) * -mip2022 option, IP2K: IP2K-Opts. (line 14) * -mip2022ext option, IP2022: IP2K-Opts. (line 9) * -mj11: PDP-11-Options. (line 126) @@ -24356,10 +24366,10 @@ * -mlimited-eis: PDP-11-Options. (line 64) * -mlink-relax command line option, AVR: AVR Options. (line 121) * -mlittle-endian: RX-Opts. (line 26) -* -mlong <1>: XGATE-Opts. (line 13) -* -mlong: M68HC11-Opts. (line 45) -* -mlong-double <1>: XGATE-Opts. (line 21) -* -mlong-double: M68HC11-Opts. (line 53) +* -mlong <1>: M68HC11-Opts. (line 45) +* -mlong: XGATE-Opts. (line 13) +* -mlong-double <1>: M68HC11-Opts. (line 53) +* -mlong-double: XGATE-Opts. (line 21) * -mm9s12x: M68HC11-Opts. (line 27) * -mm9s12xg: M68HC11-Opts. (line 32) * -mmcu= command line option, AVR: AVR Options. (line 6) @@ -24409,6 +24419,8 @@ * -mpid= command line option, TIC6X: TIC6X Options. (line 23) * -mregnames option, s390: s390 Options. (line 33) * -mrelax command line option, V850: V850 Options. (line 72) +* -mrelax-relocations= option, i386: i386-Options. (line 155) +* -mrelax-relocations= option, x86-64: i386-Options. (line 155) * -mrh850-abi command line option, V850: V850 Options. (line 82) * -mrmw command line option, AVR: AVR Options. (line 118) * -mrx-abi: RX-Opts. (line 69) @@ -24474,8 +24486,8 @@ * -relax command line option, Alpha: Alpha Options. (line 32) * -replace command line option, Alpha: Alpha Options. (line 40) * -S, ignored on VAX: VAX-Opts. (line 11) -* -t, ignored on VAX: VAX-Opts. (line 36) * -T, ignored on VAX: VAX-Opts. (line 11) +* -t, ignored on VAX: VAX-Opts. (line 36) * -v: v. (line 6) * -V, redundant on VAX: VAX-Opts. (line 22) * -version: v. (line 6) @@ -25243,8 +25255,8 @@ * float directive, XGATE: XGATE-Float. (line 10) * floating point numbers: Flonums. (line 6) * floating point numbers (double): Double. (line 6) -* floating point numbers (single) <1>: Float. (line 6) -* floating point numbers (single): Single. (line 6) +* floating point numbers (single) <1>: Single. (line 6) +* floating point numbers (single): Float. (line 6) * floating point, AArch64 (IEEE): AArch64 Floating Point. (line 6) * floating point, Alpha (IEEE): Alpha Floating Point. @@ -25468,7 +25480,7 @@ * Interrupt Vector Base address, ARC: ARC-Regs. (line 67) * invalid input: Bug Criteria. (line 14) * invocation summary: Overview. (line 6) -* IP2K architecture options: IP2K-Opts. (line 14) +* IP2K architecture options: IP2K-Opts. (line 9) * IP2K line comment character: IP2K-Chars. (line 6) * IP2K line separator: IP2K-Chars. (line 14) * IP2K options: IP2K-Opts. (line 6) @@ -25496,8 +25508,8 @@ * label (:): Statements. (line 31) * label directive, TIC54X: TIC54X-Directives. (line 123) * labels: Labels. (line 6) -* lcomm directive <1>: Lcomm. (line 6) -* lcomm directive: ARC Directives. (line 9) +* lcomm directive <1>: ARC Directives. (line 9) +* lcomm directive: Lcomm. (line 6) * lcomm directive, COFF: i386-Directives. (line 6) * lcommon directive: ARC Directives. (line 24) * ld: Object. (line 15) @@ -26227,11 +26239,11 @@ * section directive, V850: V850 Directives. (line 9) * section name substitution: Section. (line 80) * section override prefixes, i386: i386-Prefixes. (line 23) -* Section Stack <1>: PopSection. (line 6) -* Section Stack <2>: Previous. (line 6) -* Section Stack <3>: PushSection. (line 6) +* Section Stack <1>: PushSection. (line 6) +* Section Stack <2>: Section. (line 71) +* Section Stack <3>: Previous. (line 6) * Section Stack <4>: SubSection. (line 6) -* Section Stack: Section. (line 71) +* Section Stack: PopSection. (line 6) * section-relative addressing: Secs Background. (line 68) * sections: Sections. (line 6) * sections in messages, internal: As Sections. (line 6) @@ -26417,17 +26429,17 @@ * symbol attributes, SOM: SOM Symbols. (line 6) * symbol descriptor, COFF: Desc. (line 6) * symbol modifiers <1>: M32C-Modifiers. (line 11) -* symbol modifiers <2>: LM32-Modifiers. (line 12) +* symbol modifiers <2>: M68HC11-Modifiers. (line 12) * symbol modifiers <3>: AVR-Modifiers. (line 12) -* symbol modifiers: M68HC11-Modifiers. (line 12) +* symbol modifiers: LM32-Modifiers. (line 12) * symbol modifiers, TILE-Gx: TILE-Gx Modifiers. (line 6) * symbol modifiers, TILEPro: TILEPro Modifiers. (line 6) * symbol names: Symbol Names. (line 6) -* symbol names, $ in <1>: Meta-Chars. (line 10) -* symbol names, $ in <2>: D30V-Chars. (line 70) -* symbol names, $ in <3>: D10V-Chars. (line 53) -* symbol names, $ in <4>: SH-Chars. (line 15) -* symbol names, $ in: SH64-Chars. (line 15) +* symbol names, $ in <1>: D30V-Chars. (line 70) +* symbol names, $ in <2>: SH64-Chars. (line 15) +* symbol names, $ in <3>: Meta-Chars. (line 10) +* symbol names, $ in <4>: D10V-Chars. (line 53) +* symbol names, $ in: SH-Chars. (line 15) * symbol names, local: Symbol Names. (line 30) * symbol names, temporary: Symbol Names. (line 43) * symbol prefix character, ARC: ARC-Chars. (line 20) @@ -26458,8 +26470,8 @@ * syntax, D30V: D30V-Syntax. (line 6) * syntax, LM32: LM32-Modifiers. (line 6) * syntax, M680x0: M68K-Syntax. (line 8) -* syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6) -* syntax, M68HC11: M68HC11-Syntax. (line 6) +* syntax, M68HC11 <1>: M68HC11-Syntax. (line 6) +* syntax, M68HC11: M68HC11-Modifiers. (line 6) * syntax, machine-independent: Syntax. (line 6) * syntax, RL78: RL78-Modifiers. (line 6) * syntax, RX: RX-Modifiers. (line 6) @@ -26472,7 +26484,7 @@ * tab (\t): Strings. (line 27) * tab directive, TIC54X: TIC54X-Directives. (line 247) * tag directive: Tag. (line 6) -* tag directive, TIC54X: TIC54X-Directives. (line 250) +* tag directive, TIC54X: TIC54X-Directives. (line 216) * TBM, i386: i386-TBM. (line 6) * TBM, x86-64: i386-TBM. (line 6) * tdaoff pseudo-op, V850: V850 Opcodes. (line 81) @@ -26576,9 +26588,9 @@ * versions of symbols: Symver. (line 6) * Virtualization instruction generation override: MIPS ASE Instruction Generation Overrides. (line 47) -* visibility <1>: Internal. (line 6) -* visibility <2>: Protected. (line 6) -* visibility: Hidden. (line 6) +* visibility <1>: Protected. (line 6) +* visibility <2>: Hidden. (line 6) +* visibility: Internal. (line 6) * Visium line comment character: Visium Characters. (line 6) * Visium line separator: Visium Characters. (line 14) * Visium options: Visium Options. (line 6) @@ -26991,348 +27003,348 @@ Node: ESA/390 Opcodes376912 Node: i386-Dependent377174 Node: i386-Options378504 -Node: i386-Directives385840 -Node: i386-Syntax386578 -Node: i386-Variations386883 -Node: i386-Chars389424 -Node: i386-Mnemonics390153 -Node: i386-Regs393517 -Node: i386-Prefixes395562 -Node: i386-Memory398322 -Node: i386-Jumps401259 -Node: i386-Float402380 -Node: i386-SIMD404209 -Node: i386-LWP405318 -Node: i386-BMI406152 -Node: i386-TBM406530 -Node: i386-16bit407060 -Node: i386-Arch409131 -Node: i386-Bugs412249 -Node: i386-Notes413003 -Node: i860-Dependent413861 -Node: Notes-i860414301 -Node: Options-i860415206 -Node: Directives-i860416569 -Node: Opcodes for i860417638 -Node: Syntax of i860419828 -Node: i860-Chars420012 -Node: i960-Dependent420571 -Node: Options-i960421018 -Node: Floating Point-i960424903 -Node: Directives-i960425171 -Node: Opcodes for i960427205 -Node: callj-i960427845 -Node: Compare-and-branch-i960428334 -Node: Syntax of i960430238 -Node: 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Directives637326 +Node: s390 Floating Point642769 +Node: SCORE-Dependent643215 +Node: SCORE-Opts643517 +Node: SCORE-Pseudo644805 +Node: SCORE-Syntax646882 +Node: SCORE-Chars647064 +Node: SH-Dependent647622 +Node: SH Options648033 +Node: SH Syntax649088 +Node: SH-Chars649361 +Node: SH-Regs649904 +Node: SH-Addressing650518 +Node: SH Floating Point651427 +Node: SH Directives652521 +Node: SH Opcodes652922 +Node: SH64-Dependent657244 +Node: SH64 Options657606 +Node: SH64 Syntax659403 +Node: SH64-Chars659686 +Node: SH64-Regs660235 +Node: SH64-Addressing661331 +Node: SH64 Directives662514 +Node: SH64 Opcodes663499 +Node: Sparc-Dependent664215 +Node: Sparc-Opts664626 +Node: Sparc-Aligned-Data669640 +Node: Sparc-Syntax670472 +Node: Sparc-Chars671046 +Node: Sparc-Regs671609 +Node: Sparc-Constants677093 +Node: Sparc-Relocs681853 +Node: Sparc-Size-Translations686989 +Node: Sparc-Float688638 +Node: Sparc-Directives688833 +Node: TIC54X-Dependent690793 +Node: TIC54X-Opts691556 +Node: TIC54X-Block692599 +Node: TIC54X-Env692959 +Node: TIC54X-Constants693307 +Node: TIC54X-Subsyms693709 +Node: TIC54X-Locals695618 +Node: TIC54X-Builtins696362 +Node: TIC54X-Ext698833 +Node: TIC54X-Directives699404 +Node: TIC54X-Macros710305 +Node: TIC54X-MMRegs712416 +Node: TIC54X-Syntax712654 +Node: TIC54X-Chars712844 +Node: TIC6X-Dependent713535 +Node: TIC6X Options713838 +Node: TIC6X Syntax715839 +Node: TIC6X Directives716941 +Node: TILE-Gx-Dependent719226 +Node: TILE-Gx Options719536 +Node: TILE-Gx Syntax719886 +Node: TILE-Gx Opcodes722120 +Node: TILE-Gx Registers722408 +Node: TILE-Gx Modifiers723180 +Node: TILE-Gx Directives728152 +Node: TILEPro-Dependent729056 +Node: TILEPro Options729365 +Node: TILEPro Syntax729549 +Node: TILEPro Opcodes731783 +Node: TILEPro Registers732074 +Node: TILEPro Modifiers732844 +Node: TILEPro Directives737609 +Node: V850-Dependent738513 +Node: V850 Options738909 +Node: V850 Syntax743189 +Node: V850-Chars743429 +Node: V850-Regs743973 +Node: V850 Floating Point745541 +Node: V850 Directives745747 +Node: V850 Opcodes747814 +Node: Vax-Dependent753706 +Node: VAX-Opts754290 +Node: VAX-float758025 +Node: VAX-directives758657 +Node: VAX-opcodes759518 +Node: VAX-branch759907 +Node: VAX-operands762414 +Node: VAX-no763177 +Node: VAX-Syntax763433 +Node: VAX-Chars763599 +Node: Visium-Dependent764153 +Node: Visium Options764460 +Node: Visium Syntax764926 +Node: Visium Characters765171 +Node: Visium Registers765752 +Node: Visium Opcodes766024 +Node: XGATE-Dependent766450 +Node: XGATE-Opts766872 +Node: XGATE-Syntax767863 +Node: XGATE-Directives769942 +Node: XGATE-Float770181 +Node: XGATE-opcodes770678 +Node: XSTORMY16-Dependent770790 +Node: XStormy16 Syntax771136 +Node: XStormy16-Chars771326 +Node: XStormy16 Directives771939 +Node: XStormy16 Opcodes772594 +Node: Xtensa-Dependent773650 +Node: Xtensa Options774384 +Node: Xtensa Syntax778655 +Node: Xtensa Opcodes780799 +Node: Xtensa Registers782593 +Node: Xtensa Optimizations783226 +Node: Density Instructions783678 +Node: Xtensa Automatic Alignment784780 +Node: Xtensa Relaxation787227 +Node: Xtensa Branch Relaxation788192 +Node: Xtensa Call Relaxation789564 +Node: Xtensa Jump Relaxation791345 +Node: Xtensa Immediate Relaxation793445 +Node: Xtensa Directives796019 +Node: Schedule Directive797728 +Node: Longcalls Directive798068 +Node: Transform Directive798612 +Node: Literal Directive799354 +Ref: Literal Directive-Footnote-1802893 +Node: Literal Position Directive803035 +Node: Literal Prefix Directive804734 +Node: Absolute Literals Directive805632 +Node: Z80-Dependent806939 +Node: Z80 Options807327 +Node: Z80 Syntax808750 +Node: Z80-Chars809422 +Node: Z80-Regs810272 +Node: Z80-Case810624 +Node: Z80 Floating Point811069 +Node: Z80 Directives811263 +Node: Z80 Opcodes812888 +Node: Z8000-Dependent814232 +Node: Z8000 Options815171 +Node: Z8000 Syntax815388 +Node: Z8000-Chars815678 +Node: Z8000-Regs816160 +Node: Z8000-Addressing816950 +Node: Z8000 Directives818067 +Node: Z8000 Opcodes819676 +Node: Reporting Bugs829618 +Node: Bug Criteria830344 +Node: Bug Reporting831111 +Node: Acknowledgements837760 +Ref: Acknowledgements-Footnote-1842725 +Node: GNU Free Documentation License842751 +Node: AS Index867920  End Tag Table diff --git a/binutils/gas/doc/c-i386.texi b/binutils/gas/doc/c-i386.texi index 4af05e3..7eb1fbc 100644 --- a/binutils/gas/doc/c-i386.texi +++ b/binutils/gas/doc/c-i386.texi @@ -327,6 +327,18 @@ @option{-momit-lock-prefix=@var{no}} will encode lock prefix as usual, which is the default. +@cindex @samp{-mrelax-relocations=} option, i386 +@cindex @samp{-mrelax-relocations=} option, x86-64 +@item -mrelax-relocations=@var{no} +@itemx -mrelax-relocations=@var{yes} +These options control whether the assembler should generate relax +relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX and +R_X86_64_REX_GOTPCRELX, in 64-bit mode. +@option{-mrelax-relocations=@var{yes}} will generate relax relocations. +@option{-mrelax-relocations=@var{no}} will not generate relax +relocations. The default can be controlled by a configure option +@option{--enable-x86-relax-relocations}. + @cindex @samp{-mevexrcig=} option, i386 @cindex @samp{-mevexrcig=} option, x86-64 @item -mevexrcig=@var{rne} diff --git a/binutils/gas/testsuite/ChangeLog b/binutils/gas/testsuite/ChangeLog index 4c86c8c..2c01d7b 100644 --- a/binutils/gas/testsuite/ChangeLog +++ b/binutils/gas/testsuite/ChangeLog @@ -15,6 +15,13 @@ * gas/arm/armv8-a.d: : Rename mismatched mnemonics ... : ... to this. +2015-12-17 Ramana Radhakrishnan + + * gas/arm/armv8a-automatic-hlt.d: New test. + * gas/arm/armv8a-automatic-hlt.s: New test. + * gas/arm/armv8a-automatic-lda.d: New test. + * gas/arm/armv8a-automatic-lda.s: New test. + 2015-12-15 Matthew Wahab * gas/aarch64/advsimd-fp16.d: Update expected output. @@ -153,7 +160,7 @@ Apply from master. 2015-11-19 Alan Modra * gas/ppc/altivec3.d: Allow for padding at end of section. - * gas/testsuite/gas/ppc/power9.d: Likewise. + * gas/ppc/power9.d: Likewise. 2015-12-09 H.J. Lu @@ -207,8 +214,8 @@ 2015-10-28 Andre Vieira - * gas/arm/pinsn.s: New. - * gas/arm/pinsn.d: Likewise. + * gas/arm/pinsn.s: New. + * gas/arm/pinsn.d: Likewise. 2015-10-27 Nick Clifton @@ -385,8 +392,8 @@ 2015-10-02 Renlin Li - * gas/aarch64/reloc-tlsgd_g0_nc.d: New. - * gas/aarch64/reloc-tlsgd_g0_nc.s: New. + * gas/aarch64/reloc-tlsgd_g0_nc.d: New. + * gas/aarch64/reloc-tlsgd_g0_nc.s: New. 2015-10-02 Renlin Li @@ -958,9 +965,7 @@ 2015-05-28 Catherine Moore Bernd Schmidt - gas/testsuite/ * gas/mips/mips.exp: Run new tests. - * gas/mips/compact-eh-1.s: New file. * gas/mips/compact-eh-2.s: New file. * gas/mips/compact-eh-3.s: New file. diff --git a/binutils/include/aout/ChangeLog b/binutils/include/aout/ChangeLog index 790763b..7caa35b 100644 --- a/binutils/include/aout/ChangeLog +++ b/binutils/include/aout/ChangeLog @@ -6,6 +6,10 @@ Update copyright years. +2012-12-17 Nick Clifton + + * hppa.h: Add copyright notice. + 2010-04-15 Nick Clifton * adobe.h: Update copyright notice to use GPLv3. diff --git a/binutils/include/elf/ChangeLog b/binutils/include/elf/ChangeLog index 3c6eddc..c10e95e 100644 --- a/binutils/include/elf/ChangeLog +++ b/binutils/include/elf/ChangeLog @@ -58,6 +58,18 @@ * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define. +2015-07-16 Jiong Wang + + * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration. + +2015-07-09 Catherine Moore + + * mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. + +2015-07-08 Pitchumani Sivanupandi + + * avr.h: Add new 32 bit PC relative relocation. + 2015-07-01 Sandra Loosemore Cesar Philippidis @@ -80,12 +92,20 @@ Cesar Philippidis * nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. + +2015-06-26 Matthew Fortune + + * mips.h (DT_MIPS_RLD_MAP_REL): New macro. 2015-05-29 Roland McGrath * common.h (GNU_ABI_TAG_SYLLABLE): New macro. (GNU_ABI_TAG_NACL): New macro. +2015-05-12 Jiong Wang + + * aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration. + 2015-05-11 H.J. Lu * common.h (EM_486): Renamed to ... @@ -132,7 +152,12 @@ * rl78.h (E_FLAG_RL78_G10): Redefine. (E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13 E_FLAG_RL78_G14): New flags. + +2015-03-10 Matthew Wahab + PR ld/16572 + * arm.h (EF_ARM_HASENTRY): Remove. + 2015-02-19 Marcus Shawcroft * aarch64.h (R_AARCH64_P32_TLSGD_ADR_PREL21): Add. @@ -187,7 +212,16 @@ 2014-11-13 H.J. Lu * x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete. + +2014-10-30 Andrew Pinski + + * mips.h (AFL_EXT_OCTEON3): Define. + (INSN_OCTEON3, CPU_OCTEON3): Define. +2014-10-22 Matthew Fortune + + * mips.h (AFL_ASE_MASK): Define. + 2014-10-17 Jose E. Marchesi * sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved. @@ -226,6 +260,28 @@ 2014-08-26 DJ Delorie * rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits + +2014-07-29 Matthew Fortune + + * mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. + (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. + (Val_GNU_MIPS_ABI_FP_64): Redefine. + (Val_GNU_MIPS_ABI_FP_XX): Define. + (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. + (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. + (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. + (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. + (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. + (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. + (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. + (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. + (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. + (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. + (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. + (AFL_EXT_LOONGSON_2F): Likewise. + (bfd_mips_elf_swap_abiflags_v0_in): Prototype. + (bfd_mips_elf_swap_abiflags_v0_out): Likewise. + (bfd_mips_isa_ext): Likewise. 2014-07-07 Barney Stratford @@ -252,6 +308,10 @@ * openrisc.h: Delete. * or32.h: Delete. +2014-04-10 Senthil Kumar Selvaraj + + * avr.h: Add new DIFF relocs. + 2014-03-05 Alan Modra Update copyright years. @@ -394,7 +454,11 @@ (EM_INTEL207): Likewise. (EM_INTEL208): Likewise. (EM_INTEL209): Likewise. + +2013-05-06 Paul Brook + * mips.h (R_MIPS_PC32): Update comment. + 2013-05-02 Nick Clifton * msp430.h: Add MSP430X relocs. @@ -442,6 +506,10 @@ * mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. + +2012-12-11 Edgar E. Iglesias + + * microblaze.h: Add TLS relocs to START_RELOC_NUMBERS 2012-11-16 H.J. Lu @@ -477,13 +545,17 @@ 2012-10-30 Steve McIntyre - * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. + * arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. (EF_ARM_ABI_FLOAT_HARD): Likewise. 2012-10-23 Tom Tromey * common.h (NT_SIGINFO, NT_FILE): New defines. +2012-09-12 Chris Schlumberger-Socha + + * aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. + 2012-08-27 Walter Lee * tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation. @@ -501,6 +573,11 @@ (R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto. +2012-08-24 Matthew Gretton-Dann + + * arm.h (TAG_CPU_ARCH_V8): New define. + (MAX_TAG_CPU_ARCH): Update. + 2012-08-13 Ian Bolton Laurent Desnogues Jim MacArthur @@ -515,7 +592,15 @@ * aarch64.h: New file. * common.h (EM_res183): Rename to EM_AARCH64. (EM_res184): Rename to EM_ARM184. + +2012-08-02 Sean Keys + * m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200 + +2012-07-13 Andreas Krebbel + + * s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc. + 2012-06-28 Iain Sandoe * common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE, @@ -565,7 +650,7 @@ 2012-05-11 Georg-Johann Lay @@ -577,6 +662,10 @@ * sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto, pause, and compare-and-branch instructions. +2012-04-12 David S. Miller + + * sparc.h (R_SPARC_WDISP10): New reloc. + 2012-03-07 Nick Clifton * mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD, @@ -1096,13 +1185,13 @@ 2009-08-09 Michael Eager - * elf/common.h: Define EM_resnnn reserved values. Add EM_AVR32, + * common.h: Define EM_resnnn reserved values. Add EM_AVR32, EM_STM8, EM_TILE64, EM_TILEPRO. Change EM_MICROBLAZE. 2009-08-06 Michael Eager - * elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. - * elf/microblaze.h: New reloc definitions. + * common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. + * microblaze.h: New reloc definitions. 2009-07-30 Alan Modra @@ -1171,7 +1260,7 @@ 2009-04-24 Cary Coutant - * dwarf2.h (DW_LNE_set_discriminator): New enum value. + * dwarf2.h (DW_LNE_set_discriminator): New enum value. 2009-04-15 Anthony Green @@ -1302,12 +1391,22 @@ (R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD) (R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL) (R_CRIS_16_TPREL): New relocations. + +2008-09-24 Richard Henderson + * dwarf2.h (DW_OP_GNU_encoded_addr): New. + 2008-08-20 Bob Wilson * xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG) (R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC) (R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New. + +2008-08-08 Anatoly Sokolov + + * avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, + E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. + (EF_AVR_MACH): Redefine to 0x7F. 2008-08-08 Richard Sandiford Daniel Jacobowitz @@ -1328,6 +1427,18 @@ 2008-07-21 Luis Machado * common.h: Define NT_PPC_VSX. + +2008-07-12 Jie Zhang + + Revert + 2008-07-12 Jie Zhang + * bfin.h (EF_BFIN_CODE_IN_L1): Define. + (EF_BFIN_DATA_IN_L1): Define. + +2008-07-12 Jie Zhang + + * bfin.h (EF_BFIN_CODE_IN_L1): Define. + (EF_BFIN_DATA_IN_L1): Define. 2008-07-10 Richard Sandiford @@ -1366,7 +1477,7 @@ 2008-04-16 David S. Miller - * elf/sparc.h (R_SPARC_GOTDATA_HIX22, + * sparc.h (R_SPARC_GOTDATA_HIX22, R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22, R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP, R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs. @@ -1689,6 +1800,7 @@ 2006-05-24 Carlos O'Donell Randolph Chung + * hppa.h (R_PARISC_TLS_GD21L, R_PARISC_TLS_GD14R, R_PARISC_TLS_GDCALL, R_PARISC_TLS_LDM21L, R_PARISC_TLS_LDM14R, R_PARISC_TLS_LDMCALL, R_PARISC_TLS_LDO21L, R_PARISC_TLS_LDO14R, R_PARISC_TLS_DTPMOD32, diff --git a/binutils/include/gdb/ChangeLog b/binutils/include/gdb/ChangeLog index 57a83ce..5a3ecee 100644 --- a/binutils/include/gdb/ChangeLog +++ b/binutils/include/gdb/ChangeLog @@ -51,9 +51,13 @@ * section-scripts.h: New file. +2013-10-22 Sterling Augustine + + * gdb-index.h: Merge from gdb tree. + 2013-03-15 Steve Ellcey - * gdb/remote-sim.h (sim_command_completer): Make char arguments const. + * remote-sim.h (sim_command_completer): Make char arguments const. 2013-01-01 Joel Brobecker @@ -218,7 +222,7 @@ 2003-06-10 Corinna Vinschen - * gdb/fileio.h: New file. + * fileio.h: New file. 2003-05-07 Andrew Cagney @@ -256,7 +260,7 @@ 2002-07-29 Andrey Volkov * sim-h8300.h: Rename all enums from H8300_ to SIM_H8300_ - prefix. + prefix. 2002-07-23 Andrey Volkov diff --git a/binutils/include/opcode/ChangeLog b/binutils/include/opcode/ChangeLog index 0aee194..87d4653 100644 --- a/binutils/include/opcode/ChangeLog +++ b/binutils/include/opcode/ChangeLog @@ -95,10 +95,10 @@ * aarch64.h [__cplusplus]: Wrap in extern "C". 2015-10-07 Claudiu Zissulescu - Cupertino Miranda + Cupertino Miranda - * arc-func.h: New file. - * arc.h: Likewise. + * arc-func.h: New file. + * arc.h: Likewise. 2015-10-02 Yao Qi @@ -114,7 +114,11 @@ * s390.h (S390_INSTR_FLAG_HTM): New flag. (S390_INSTR_FLAG_VX): New flag. (S390_INSTR_FLAG_FACILITY_MASK): New flag mask. + +2015-09-26 James Bowman + * ft32.h: Add instruction macros FT32_*() + 2015-09-23 Nick Clifton * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left @@ -257,7 +261,15 @@ * nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete. (NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. (NIOS2_INSN_OPTARG): Renumber. + +2014-11-21 Terry Guo + * arm.h (FPU_VFP_EXT_ARMV8xD): New macro. + (FPU_VFP_V5D16): Likewise. + (FPU_VFP_V5_SP_D16): Likewise. + (FPU_ARCH_VFP_V5D16): Likewise. + (FPU_ARCH_VFP_V5_SP_D16): Likewise. + 2014-11-06 Sandra Loosemore * nios2.h (nios2_find_opcode_hash): Add mach parameter to @@ -347,7 +359,7 @@ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, - +I, +O, +R, +:, +\, +", +; + +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. @@ -424,7 +436,11 @@ 2014-05-01 Richard Sandiford * mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values. + +2014-04-23 Andrew Bennett + * mips.h (ASE_XPA): New define. + 2014-04-22 Christian Svensson * or32.h: Delete. @@ -471,6 +487,11 @@ * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. (aarch64_sys_reg_writeonly_p): Ditto. + +2013-11-11 Catherine Moore + + * mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... + (INSN_LOAD_MEMORY): ...this. 2013-11-05 Yufeng Zhang @@ -514,6 +535,11 @@ * mips.h (OP_OPTIONAL_REG): New mips_operand_type. (mips_optional_operand_p): New function. +2013-08-05 Eric Botcazou + Konrad Eisele + + * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON. + 2013-08-04 Jürgen Urban Richard Sandiford @@ -676,6 +702,21 @@ 2013-06-12 Sandra Loosemore * nios2.h (OP_MATCH_ERET): Correct eret encoding. + +2013-06-08 Catherine Moore + + * mips.h (mips_opcode): Add ase field. + (INSN_ASE_MASK): Delete. + (INSN_DSP): Rename to ASE_DSP. Provide new value. + (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value. + (INSN_MCU): Rename to ASE_MCU. Provide new value. + (INSN_MDMX): Rename to ASE_MDMX. Provide new value. + (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value. + (INSN_MT): Rename to ASE_MT. Provide new value. + (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value. + (INSN_VIRT): Rename to ASE_VIRT. Provide new value. + (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value. + (opcode_is_member): Add ase argument. Check ase. 2013-05-22 Jürgen Urban @@ -740,7 +781,21 @@ encode the opcodes in the same way as TI assembler does. * tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp and rsqrdp opcodes to use the new field coding types. + +2013-03-12 Sebastian Huber + + * nios2.h: Edit comment. + +2013-03-11 Sebastian Huber + + * nios2.h (OPX_WRPRS): New define. + (OP_MATCH_WRPRS): Likewise. +2013-03-11 Sebastian Huber + + * nios2.h (OP_RDPRS): New define. + (OP_MATCH_RDPRS): Likewise. + 2013-03-11 Kyrylo Tkachov * arm.h (CRC_EXT_ARMV8): New constant. @@ -797,6 +852,10 @@ * cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c (make_instruction,match_opcode): Added function prototypes. (cr16_words,cr16_allWords,cr16_currInsn): Declare as extern. + +2012-12-17 Nick Clifton + + * tahoe.h: Add copyright notice. 2012-11-23 Alan Modra @@ -811,10 +870,36 @@ * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12. +2012-09-27 Anthony Green + + * moxie.h (MOXIE_BAD): New define. + 2012-09-04 Sergey A. Guriev * ia64.h (ia64_opnd): Add new operand types. +2012-08-24 Matthew Gretton-Dann + + * arm.h (ARM_CPU_IS_ANY): New define. + +2012-08-24 Matthew Gretton-Dann + + * arm.h (ARM_EXT_V8): New define. + (FPU_VFP_EXT_ARMV8): Likewise. + (FPU_NEON_EXT_ARMV8): Likewise. + (FPU_CRYPTO_EXT_ARMV8): Likewise. + (ARM_AEXT_V8A): Likewise. + (FPU_VFP_ARMV8): Likwise. + (FPU_NEON_ARMV8): Likewise. + (FPU_CRYPTO_ARMV8): Likewise. + (FPU_ARCH_VFP_ARMV8): Likewise. + (FPU_ARCH_NEON_VFP_ARMV8): Likewise. + (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. + (ARM_ARCH_V8A): Likwise. + (ARM_ARCH_V8A_FP): Likewise. + (ARM_ARCH_V8A_SIMD): Likewise. + (ARM_ARCH_V8A_CRYPTO): Likewise. + 2012-08-21 David S. Miller * sparc.h (F3F4): New macro. @@ -858,6 +943,10 @@ 2012-07-06 Maciej W. Rozycki * mips.h: Fix a typo in description. + +2012-07-05 Sean Keys + + * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON. 2012-06-07 Georg-Johann Lay @@ -906,6 +995,10 @@ HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE, HWCAP_CBCOND, HWCAP_CRC32): New defines. +2012-04-12 David S. Miller + + * sparc.h: Define '=' as generating R_SPARC_WDISP10. + 2012-03-10 Edmar Wienskoski * ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. @@ -1274,7 +1367,15 @@ * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_. (CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise. + +2010-09-29 Bernd Schmidt + + * tic6x-control-registers.h (tscl): Now read_write. + +2010-09-27 Andreas Krebbel + * s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. + 2010-09-23 Matthew Gretton-Dann * arm.h (ARM_EXT_VIRT): New define. @@ -1305,7 +1406,17 @@ 2010-09-21 Mike Frysinger * bfin.h: Strip trailing whitespace. + +2009-09-04 Jie Zhang + * bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp. + (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define. + (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, + PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask): + Adjust accordingly. + (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and + PseudoDbg_Assert_grp_mask. + 2010-07-29 DJ Delorie * rx.h (RX_Operand_Type): Add TwoReg. @@ -1358,7 +1469,7 @@ 2010-05-26 Catherine Moore - * opcode/mips.h (INSN_MIPS16): Remove. + * mips.h (INSN_MIPS16): Remove. 2010-04-21 Joseph Myers @@ -1428,7 +1539,7 @@ 2010-02-08 Philipp Tomsich - * opcode/ppc.h (PPC_OPCODE_TITAN): Define. + * ppc.h (PPC_OPCODE_TITAN): Define. 2010-01-14 H.J. Lu @@ -1552,7 +1663,7 @@ 2009-01-28 Doug Evans - * opcode/i386.h: Add multiple inclusion protection. + * i386.h: Add multiple inclusion protection. (EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM) (EDI_REG_NUM): New macros. (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros. @@ -1582,6 +1693,14 @@ * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. + +2008-08-08 Anatoly Sokolov + + * avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. + (AVR_ISA_AVR3): Redefine. + (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, + AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, + AVR_ISA_AVR6): Define. 2008-08-01 Peter Bergner @@ -2039,7 +2158,7 @@ 2005-07-28 John David Anglin PR gas/336 - * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb + * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb and pitlb. 2005-07-27 Jan Beulich diff --git a/binutils/ld/emultempl/elf32.em b/binutils/ld/emultempl/elf32.em index 0405d4f..809b27c 100644 --- a/binutils/ld/emultempl/elf32.em +++ b/binutils/ld/emultempl/elf32.em @@ -1946,25 +1946,32 @@ return os; } + flags = s->flags; + if (!bfd_link_relocatable (&link_info)) + { + nexts = s; + while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) + != NULL) + if (nexts->output_section == NULL + && (nexts->flags & SEC_EXCLUDE) == 0 + && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 + && (nexts->owner->flags & DYNAMIC) == 0 + && nexts->owner->usrdata != NULL + && !(((lang_input_statement_type *) nexts->owner->usrdata) + ->flags.just_syms) + && _bfd_elf_match_sections_by_type (nexts->owner, nexts, + s->owner, s)) + flags = (((flags ^ SEC_READONLY) + | (nexts->flags ^ SEC_READONLY)) + ^ SEC_READONLY); + } + /* Decide which segment the section should go in based on the section name and section flags. We put loadable .note sections right after the .interp section, so that the PT_NOTE segment is stored right after the program headers where the OS can read it in the first page. */ - flags = s->flags; - nexts = s; - while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL) - if (nexts->output_section == NULL - && (nexts->flags & SEC_EXCLUDE) == 0 - && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 - && (nexts->owner->flags & DYNAMIC) == 0 - && nexts->owner->usrdata != NULL - && !(((lang_input_statement_type *) nexts->owner->usrdata) - ->flags.just_syms) - && _bfd_elf_match_sections_by_type (nexts->owner, nexts, s->owner, s)) - flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) - ^ SEC_READONLY); place = NULL; if ((flags & (SEC_ALLOC | SEC_DEBUGGING)) == 0) place = &hold[orphan_nonalloc]; diff --git a/binutils/ld/emultempl/mmo.em b/binutils/ld/emultempl/mmo.em index 8949aed..3a382ec 100644 --- a/binutils/ld/emultempl/mmo.em +++ b/binutils/ld/emultempl/mmo.em @@ -107,22 +107,28 @@ return os; } + flags = s->flags; + if (!bfd_link_relocatable (&link_info)) + { + nexts = s; + while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) + != NULL) + if (nexts->output_section == NULL + && (nexts->flags & SEC_EXCLUDE) == 0 + && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 + && (nexts->owner->flags & DYNAMIC) == 0 + && nexts->owner->usrdata != NULL + && !(((lang_input_statement_type *) nexts->owner->usrdata) + ->flags.just_syms)) + flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) + ^ SEC_READONLY); + } + /* Check for matching section type flags for sections we care about. A section without contents can have SEC_LOAD == 0, but we still want it attached to a sane section so the symbols appear as expected. */ - flags = s->flags; - nexts = s; - while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL) - if (nexts->output_section == NULL - && (nexts->flags & SEC_EXCLUDE) == 0 - && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 - && (nexts->owner->flags & DYNAMIC) == 0 - && nexts->owner->usrdata != NULL - && !(((lang_input_statement_type *) nexts->owner->usrdata) - ->flags.just_syms)) - flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) - ^ SEC_READONLY); + if ((flags & (SEC_ALLOC | SEC_READONLY)) != SEC_READONLY) for (i = 0; i < sizeof (holds) / sizeof (holds[0]); i++) if ((flags & holds[i].nonzero_flags) != 0) diff --git a/binutils/ld/emultempl/pe.em b/binutils/ld/emultempl/pe.em index 0370c5a..bddd9a8 100644 --- a/binutils/ld/emultempl/pe.em +++ b/binutils/ld/emultempl/pe.em @@ -2225,21 +2225,27 @@ orphan_init_done = 1; } + flags = s->flags; + if (!bfd_link_relocatable (&link_info)) + { + nexts = s; + while ((nexts = bfd_get_next_section_by_name (nexts->owner, + nexts))) + if (nexts->output_section == NULL + && (nexts->flags & SEC_EXCLUDE) == 0 + && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 + && (nexts->owner->flags & DYNAMIC) == 0 + && nexts->owner->usrdata != NULL + && !(((lang_input_statement_type *) nexts->owner->usrdata) + ->flags.just_syms)) + flags = (((flags ^ SEC_READONLY) + | (nexts->flags ^ SEC_READONLY)) + ^ SEC_READONLY); + } + /* Try to put the new output section in a reasonable place based on the section name and section flags. */ - flags = s->flags; - nexts = s; - while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))) - if (nexts->output_section == NULL - && (nexts->flags & SEC_EXCLUDE) == 0 - && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 - && (nexts->owner->flags & DYNAMIC) == 0 - && nexts->owner->usrdata != NULL - && !(((lang_input_statement_type *) nexts->owner->usrdata) - ->flags.just_syms)) - flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) - ^ SEC_READONLY); place = NULL; if ((flags & SEC_ALLOC) == 0) ; diff --git a/binutils/ld/emultempl/pep.em b/binutils/ld/emultempl/pep.em index 91de501..5ddeffc 100644 --- a/binutils/ld/emultempl/pep.em +++ b/binutils/ld/emultempl/pep.em @@ -1996,21 +1996,27 @@ orphan_init_done = 1; } + flags = s->flags; + if (!bfd_link_relocatable (&link_info)) + { + nexts = s; + while ((nexts = bfd_get_next_section_by_name (nexts->owner, + nexts))) + if (nexts->output_section == NULL + && (nexts->flags & SEC_EXCLUDE) == 0 + && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 + && (nexts->owner->flags & DYNAMIC) == 0 + && nexts->owner->usrdata != NULL + && !(((lang_input_statement_type *) nexts->owner->usrdata) + ->flags.just_syms)) + flags = (((flags ^ SEC_READONLY) + | (nexts->flags ^ SEC_READONLY)) + ^ SEC_READONLY); + } + /* Try to put the new output section in a reasonable place based on the section name and section flags. */ - flags = s->flags; - nexts = s; - while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))) - if (nexts->output_section == NULL - && (nexts->flags & SEC_EXCLUDE) == 0 - && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 - && (nexts->owner->flags & DYNAMIC) == 0 - && nexts->owner->usrdata != NULL - && !(((lang_input_statement_type *) nexts->owner->usrdata) - ->flags.just_syms)) - flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) - ^ SEC_READONLY); place = NULL; if ((flags & SEC_ALLOC) == 0) ; diff --git a/binutils/ld/testsuite/ChangeLog b/binutils/ld/testsuite/ChangeLog index cb51928..d09a332 100644 --- a/binutils/ld/testsuite/ChangeLog +++ b/binutils/ld/testsuite/ChangeLog @@ -117,13 +117,13 @@ * ld-x86-64/plt-main3.rd: Also check GOTPCRELX. 2015-10-29 Catherine Moore - - * ld-mips-elf/mips16-fp-stub-1.s: New. - * ld-mips-elf/mips16-fp-stub-2.s: New. - * ld-mips-elf/mips16-fp-stub.d: New. - * ld-mips-elf/mips-elf.exp: Run new tests. - * ld-mips-elf/mips16-intermix.d: Update expected output. + * ld-mips-elf/mips16-fp-stub-1.s: New. + * ld-mips-elf/mips16-fp-stub-2.s: New. + * ld-mips-elf/mips16-fp-stub.d: New. + * ld-mips-elf/mips-elf.exp: Run new tests. + * ld-mips-elf/mips16-intermix.d: Update expected output. + 2015-10-28 H.J. Lu PR ld/19162 @@ -133,7 +133,7 @@ * ld-x86-64/pr19162b.s: Likewise. 2015-10-27 Laurent Alfonsi - Christophe Monat + Christophe Monat * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX tests. @@ -1069,7 +1069,6 @@ 2015-05-28 Catherine Moore - ld/testsuite/ * ld-mips-elf/compact-eh.ld: New linker script. * ld-mips-elf/compact-eh1.d: New. * ld-mips-elf/compact-eh1.s: New. diff --git a/binutils/binutils/testsuite/binutils-all/ar.exp b/binutils/binutils/testsuite/binutils-all/ar.exp index 4c33874..e971350 100644 --- a/binutils/binutils/testsuite/binutils-all/ar.exp +++ b/binutils/binutils/testsuite/binutils-all/ar.exp @@ -555,6 +555,45 @@ pass $testname } +# PR 19775: Test creating and listing archives with an empty element. + +proc empty_archive { } { + global AR + global srcdir + global subdir + + set testname "archive with empty element" + + # FIXME: There ought to be a way to dynamically create an empty file. + set empty $srcdir/$subdir/empty + + if [is_remote host] { + set archive artest.a + set objfile [remote_download host $empty] + remote_file host delete $archive + } else { + set archive tmpdir/artest.a + set objfile $empty + } + + remote_file build delete tmpdir/artest.a + + set got [binutils_run $AR "-r -c $archive ${objfile}"] + if ![string match "" $got] { + fail $testname + return + } + + # This commmand used to fail with: "Malformed archive". + set got [binutils_run $AR "-t $archive"] + if ![string match "empty " $got] { + fail $testname + return + } + + pass $testname +} + # Run the tests. # Only run the bfdtest checks if the programs exist. Since these @@ -574,6 +613,7 @@ deterministic_archive delete_an_element move_an_element +empty_archive if { [is_elf_format] && ![istarget "*-*-hpux*"] diff --git a/binutils/binutils/testsuite/binutils-all/compress.exp b/binutils/binutils/testsuite/binutils-all/compress.exp index 4dac503..ac24812 100644 --- a/binutils/binutils/testsuite/binutils-all/compress.exp +++ b/binutils/binutils/testsuite/binutils-all/compress.exp @@ -667,4 +667,97 @@ set testname "Convert x32 object to x86-64 (3)" convert_test "$testname" "--nocompress-debug-sections --x32" "-O elf64-x86-64 --compress-debug-sections=zlib-gnu" - } +} + +proc test_gnu_debuglink {} { + global srcdir + global subdir + global env + global CC_FOR_TARGET + global STRIP + global OBJCOPY + global OBJDUMP + + set test "gnu-debuglink" + if {![info exists CC_FOR_TARGET]} { + set CC_FOR_TARGET $env(CC) + } + if { $CC_FOR_TARGET == "" } { + unsupported $test + return + } + + if { [target_compile $srcdir/$subdir/testprog.c tmpdir/testprog exectuable debug] != "" } { + fail "$test (build)" + return + } + set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.dump"] + if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { + fail "$test (objcopy dump)" + return + } + if { [binutils_run $STRIP "--strip-debug --remove-section=.comment --remove-section=.note tmpdir/testprog -o tmpdir/testprog.strip"] != "" } { + fail "$test (strip)" + return + } + if { [binutils_run $OBJCOPY "--only-keep-debug --decompress-debug-sections tmpdir/testprog tmpdir/testprog.decompress"] != "" } { + fail "$test (objcopy decompress)" + return + } + if { [binutils_run $OBJCOPY "--only-keep-debug --compress-debug-sections tmpdir/testprog tmpdir/testprog.compress"] != "" } { + fail "$test (objcopy compress)" + return + } + if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.decompress tmpdir/testprog.strip tmpdir/testprog"] != "" } { + fail "$test (objcopy link decompress)" + return + } + set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.decompress.dump"] + if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { + fail "$test (objcopy dump decompress)" + return + } + if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.compress tmpdir/testprog.strip tmpdir/testprog"] != "" } { + fail "$test (objcopy link compress)" + return + } + set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.compress.dump"] + if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { + fail "$test (objcopy dump compress)" + return + } + + set src1 tmpdir/testprog.dump + set src2 tmpdir/testprog.compress.dump + send_log "cmp ${src1} ${src2}\n" + verbose "cmp ${src1} ${src2}" + set status [remote_exec build cmp "${src1} ${src2}"] + set exec_output [lindex $status 1] + set exec_output [prune_warnings $exec_output] + if ![string match "" $exec_output] then { + send_log "$exec_output\n" + verbose "$exec_output" 1 + fail "$test (objdump 1)" + } else { + pass "$test (objdump 1)" + } + + set src1 tmpdir/testprog.decompress.dump + set src2 tmpdir/testprog.compress.dump + send_log "cmp ${src1} ${src2}\n" + verbose "cmp ${src1} ${src2}" + set status [remote_exec build cmp "${src1} ${src2}"] + set exec_output [lindex $status 1] + set exec_output [prune_warnings $exec_output] + if ![string match "" $exec_output] then { + send_log "$exec_output\n" + verbose "$exec_output" 1 + fail "$test (objdump 2)" + } else { + pass "$test (objdump 2)" + } +} + +if {[isnative] && [is_elf_format]} then { + test_gnu_debuglink +} diff --git a/binutils/binutils/testsuite/binutils-all/empty b/binutils/binutils/testsuite/binutils-all/empty new file mode 100644 index 0000000..e69de29 100644 --- /dev/null +++ b/binutils/binutils/testsuite/binutils-all/empty diff --git a/binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp b/binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp index 0e5b31e..576cc65 100644 --- a/binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp +++ b/binutils/ld/testsuite/ld-aarch64/aarch64-elf.exp @@ -170,7 +170,6 @@ run_dump_test "limit-b" run_dump_test "limit-bl" -run_dump_test "farcall-section" run_dump_test "farcall-back" run_dump_test "farcall-b-defsym" run_dump_test "farcall-bl-defsym" @@ -181,6 +180,8 @@ run_dump_test "farcall-b" run_dump_test "farcall-b-none-function" run_dump_test "farcall-bl-none-function" +run_dump_test "farcall-b-section" +run_dump_test "farcall-bl-section" run_dump_test "tls-relax-all" run_dump_test "tls-relax-gd-le" diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d b/binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d index 34a6568..ba2981f 100644 --- a/binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d +++ b/binutils/ld/testsuite/ld-aarch64/farcall-b-none-function.d @@ -1,5 +1,24 @@ #name: aarch64-farcall-b-none-function #source: farcall-b-none-function.s #as: #ld: -Ttext 0x1000 --section-start .foo=0x8001000 -#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar'.* +#objdump: -dr +#... + +Disassembly of section .text: + +.* <_start>: + 1000: 14000003 b 100c <__bar_veneer> + 1004: d65f03c0 ret + 1008: 14000007 b 1024 <__bar_veneer\+0x18> + +.* <__bar_veneer>: + 100c: 90040010 adrp x16, 8001000 + 1010: 91000210 add x16, x16, #0x0 + 1014: d61f0200 br x16 + ... + +Disassembly of section .foo: + +.* : + 8001000: d65f03c0 ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-b-section.d b/binutils/ld/testsuite/ld-aarch64/farcall-b-section.d new file mode 100644 index 0000000..4745c0f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-aarch64/farcall-b-section.d @@ -1,0 +1,34 @@ +#name: aarch64-farcall-b-section +#source: farcall-b-section.s +#as: +#ld: -Ttext 0x1000 --section-start .foo=0x8001000 +#objdump: -dr +#... + +Disassembly of section .text: + +.* <_start>: + 1000: 14000008 b 1020 <___veneer> + 1004: 14000003 b 1010 <___veneer> + 1008: d65f03c0 ret + 100c: 1400000d b 1040 <___veneer\+0x20> + +.* <___veneer>: + 1010: 90040010 adrp x16, 8001000 + 1014: 91001210 add x16, x16, #0x4 + 1018: d61f0200 br x16 + 101c: 00000000 .inst 0x00000000 ; undefined + +.* <___veneer>: + 1020: 90040010 adrp x16, 8001000 + 1024: 91000210 add x16, x16, #0x0 + 1028: d61f0200 br x16 + ... + +Disassembly of section .foo: + +.* : + 8001000: d65f03c0 ret + +.* : + 8001004: d65f03c0 ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-b-section.s b/binutils/ld/testsuite/ld-aarch64/farcall-b-section.s new file mode 100644 index 0000000..1a135ef 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-aarch64/farcall-b-section.s @@ -1,0 +1,20 @@ +.global _start + +# We will place the section .text at 0x1000. + + .text + +_start: + b bar + b bar2 + ret + +# We will place the section .foo at 0x8001000. + + .section .foo, "xa" + .type bar, @function +bar: + ret + .type bar2, @function +bar2: + ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d b/binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d index 6ce9ca4..b6a4dda 100644 --- a/binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d +++ b/binutils/ld/testsuite/ld-aarch64/farcall-bl-none-function.d @@ -1,5 +1,24 @@ #name: aarch64-farcall-bl-none-function #source: farcall-bl-none-function.s #as: #ld: -Ttext 0x1000 --section-start .foo=0x8001000 -#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against symbol `bar'.* +#objdump: -dr +#... + +Disassembly of section .text: + +.* <_start>: + 1000: 94000003 bl 100c <__bar_veneer> + 1004: d65f03c0 ret + 1008: 14000007 b 1024 <__bar_veneer\+0x18> + +.* <__bar_veneer>: + 100c: 90040010 adrp x16, 8001000 + 1010: 91000210 add x16, x16, #0x0 + 1014: d61f0200 br x16 + ... + +Disassembly of section .foo: + +.* : + 8001000: d65f03c0 ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.d b/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.d new file mode 100644 index 0000000..2bd4f85 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.d @@ -1,0 +1,34 @@ +#name: aarch64-farcall-bl-section +#source: farcall-bl-section.s +#as: +#ld: -Ttext 0x1000 --section-start .foo=0x8001000 +#objdump: -dr +#... + +Disassembly of section .text: + +.* <_start>: + 1000: 94000008 bl 1020 <___veneer> + 1004: 94000003 bl 1010 <___veneer> + 1008: d65f03c0 ret + 100c: 1400000d b 1040 <___veneer\+0x20> + +.* <___veneer>: + 1010: 90040010 adrp x16, 8001000 + 1014: 91001210 add x16, x16, #0x4 + 1018: d61f0200 br x16 + 101c: 00000000 .inst 0x00000000 ; undefined + +.* <___veneer>: + 1020: 90040010 adrp x16, 8001000 + 1024: 91000210 add x16, x16, #0x0 + 1028: d61f0200 br x16 + ... + +Disassembly of section .foo: + +.* : + 8001000: d65f03c0 ret + +.* : + 8001004: d65f03c0 ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.s b/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.s new file mode 100644 index 0000000..4469d4d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-aarch64/farcall-bl-section.s @@ -1,0 +1,20 @@ + .global _start + +# We will place the section .text at 0x1000. + + .text + +_start: + bl bar + bl bar2 + ret + +# We will place the section .foo at 0x8001000. + + .section .foo, "xa" + .type bar, @function +bar: + ret + .type bar2, @function +bar2: + ret diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-section.d b/binutils/ld/testsuite/ld-aarch64/farcall-section.d deleted file mode 100644 index 85775e1..0000000 100644 --- a/binutils/ld/testsuite/ld-aarch64/farcall-section.d +++ /dev/null @@ -1,5 +1,0 @@ -#name: Aarch64 farcall to symbol of type STT_SECTION -#source: farcall-section.s -#as: -#ld: -Ttext 0x1000 --section-start .foo=0x8001014 -#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against `.foo' diff --git a/binutils/ld/testsuite/ld-aarch64/farcall-section.s b/binutils/ld/testsuite/ld-aarch64/farcall-section.s deleted file mode 100644 index 86a070c..0000000 100644 --- a/binutils/ld/testsuite/ld-aarch64/farcall-section.s +++ /dev/null @@ -1,19 +1,0 @@ -# Test to ensure that an Aarch64 call exceeding 128MB generates an error -# if the destination is of type STT_SECTION (eg non-global symbol) - - .global _start - -# We will place the section .text at 0x1000. - - .text - -_start: - bl bar - -# We will place the section .foo at 0x8001020. - - .section .foo, "xa" - -bar: - ret - diff --git a/binutils/ld/testsuite/ld-arm/arm-elf.exp b/binutils/ld/testsuite/ld-arm/arm-elf.exp index 1d9b1c8..73e1a6b 100644 --- a/binutils/ld/testsuite/ld-arm/arm-elf.exp +++ b/binutils/ld/testsuite/ld-arm/arm-elf.exp @@ -167,10 +167,14 @@ "-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm.s} {{objdump -dr stm32l4xx-fix-vldm.d}} "stm32l4xx-fix-vldm"} + {"STM32L4XX erratum fix VLDM, DP registers" + "-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm-dp.s} + {{objdump -dr stm32l4xx-fix-vldm-dp.d}} + "stm32l4xx-fix-vldm-dp"} {"STM32L4XX erratum fix ALL" "-EL --fix-stm32l4xx-629360=all -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-all.s} {{objdump -dr stm32l4xx-fix-all.d}} - "stm32l4xx-fix-vldm-all"} + "stm32l4xx-fix-all"} {"STM32L4XX erratum fix in IT context" "-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-it-block.s} {{objdump -dr stm32l4xx-fix-it-block.d}} diff --git a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d index 59f3ed1..c67f95d 100644 --- a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d +++ b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.d @@ -6,37 +6,37 @@ 00008000 <__stm32l4xx_veneer_0>: 8000: e899 01fe ldmia\.w r9, {r1, r2, r3, r4, r5, r6, r7, r8} - 8004: f000 b84a b\.w 809c <__stm32l4xx_veneer_0_r> + 8004: f000 b86e b\.w 80e4 <__stm32l4xx_veneer_0_r> 8008: f7f0 a000 udf\.w #0 800c: f7f0 a000 udf\.w #0 00008010 <__stm32l4xx_veneer_1>: 8010: e8b9 01fe ldmia\.w r9!, {r1, r2, r3, r4, r5, r6, r7, r8} - 8014: f000 b844 b\.w 80a0 <__stm32l4xx_veneer_1_r> + 8014: f000 b868 b\.w 80e8 <__stm32l4xx_veneer_1_r> 8018: f7f0 a000 udf\.w #0 801c: f7f0 a000 udf\.w #0 00008020 <__stm32l4xx_veneer_2>: 8020: e919 01fe ldmdb r9, {r1, r2, r3, r4, r5, r6, r7, r8} - 8024: f000 b83e b\.w 80a4 <__stm32l4xx_veneer_2_r> + 8024: f000 b862 b\.w 80ec <__stm32l4xx_veneer_2_r> 8028: f7f0 a000 udf\.w #0 802c: f7f0 a000 udf\.w #0 00008030 <__stm32l4xx_veneer_3>: 8030: e939 01fe ldmdb r9!, {r1, r2, r3, r4, r5, r6, r7, r8} - 8034: f000 b838 b\.w 80a8 <__stm32l4xx_veneer_3_r> + 8034: f000 b85c b\.w 80f0 <__stm32l4xx_veneer_3_r> 8038: f7f0 a000 udf\.w #0 803c: f7f0 a000 udf\.w #0 00008040 <__stm32l4xx_veneer_4>: 8040: e8bd 01fe ldmia\.w sp!, {r1, r2, r3, r4, r5, r6, r7, r8} - 8044: f000 b832 b\.w 80ac <__stm32l4xx_veneer_4_r> + 8044: f000 b856 b\.w 80f4 <__stm32l4xx_veneer_4_r> 8048: f7f0 a000 udf\.w #0 804c: f7f0 a000 udf\.w #0 00008050 <__stm32l4xx_veneer_5>: 8050: ecd9 0a08 vldmia r9, {s1-s8} - 8054: f000 b82c b\.w 80b0 <__stm32l4xx_veneer_5_r> + 8054: f000 b850 b\.w 80f8 <__stm32l4xx_veneer_5_r> 8058: f7f0 a000 udf\.w #0 805c: f7f0 a000 udf\.w #0 8060: f7f0 a000 udf\.w #0 @@ -44,7 +44,7 @@ 00008068 <__stm32l4xx_veneer_6>: 8068: ecf6 4a08 vldmia r6!, {s9-s16} - 806c: f000 b822 b\.w 80b4 <__stm32l4xx_veneer_6_r> + 806c: f000 b846 b\.w 80fc <__stm32l4xx_veneer_6_r> 8070: f7f0 a000 udf\.w #0 8074: f7f0 a000 udf\.w #0 8078: f7f0 a000 udf\.w #0 @@ -52,32 +52,65 @@ 00008080 <__stm32l4xx_veneer_7>: 8080: ecfd 0a08 vpop {s1-s8} - 8084: f000 b818 b\.w 80b8 <__stm32l4xx_veneer_7_r> + 8084: f000 b83c b\.w 8100 <__stm32l4xx_veneer_7_r> 8088: f7f0 a000 udf\.w #0 808c: f7f0 a000 udf\.w #0 8090: f7f0 a000 udf\.w #0 8094: f7f0 a000 udf\.w #0 -00008098 <_start>: - 8098: f7ff bfb2 b\.w 8000 <__stm32l4xx_veneer_0> +00008098 <__stm32l4xx_veneer_8>: + 8098: ec99 1b08 vldmia r9, {d1-d4} + 809c: f000 b832 b\.w 8104 <__stm32l4xx_veneer_8_r> + 80a0: f7f0 a000 udf\.w #0 + 80a4: f7f0 a000 udf\.w #0 + 80a8: f7f0 a000 udf\.w #0 + 80ac: f7f0 a000 udf\.w #0 + +000080b0 <__stm32l4xx_veneer_9>: + 80b0: ecb6 8b08 vldmia r6!, {d8-d11} + 80b4: f000 b828 b\.w 8108 <__stm32l4xx_veneer_9_r> + 80b8: f7f0 a000 udf\.w #0 + 80bc: f7f0 a000 udf\.w #0 + 80c0: f7f0 a000 udf\.w #0 + 80c4: f7f0 a000 udf\.w #0 + +000080c8 <__stm32l4xx_veneer_a>: + 80c8: ecbd 1b08 vpop {d1-d4} + 80cc: f000 b81e b\.w 810c <__stm32l4xx_veneer_a_r> + 80d0: f7f0 a000 udf\.w #0 + 80d4: f7f0 a000 udf\.w #0 + 80d8: f7f0 a000 udf\.w #0 + 80dc: f7f0 a000 udf\.w #0 + +000080e0 <_start>: + 80e0: f7ff bf8e b\.w 8000 <__stm32l4xx_veneer_0> + +000080e4 <__stm32l4xx_veneer_0_r>: + 80e4: f7ff bf94 b\.w 8010 <__stm32l4xx_veneer_1> + +000080e8 <__stm32l4xx_veneer_1_r>: + 80e8: f7ff bf9a b\.w 8020 <__stm32l4xx_veneer_2> + +000080ec <__stm32l4xx_veneer_2_r>: + 80ec: f7ff bfa0 b\.w 8030 <__stm32l4xx_veneer_3> + +000080f0 <__stm32l4xx_veneer_3_r>: + 80f0: f7ff bfa6 b\.w 8040 <__stm32l4xx_veneer_4> + +000080f4 <__stm32l4xx_veneer_4_r>: + 80f4: f7ff bfac b\.w 8050 <__stm32l4xx_veneer_5> + +000080f8 <__stm32l4xx_veneer_5_r>: + 80f8: f7ff bfb6 b\.w 8068 <__stm32l4xx_veneer_6> + +000080fc <__stm32l4xx_veneer_6_r>: + 80fc: f7ff bfc0 b\.w 8080 <__stm32l4xx_veneer_7> + +00008100 <__stm32l4xx_veneer_7_r>: + 8100: f7ff bfca b\.w 8098 <__stm32l4xx_veneer_8> -0000809c <__stm32l4xx_veneer_0_r>: - 809c: f7ff bfb8 b\.w 8010 <__stm32l4xx_veneer_1> +00008104 <__stm32l4xx_veneer_8_r>: + 8104: f7ff bfd4 b\.w 80b0 <__stm32l4xx_veneer_9> -000080a0 <__stm32l4xx_veneer_1_r>: - 80a0: f7ff bfbe b\.w 8020 <__stm32l4xx_veneer_2> - -000080a4 <__stm32l4xx_veneer_2_r>: - 80a4: f7ff bfc4 b\.w 8030 <__stm32l4xx_veneer_3> - -000080a8 <__stm32l4xx_veneer_3_r>: - 80a8: f7ff bfca b\.w 8040 <__stm32l4xx_veneer_4> - -000080ac <__stm32l4xx_veneer_4_r>: - 80ac: f7ff bfd0 b\.w 8050 <__stm32l4xx_veneer_5> - -000080b0 <__stm32l4xx_veneer_5_r>: - 80b0: f7ff bfda b\.w 8068 <__stm32l4xx_veneer_6> - -000080b4 <__stm32l4xx_veneer_6_r>: - 80b4: f7ff bfe4 b\.w 8080 <__stm32l4xx_veneer_7> +00008108 <__stm32l4xx_veneer_9_r>: + 8108: f7ff bfde b\.w 80c8 <__stm32l4xx_veneer_a> diff --git a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s index 0c18266..580e5b2 100644 --- a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s +++ b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-all.s @@ -20,3 +20,6 @@ vldm r9, {s1-s8} vldm r6!, {s9-s16} vpop {s1-s8} + vldm r9, {d1-d4} + vldm r6!, {d8-d11} + vpop {d1-d4} diff --git a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d new file mode 100644 index 0000000..cd7de14 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d @@ -1,0 +1,49 @@ + +.*: file format elf32-littlearm.* + + +Disassembly of section \.text: + +00008000 <__stm32l4xx_veneer_0>: + 8000: ecba 1b08 vldmia sl!, {d1-d4} + 8004: ecba 5b08 vldmia sl!, {d5-d8} + 8008: ecba 9b08 vldmia sl!, {d9-d12} + 800c: ecba db06 vldmia sl!, {d13-d15} + 8010: f1aa 0a78 sub\.w sl, sl, #120 ; 0x78 + 8014: f000 b826 b\.w 8064 <__stm32l4xx_veneer_0_r> + +00008018 <__stm32l4xx_veneer_1>: + 8018: ecb7 5b08 vldmia r7!, {d5-d8} + 801c: ecb7 9b08 vldmia r7!, {d9-d12} + 8020: ecb7 db06 vldmia r7!, {d13-d15} + 8024: f000 b820 b\.w 8068 <__stm32l4xx_veneer_1_r> + 8028: f7f0 a000 udf\.w #0 + 802c: f7f0 a000 udf\.w #0 + +00008030 <__stm32l4xx_veneer_2>: + 8030: ecbd 1b08 vpop {d1-d4} + 8034: ecbd 5b02 vpop {d5} + 8038: f000 b818 b\.w 806c <__stm32l4xx_veneer_2_r> + 803c: f7f0 a000 udf\.w #0 + 8040: f7f0 a000 udf\.w #0 + 8044: f7f0 a000 udf\.w #0 + +00008048 <__stm32l4xx_veneer_3>: + 8048: ed3c 1b08 vldmdb ip!, {d1-d4} + 804c: ed3c 5b08 vldmdb ip!, {d5-d8} + 8050: ed3c 9b08 vldmdb ip!, {d9-d12} + 8054: ed3c db06 vldmdb ip!, {d13-d15} + 8058: f000 b80a b\.w 8070 <__stm32l4xx_veneer_3_r> + 805c: f7f0 a000 udf\.w #0 + +00008060 <_start>: + 8060: f7ff bfce b\.w 8000 <__stm32l4xx_veneer_0> + +00008064 <__stm32l4xx_veneer_0_r>: + 8064: f7ff bfd8 b\.w 8018 <__stm32l4xx_veneer_1> + +00008068 <__stm32l4xx_veneer_1_r>: + 8068: f7ff bfe2 b\.w 8030 <__stm32l4xx_veneer_2> + +0000806c <__stm32l4xx_veneer_2_r>: + 806c: f7ff bfec b\.w 8048 <__stm32l4xx_veneer_3> diff --git a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s new file mode 100644 index 0000000..7c7ce01 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s @@ -1,0 +1,27 @@ + .syntax unified + .cpu cortex-m4 + .fpu fpv4-sp-d16 + .text + .align 1 + .thumb + .thumb_func + .global _start +_start: + @ VLDM CASE #1 + @ vldm rx, {...} + @ -> vldm rx!, {8_words_or_less} for each + @ -> sub rx, rx, #size (list) + vldm r10, {d1-d15} + + @ VLDM CASE #2 + @ vldm rx!, {...} + @ -> vldm rx!, {8_words_or_less} for each needed 8_word + @ This also handles vpop instruction (when rx is sp) + vldm r7!, {d5-d15} + @ Explicit VPOP test + vpop {d1-d5} + + @ VLDM CASE #3 + @ vldmd rx!, {...} + @ -> vldmb rx!, {8_words_or_less} for each needed 8_word + vldmdb r12!, {d1-d15} diff --git a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s index 94aa66e..b072801 100644 --- a/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s +++ b/binutils/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s @@ -21,6 +21,7 @@ @ Explicit VPOP test vpop {s1-s9} + @ VLDM CASE #3 @ vldmd rx!, {...} @ -> vldmb rx!, {8_words_or_less} for each needed 8_word vldmdb r11!, {s1-s31} diff --git a/binutils/ld/testsuite/ld-avr/avr-prop-5.d b/binutils/ld/testsuite/ld-avr/avr-prop-5.d new file mode 100644 index 0000000..5f62ba3 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-avr/avr-prop-5.d @@ -1,0 +1,10 @@ +#name: AVR .avr.prop, single .align proper sym val test. +#as: -mmcu=avrxmega2 -mlink-relax +#ld: -mavrxmega2 --relax +#source: avr-prop-5.s +#objdump: -S +#target: avr-*-* + +#... + 0: 00 d0\s+rcall\s+\.\+0\s+; 0x2 +#...diff --git a/binutils/ld/testsuite/ld-avr/avr-prop-5.s b/binutils/ld/testsuite/ld-avr/avr-prop-5.s new file mode 100644 index 0000000..6a3359a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-avr/avr-prop-5.s @@ -1,0 +1,7 @@ + .text + .global _start, dest +_start: + CALL dest + .align 1 +dest: + NOP diff --git a/binutils/ld/testsuite/ld-avr/avr-prop-6.d b/binutils/ld/testsuite/ld-avr/avr-prop-6.d new file mode 100644 index 0000000..1bf8aa1 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-avr/avr-prop-6.d @@ -1,0 +1,14 @@ +#name: AVR .avr.prop, single .align sym at end of section test. +#as: -mavrxmega2 -mlink-relax +#ld: -mavrxmega2 --relax +#source: avr-prop-6.s +#objdump: -S +#target: avr-*-* + +#... + 0: 00 c0 rjmp .+0 ; 0x2 + +00000002 : + 2: 00 00 nop + 4: fe cf rjmp .-4 ; 0x2 +#... diff --git a/binutils/ld/testsuite/ld-avr/avr-prop-6.s b/binutils/ld/testsuite/ld-avr/avr-prop-6.s new file mode 100644 index 0000000..4aa3e67 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-avr/avr-prop-6.s @@ -1,0 +1,9 @@ + .text + .global _start, dest +_start: + jmp dest + .align 1 +dest: + nop + rjmp dest + diff --git a/binutils/ld/testsuite/ld-elf/compressed1b.d b/binutils/ld/testsuite/ld-elf/compressed1b.d index 83dc60f..34dfe8e 100644 --- a/binutils/ld/testsuite/ld-elf/compressed1b.d +++ b/binutils/ld/testsuite/ld-elf/compressed1b.d @@ -1,7 +1,8 @@ #source: compress1.s #as: --compress-debug-sections=zlib-gabi -#ld: -r +#ld: -r --compress-debug-sections=none #readelf: -t +#target: *-*-linux* *-*-gnu* #failif #... diff --git a/binutils/ld/testsuite/ld-elf/compressed1c.d b/binutils/ld/testsuite/ld-elf/compressed1c.d index 64f75be..29e91da 100644 --- a/binutils/ld/testsuite/ld-elf/compressed1c.d +++ b/binutils/ld/testsuite/ld-elf/compressed1c.d @@ -1,6 +1,6 @@ #source: compress1.s #as: --compress-debug-sections=zlib-gabi -#ld: -shared +#ld: -shared --compress-debug-sections=none #readelf: -t #target: *-*-linux* *-*-gnu* diff --git a/binutils/ld/testsuite/ld-elf/gabiend.rt b/binutils/ld/testsuite/ld-elf/gabiend.rt index 23bc36c..75b5ba7 100644 --- a/binutils/ld/testsuite/ld-elf/gabiend.rt +++ b/binutils/ld/testsuite/ld-elf/gabiend.rt @@ -1,4 +1,4 @@ #... +\[[0-9a-f]+\]: .*COMPRESSED - +ZLIB, [0-9a-f]+, 1 + +ZLIB, [0-9a-f]+, [1-9][0-9]* #pass diff --git a/binutils/ld/testsuite/ld-elf/gabinormal.rt b/binutils/ld/testsuite/ld-elf/gabinormal.rt index 23bc36c..75b5ba7 100644 --- a/binutils/ld/testsuite/ld-elf/gabinormal.rt +++ b/binutils/ld/testsuite/ld-elf/gabinormal.rt @@ -1,4 +1,4 @@ #... +\[[0-9a-f]+\]: .*COMPRESSED - +ZLIB, [0-9a-f]+, 1 + +ZLIB, [0-9a-f]+, [1-9][0-9]* #pass diff --git a/binutils/ld/testsuite/ld-elf/indirect.exp b/binutils/ld/testsuite/ld-elf/indirect.exp index e8ac1ae..25845a0 100644 --- a/binutils/ld/testsuite/ld-elf/indirect.exp +++ b/binutils/ld/testsuite/ld-elf/indirect.exp @@ -66,7 +66,11 @@ || ![ld_compile $CC $srcdir/$subdir/indirect4a.c tmpdir/indirect4a.o] || ![ld_compile $CC $srcdir/$subdir/indirect4b.c tmpdir/indirect4b.o] || ![ld_compile "$CC -O2 -fPIC -I../bfd" $srcdir/$subdir/pr18720a.c tmpdir/pr18720a.o] - || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] } { + || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] + || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553d.c tmpdir/pr19553d.o] + || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553c.c tmpdir/pr19553c.o] + || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553b.c tmpdir/pr19553b.o] + || ![ld_compile $CC $srcdir/$subdir/pr19553a.c tmpdir/pr19553a.o] } { unresolved "Indirect symbol tests" return } @@ -87,6 +91,15 @@ {"Build pr18720b1.o" "-r -nostdlib tmpdir/pr18720b.o" "" {dummy.c} {} "pr18720b1.o"} + {"Build libpr19553b.so" + "-shared -Wl,--version-script=pr19553.map" "-fPIC" + {pr19553b.c} {} "libpr19553b.so"} + {"Build libpr19553c.so" + "-shared -Wl,--version-script=pr19553.map" "-fPIC" + {pr19553c.c} {} "libpr19553c.so"} + {"Build libpr19553d.so" + "-shared tmpdir/libpr19553c.so" "-fPIC" + {pr19553d.c} {} "libpr19553d.so"} } run_cc_link_tests $build_tests @@ -155,6 +168,15 @@ {"Run with libpr18720c.so 5" "tmpdir/libpr18720c.so tmpdir/pr18720b1.o tmpdir/pr18720a.o" "" {check-ptr-eq.c} "pr18720d" "pr18720.out"} + {"Run with libpr19553b.so" + "tmpdir/libpr19553b.so tmpdir/libpr19553d.so -rpath-link ." "" + {pr19553a.c} "pr19553b" "pr19553b.out"} + {"Run with libpr19553c.so" + "tmpdir/libpr19553c.so tmpdir/libpr19553b.so tmpdir/libpr19553d.so" "" + {pr19553a.c} "pr19553c" "pr19553c.out"} + {"Run with libpr19553d.so" + "tmpdir/libpr19553d.so tmpdir/libpr19553b.so -rpath-link ." "" + {pr19553a.c} "pr19553d" "pr19553d.out"} } run_ld_link_exec_tests [] $run_tests diff --git a/binutils/ld/testsuite/ld-elf/pr19539.d b/binutils/ld/testsuite/ld-elf/pr19539.d new file mode 100644 index 0000000..87c2b1b 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19539.d @@ -1,0 +1,9 @@ +#source: start.s +#source: pr19539.s +#ld: -pie -T pr19539.t +#readelf : --dyn-syms --wide +#target: *-*-linux* *-*-gnu* *-*-solaris* +#notarget: cris*-*-* + +Symbol table '\.dynsym' contains [0-9]+ entries: +#pass diff --git a/binutils/ld/testsuite/ld-elf/pr19539.s b/binutils/ld/testsuite/ld-elf/pr19539.s new file mode 100644 index 0000000..0f55d3f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19539.s @@ -1,0 +1,2 @@ + .section .prefix,"a",%progbits + .dc.a foo diff --git a/binutils/ld/testsuite/ld-elf/pr19539.t b/binutils/ld/testsuite/ld-elf/pr19539.t new file mode 100644 index 0000000..b6b48e7 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19539.t @@ -1,0 +1,1 @@ +HIDDEN (foo = .); diff --git a/binutils/ld/testsuite/ld-elf/pr19553.map b/binutils/ld/testsuite/ld-elf/pr19553.map new file mode 100644 index 0000000..f2c03ac 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553.map @@ -1,0 +1,5 @@ +FOO +{ +global: + foo; +}; diff --git a/binutils/ld/testsuite/ld-elf/pr19553a.c b/binutils/ld/testsuite/ld-elf/pr19553a.c new file mode 100644 index 0000000..f1cb6b4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553a.c @@ -1,0 +1,8 @@ +extern void foo (void); + +int +main (void) +{ + foo (); + return 0; +} diff --git a/binutils/ld/testsuite/ld-elf/pr19553b.c b/binutils/ld/testsuite/ld-elf/pr19553b.c new file mode 100644 index 0000000..0c438a2 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553b.c @@ -1,0 +1,8 @@ +#include + +__attribute__ ((weak)) +void +foo (void) +{ + printf ("pr19553b\n"); +} diff --git a/binutils/ld/testsuite/ld-elf/pr19553b.out b/binutils/ld/testsuite/ld-elf/pr19553b.out new file mode 100644 index 0000000..a5575d9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553b.out @@ -1,0 +1,1 @@ +pr19553b diff --git a/binutils/ld/testsuite/ld-elf/pr19553c.c b/binutils/ld/testsuite/ld-elf/pr19553c.c new file mode 100644 index 0000000..d80dfc9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553c.c @@ -1,0 +1,9 @@ +#include + +void +foo (void) +{ + printf ("pr19553c\n"); +} + +asm (".symver foo,foo@FOO"); diff --git a/binutils/ld/testsuite/ld-elf/pr19553c.out b/binutils/ld/testsuite/ld-elf/pr19553c.out new file mode 100644 index 0000000..9d23215 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553c.out @@ -1,0 +1,1 @@ +pr19553c diff --git a/binutils/ld/testsuite/ld-elf/pr19553d.c b/binutils/ld/testsuite/ld-elf/pr19553d.c new file mode 100644 index 0000000..d48f8f3 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553d.c @@ -1,0 +1,8 @@ +#include + +__attribute__ ((weak)) +void +foo (void) +{ + printf ("pr19553d\n"); +} diff --git a/binutils/ld/testsuite/ld-elf/pr19553d.out b/binutils/ld/testsuite/ld-elf/pr19553d.out new file mode 100644 index 0000000..2b4cf0b 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19553d.out @@ -1,0 +1,1 @@ +pr19553d diff --git a/binutils/ld/testsuite/ld-elf/pr19579a.c b/binutils/ld/testsuite/ld-elf/pr19579a.c new file mode 100644 index 0000000..e4a6eb1 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19579a.c @@ -1,0 +1,15 @@ +#include + +int foo[1]; +int bar[2]; + +extern int *foo_p (void); +extern int *bar_p (void); + +int +main () +{ + if (foo[0] == 0 && foo == foo_p () && bar[0] == 0 && bar == bar_p ()) + printf ("PASS\n"); + return 0; +} diff --git a/binutils/ld/testsuite/ld-elf/pr19579b.c b/binutils/ld/testsuite/ld-elf/pr19579b.c new file mode 100644 index 0000000..d906545 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19579b.c @@ -1,0 +1,14 @@ +int foo[2]; +int bar[2] = { -1, -1 }; + +int * +foo_p (void) +{ + return foo; +} + +int * +bar_p (void) +{ + return bar; +} diff --git a/binutils/ld/testsuite/ld-elf/pr19698.d b/binutils/ld/testsuite/ld-elf/pr19698.d new file mode 100644 index 0000000..a39f67a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19698.d @@ -1,0 +1,10 @@ +#ld: -shared $srcdir/$subdir/pr19698.t +#readelf : --dyn-syms --wide +#target: *-*-linux* *-*-gnu* *-*-solaris* + +Symbol table '\.dynsym' contains [0-9]+ entries: +#... + +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@VERS.1 +#... + +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@@VERS.2 +#pass diff --git a/binutils/ld/testsuite/ld-elf/pr19698.s b/binutils/ld/testsuite/ld-elf/pr19698.s new file mode 100644 index 0000000..875dca4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19698.s @@ -1,0 +1,5 @@ + .text + .globl foo + .type foo, %function +foo: + .byte 0 diff --git a/binutils/ld/testsuite/ld-elf/pr19698.t b/binutils/ld/testsuite/ld-elf/pr19698.t new file mode 100644 index 0000000..09d9125 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-elf/pr19698.t @@ -1,0 +1,11 @@ +"foo@VERS.1" = foo; + +VERSION { +VERS.2 { + global: + foo; +}; + +VERS.1 { +}; +} diff --git a/binutils/ld/testsuite/ld-elf/shared.exp b/binutils/ld/testsuite/ld-elf/shared.exp index 731eef3..b8c12cb 100644 --- a/binutils/ld/testsuite/ld-elf/shared.exp +++ b/binutils/ld/testsuite/ld-elf/shared.exp @@ -524,6 +524,21 @@ {} \ "libpr2404b.a" \ ] \ + [list \ + "Build pr19579a.o" \ + "" "-fPIE" \ + {pr19579a.c} \ + {} \ + "libpr19579a.a" \ + ] \ + [list \ + "Build libpr19579.so" \ + "-shared" \ + "-fPIC" \ + {pr19579b.c} \ + {} \ + "libpr19579.so" \ + ] \ ] run_ld_link_exec_tests [] [list \ [list \ @@ -579,6 +594,15 @@ "pr18718pic2" \ "pass.out" \ "-O2 -fPIC -I../bfd" \ + ] \ + [list \ + "Run pr19579" \ + "-pie -z text tmpdir/pr19579a.o tmpdir/libpr19579.so" \ + "" \ + {dummy.c} \ + "pr19579" \ + "pass.out" \ + "-fPIE" \ ] \ ] } diff --git a/binutils/ld/testsuite/ld-elfvsb/elfvsb.exp b/binutils/ld/testsuite/ld-elfvsb/elfvsb.exp index e02d4fa..4766d0e 100644 --- a/binutils/ld/testsuite/ld-elfvsb/elfvsb.exp +++ b/binutils/ld/testsuite/ld-elfvsb/elfvsb.exp @@ -62,6 +62,7 @@ set tmpdir tmpdir set SHCFLAG "" set shared_needs_pic "no" +set COMPRESS_LDFLAG "-Wl,--compress-debug-sections=zlib-gabi" if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { @@ -228,6 +229,7 @@ global support_protected global shared_needs_pic global PLT_CFLAGS + global COMPRESS_LDFLAG if [ string match $visibility "hidden" ] { set VSBCFLAG "-DHIDDEN_TEST" @@ -384,7 +386,7 @@ } else { if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o xcoff } else { - visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb + visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb $COMPRESS_LDFLAG } } } }} diff --git a/binutils/ld/testsuite/ld-i386/branch1.d b/binutils/ld/testsuite/ld-i386/branch1.d index a078f1d..81b069e 100644 --- a/binutils/ld/testsuite/ld-i386/branch1.d +++ b/binutils/ld/testsuite/ld-i386/branch1.d @@ -1,4 +1,4 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call1.d b/binutils/ld/testsuite/ld-i386/call1.d index 69383b2..e3ebedc 100644 --- a/binutils/ld/testsuite/ld-i386/call1.d +++ b/binutils/ld/testsuite/ld-i386/call1.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/call2.d b/binutils/ld/testsuite/ld-i386/call2.d index 69383b2..e3ebedc 100644 --- a/binutils/ld/testsuite/ld-i386/call2.d +++ b/binutils/ld/testsuite/ld-i386/call2.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/call3a.d b/binutils/ld/testsuite/ld-i386/call3a.d index a8ff27f..5a1e1df 100644 --- a/binutils/ld/testsuite/ld-i386/call3a.d +++ b/binutils/ld/testsuite/ld-i386/call3a.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3b.d b/binutils/ld/testsuite/ld-i386/call3b.d index 06af6f5..de98ce4 100644 --- a/binutils/ld/testsuite/ld-i386/call3b.d +++ b/binutils/ld/testsuite/ld-i386/call3b.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=prefix-addr #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3c.d b/binutils/ld/testsuite/ld-i386/call3c.d index 64e8372..0fdbee4 100644 --- a/binutils/ld/testsuite/ld-i386/call3c.d +++ b/binutils/ld/testsuite/ld-i386/call3c.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=prefix-nop #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3d.d b/binutils/ld/testsuite/ld-i386/call3d.d index a9274c8..4d965b3 100644 --- a/binutils/ld/testsuite/ld-i386/call3d.d +++ b/binutils/ld/testsuite/ld-i386/call3d.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=suffix-nop #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3e.d b/binutils/ld/testsuite/ld-i386/call3e.d index 2876b49..608682c 100644 --- a/binutils/ld/testsuite/ld-i386/call3e.d +++ b/binutils/ld/testsuite/ld-i386/call3e.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=prefix-0x67 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3f.d b/binutils/ld/testsuite/ld-i386/call3f.d index 5ab0cf1..f3a4869 100644 --- a/binutils/ld/testsuite/ld-i386/call3f.d +++ b/binutils/ld/testsuite/ld-i386/call3f.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=prefix-0x90 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3g.d b/binutils/ld/testsuite/ld-i386/call3g.d index 8287770..f3e3f36 100644 --- a/binutils/ld/testsuite/ld-i386/call3g.d +++ b/binutils/ld/testsuite/ld-i386/call3g.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=suffix-0x90 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/call3h.d b/binutils/ld/testsuite/ld-i386/call3h.d index 83f371a..afd1ce8 100644 --- a/binutils/ld/testsuite/ld-i386/call3h.d +++ b/binutils/ld/testsuite/ld-i386/call3h.d @@ -1,5 +1,5 @@ #source: call3.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -z call-nop=suffix-144 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/got1.dd b/binutils/ld/testsuite/ld-i386/got1.dd index e46153d..e6e82de 100644 --- a/binutils/ld/testsuite/ld-i386/got1.dd +++ b/binutils/ld/testsuite/ld-i386/got1.dd @@ -10,6 +10,8 @@ [ ]*[a-f0-9]+: ff d0 call \*%eax [ ]*[a-f0-9]+: [ a-f0-9]+ mov *0x[a-f0-9]+,%eax [ ]*[a-f0-9]+: ff d0 call \*%eax +[ ]*[a-f0-9]+: [ a-f0-9]+ call [a-f0-9]+ <__x86.get_pc_thunk.cx> +[ ]*[a-f0-9]+: [ a-f0-9]+ add \$0x[a-f0-9]+,%ecx [ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%ecx [ ]*[a-f0-9]+: ff d1 call \*%ecx [ ]*[a-f0-9]+: 83 ec 0c sub \$0xc,%esp diff --git a/binutils/ld/testsuite/ld-i386/got1a.S b/binutils/ld/testsuite/ld-i386/got1a.S index f3d5330..7a3f7b5 100644 --- a/binutils/ld/testsuite/ld-i386/got1a.S +++ b/binutils/ld/testsuite/ld-i386/got1a.S @@ -12,10 +12,19 @@ call *%eax movl plt@GOT, %eax call *%eax - movl foo@GOT(%ebx), %ecx + call __x86.get_pc_thunk.cx + addl $_GLOBAL_OFFSET_TABLE_, %ecx + movl foo@GOT(%ecx), %ecx call *%ecx subl $12, %esp pushl $0 pushl $0 # Push a dummy return address onto stack. jmp *myexit@GOT .size main, .-main + .section .text.__x86.get_pc_thunk.cx,"axG",@progbits,__x86.get_pc_thunk.cx,comdat + .globl __x86.get_pc_thunk.cx + .hidden __x86.get_pc_thunk.cx + .type __x86.get_pc_thunk.cx, @function +__x86.get_pc_thunk.cx: + movl (%esp), %ecx + ret diff --git a/binutils/ld/testsuite/ld-i386/got1d.S b/binutils/ld/testsuite/ld-i386/got1d.S index a6d51c6..7e4c9b1 100644 --- a/binutils/ld/testsuite/ld-i386/got1d.S +++ b/binutils/ld/testsuite/ld-i386/got1d.S @@ -19,7 +19,6 @@ pushl %esi pushl %ebx call __x86.get_pc_thunk.bx -1: addl $_GLOBAL_OFFSET_TABLE_, %ebx subl $20, %esp leal __FUNCTION__.1866@GOTOFF(%ebx), %esi diff --git a/binutils/ld/testsuite/ld-i386/i386.exp b/binutils/ld/testsuite/ld-i386/i386.exp index fb1d3ea..60899ff 100644 --- a/binutils/ld/testsuite/ld-i386/i386.exp +++ b/binutils/ld/testsuite/ld-i386/i386.exp @@ -195,6 +195,14 @@ "--32" {pr17709a.s} {} "libpr17709.so"} {"PR ld/17709 (2)" "-melf_i386 tmpdir/libpr17709.so" "" "--32" {pr17709b.s} {{readelf -r pr17709.rd}} "pr17709"} + {"Build pr19827a.o" "" "" + "--32" { pr19827a.S }} + {"Build pr19827b.so" "-melf_i386 -shared" "" + "--32" { pr19827b.S } {} "pr19827b.so"} + {"Build pr19827" "-melf_i386 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" "" + "--32" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"} + {"Build pr19827.so" "-melf_i386 -shared -Bsymbolic" "" + "--32" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"} } # So as to avoid rewriting every last test case here in a nacl variant, @@ -319,6 +327,15 @@ run_dump_test "load5b" run_dump_test "load6" run_dump_test "pr19175" +run_dump_test "pr19615" +run_dump_test "pr20117" +run_dump_test "pr20244-1a" +run_dump_test "pr20244-1b" +run_dump_test "pr20244-1c" +run_dump_test "pr20244-2a" +run_dump_test "pr20244-2b" +run_dump_test "pr20244-2c" +run_dump_test "pr20244-2d" if { !([istarget "i?86-*-linux*"] || [istarget "i?86-*-gnu*"] @@ -357,7 +374,7 @@ [list \ "Build libplt-main1.a" \ "" \ - "-fPIC" \ + "-fPIC -Wa,-mrelax-relocations=yes" \ { plt-main1.c } \ {{readelf {-Wr} plt-main1.rd}} \ "libplt-main1.a" \ @@ -365,7 +382,7 @@ [list \ "Build libplt-main2.a" \ "" \ - "-fPIC" \ + "-fPIC -Wa,-mrelax-relocations=yes" \ { plt-main2.c } \ {{readelf {-Wr} plt-main2.rd}} \ "libplt-main2.a" \ @@ -373,7 +390,7 @@ [list \ "Build libplt-main3.a" \ "" \ - "-fPIC $PLT_CFLAGS" \ + "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ { plt-main3.c } \ {{readelf {-Wr} plt-main3.rd}} \ "libplt-main3.a" \ @@ -381,7 +398,7 @@ [list \ "Build libplt-main4.a" \ "" \ - "-fPIC $PLT_CFLAGS" \ + "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ { plt-main4.c } \ {{readelf {-Wr} plt-main4.rd}} \ "libplt-main4.a" \ @@ -413,18 +430,26 @@ "copyreloc-lib.so" \ ] \ [list \ - "Build copyreloc-main with PIE and GOTOFF (1)" \ - "tmpdir/copyreloc-lib.so -pie" \ + "Build libcopyreloc-main.a" \ "" \ + "" \ { copyreloc-main.S } \ + {} \ + "libcopyreloc-main.a" \ + ] \ + [list \ + "Build copyreloc-main with PIE and GOTOFF (1)" \ + "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ + "" \ + { dummy.s } \ {{readelf {-Wr} copyreloc-main1.rd}} \ "copyreloc-main" \ ] \ [list \ "Build copyreloc-main with PIE and GOTOFF (2)" \ - "tmpdir/copyreloc-lib.so -pie" \ + "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ "" \ - { copyreloc-main.S } \ + { dummy.s } \ {{readelf {-Wr} copyreloc-main2.rd}} \ "copyreloc-main" \ ] \ @@ -501,18 +526,26 @@ "pr18900.so" \ ] \ [list \ - "Build pr18900a" \ - "tmpdir/pr18900.so" \ + "Build pr18900.o" \ + "-r -nostdlib" \ "" \ { pr18900b.c pr18900c.c } \ + "" \ + "pr18900.o" \ + ] \ + [list \ + "Build pr18900a" \ + "tmpdir/pr18900.o tmpdir/pr18900.so" \ + "" \ + { dummy.s } \ {{readelf {-Wrd} pr18900a.rd}} \ "pr18900a" \ ] \ [list \ "Build pr18900b" \ - "tmpdir/pr18900.so" \ + "-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \ "" \ - { pr18900b.c pr18900c.c } \ + { dummy.s } \ {{readelf {-Wrd} pr18900b.rd}} \ "pr18900b" \ ] \ @@ -533,10 +566,18 @@ "got1d.so" \ ] \ [list \ - "Build gotpc1" \ - "tmpdir/got1d.so" \ + "Build gotpc1.o" \ + "-r -nostdlib" \ "" \ { got1a.S got1b.c got1c.c } \ + "" \ + "gotpc1.o" \ + ] \ + [list \ + "Build gotpc1" \ + "-Wl,--as-needed tmpdir/gotpc1.o tmpdir/got1d.so" \ + "-Wa,-mrelax-relocations=yes" \ + { dummy.s } \ {{objdump {-dw} got1.dd}} \ "got1" \ ] \ @@ -580,9 +621,9 @@ ] \ [list \ "Run copyreloc-main with PIE and GOTOFF" \ - "tmpdir/copyreloc-lib.so -pie" \ + "--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ "" \ - { copyreloc-main.S } \ + { dummy.s } \ "copyreloc-main" \ "copyreloc-main.out" \ ] \ @@ -612,9 +653,9 @@ ] \ [list \ "Run pr18900" \ - "tmpdir/pr18900.so" \ + "tmpdir/pr18900.o tmpdir/pr18900.so" \ "" \ - { pr18900b.c pr18900c.c } \ + { dummy.s } \ "pr18900" \ "pr18900.out" \ ] \ @@ -633,6 +674,42 @@ { got1a.S got1b.c got1c.c } \ "got1" \ "got1.out" \ + ] \ + ] +} + +# Must be native with the C compiler and working IFUNC support, +if { [isnative] + && [check_ifunc_available] + && [istarget "i?86-*-*"] + && [which $CC] != 0 } { + run_cc_link_tests [list \ + [list \ + "Build ifunc-1a.o ifunc-1b.o ifunc-1c.o ifunc-1d.o" \ + "" \ + "-fPIC -O2 -g" \ + { ifunc-1a.c ifunc-1b.S ifunc-1c.S ifunc-1d.S } \ + ] \ + ] + + run_ld_link_exec_tests [] [list \ + [list \ + "Run ifunc-1a" \ + "tmpdir/ifunc-1a.o tmpdir/ifunc-1b.o \ + tmpdir/ifunc-1c.o tmpdir/ifunc-1d.o" \ + "" \ + { dummy.c } \ + "ifunc-1a" \ + "pass.out" \ + ] \ + [list \ + "Run ifunc-1b" \ + "--static tmpdir/ifunc-1a.o tmpdir/ifunc-1b.o \ + tmpdir/ifunc-1c.o tmpdir/ifunc-1d.o" \ + "" \ + { dummy.c } \ + "ifunc-1b" \ + "pass.out" \ ] \ ] } diff --git a/binutils/ld/testsuite/ld-i386/ifunc-1a.c b/binutils/ld/testsuite/ld-i386/ifunc-1a.c new file mode 100644 index 0000000..370275a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/ifunc-1a.c @@ -1,0 +1,8 @@ +extern void check (void); + +int +main () +{ + check (); + return 0; +} diff --git a/binutils/ld/testsuite/ld-i386/ifunc-1b.S b/binutils/ld/testsuite/ld-i386/ifunc-1b.S new file mode 100644 index 0000000..802a36d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/ifunc-1b.S @@ -1,0 +1,42 @@ + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "PASS" + .text + .p2align 4,,15 + .globl check + .type check, @function +check: + pushl %ebx + call __x86.get_pc_thunk.bx + addl $_GLOBAL_OFFSET_TABLE_, %ebx + subl $8, %esp + call *get_func1@GOT(%ebx) + cmpl func1@GOT(%ebx), %eax + jne .L3 + call *func1@GOT(%ebx) + cmpl $1, %eax + jne .L3 + call *call_func1@GOT(%ebx) + cmpl $1, %eax + jne .L3 + call *call_func2@GOT(%ebx) + cmpl $2, %eax + jne .L3 + leal .LC0@GOTOFF(%ebx), %eax + subl $12, %esp + pushl %eax + call *puts@GOT(%ebx) + addl $24, %esp + popl %ebx + ret +.L3: + call *abort@GOT(%ebx) + .size check, .-check + .section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat + .globl __x86.get_pc_thunk.bx + .hidden __x86.get_pc_thunk.bx + .type __x86.get_pc_thunk.bx, @function +__x86.get_pc_thunk.bx: + movl (%esp), %ebx + ret + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/ifunc-1c.S b/binutils/ld/testsuite/ld-i386/ifunc-1c.S new file mode 100644 index 0000000..b00f128 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/ifunc-1c.S @@ -1,0 +1,26 @@ + .text + .p2align 4,,15 + .globl get_func1 + .type get_func1, @function +get_func1: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + movl func1@GOT(%eax), %eax + ret + .size get_func1, .-get_func1 + .p2align 4,,15 + .globl call_func1 + .type call_func1, @function +call_func1: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + jmp *func1@GOT(%eax) + .size call_func1, .-call_func1 + .section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat + .globl __x86.get_pc_thunk.ax + .hidden __x86.get_pc_thunk.ax + .type __x86.get_pc_thunk.ax, @function +__x86.get_pc_thunk.ax: + movl (%esp), %eax + ret + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/ifunc-1d.S b/binutils/ld/testsuite/ld-i386/ifunc-1d.S new file mode 100644 index 0000000..28f262e 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/ifunc-1d.S @@ -1,0 +1,76 @@ + .text + .p2align 4,,15 + .type implementation1, @function +implementation1: + movl $1, %eax + ret + .size implementation1, .-implementation1 + .p2align 4,,15 + .type implementation2, @function +implementation2: + movl $2, %eax + ret + .size implementation2, .-implementation2 + .p2align 4,,15 + .type resolver2, @function +resolver2: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + leal implementation2@GOTOFF(%eax), %eax + ret + .size resolver2, .-resolver2 + .type func2, @gnu_indirect_function + .set func2,resolver2 + .p2align 4,,15 + .type resolver1, @function +resolver1: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + leal implementation1@GOTOFF(%eax), %eax + ret + .size resolver1, .-resolver1 + .globl func1 + .type func1, @gnu_indirect_function + .set func1,resolver1 + .p2align 4,,15 + .globl get_func2 + .type get_func2, @function +get_func2: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + movl func2@GOT(%eax), %eax + ret + .size get_func2, .-get_func2 + .p2align 4,,15 + .globl call_func2 + .type call_func2, @function +call_func2: + pushl %ebx + call __x86.get_pc_thunk.bx + addl $_GLOBAL_OFFSET_TABLE_, %ebx + subl $8, %esp + call *get_func2@GOT(%ebx) + cmpl func2@GOT(%ebx), %eax + jne .L10 + addl $8, %esp + movl %ebx, %eax + popl %ebx + jmp *func2@GOT(%eax) +.L10: + call *abort@GOT(%ebx) + .size call_func2, .-call_func2 + .section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat + .globl __x86.get_pc_thunk.ax + .hidden __x86.get_pc_thunk.ax + .type __x86.get_pc_thunk.ax, @function +__x86.get_pc_thunk.ax: + movl (%esp), %eax + ret + .section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat + .globl __x86.get_pc_thunk.bx + .hidden __x86.get_pc_thunk.bx + .type __x86.get_pc_thunk.bx, @function +__x86.get_pc_thunk.bx: + movl (%esp), %ebx + ret + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/jmp1.d b/binutils/ld/testsuite/ld-i386/jmp1.d index 69383b2..e3ebedc 100644 --- a/binutils/ld/testsuite/ld-i386/jmp1.d +++ b/binutils/ld/testsuite/ld-i386/jmp1.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/jmp2.d b/binutils/ld/testsuite/ld-i386/jmp2.d index 69383b2..e3ebedc 100644 --- a/binutils/ld/testsuite/ld-i386/jmp2.d +++ b/binutils/ld/testsuite/ld-i386/jmp2.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/lea1c.d b/binutils/ld/testsuite/ld-i386/lea1c.d index dd76258..0c3580d 100644 --- a/binutils/ld/testsuite/ld-i386/lea1c.d +++ b/binutils/ld/testsuite/ld-i386/lea1c.d @@ -1,5 +1,5 @@ #source: lea1.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/libno-plt-1b.dd b/binutils/ld/testsuite/ld-i386/libno-plt-1b.dd new file mode 100644 index 0000000..507ed16 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/libno-plt-1b.dd @@ -1,0 +1,19 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: 8b 80 ([0-9a-f]{2} ){4}[ ]+mov +-0x[a-f0-9]+\(%eax\),%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: ff a0 ([0-9a-f]{2} ){4}[ ]+jmp +\*-0x[0-9a-f]+\(%eax\) +#pass diff --git a/binutils/ld/testsuite/ld-i386/libno-plt-1b.rd b/binutils/ld/testsuite/ld-i386/libno-plt-1b.rd new file mode 100644 index 0000000..6881a2d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/libno-plt-1b.rd @@ -1,0 +1,8 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +func +#pass diff --git a/binutils/ld/testsuite/ld-i386/load1.d b/binutils/ld/testsuite/ld-i386/load1.d index 062ea18..a252a15 100644 --- a/binutils/ld/testsuite/ld-i386/load1.d +++ b/binutils/ld/testsuite/ld-i386/load1.d @@ -1,4 +1,4 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 #objdump: -dw --sym #notarget: i?86-*-nacl* x86_64-*-nacl* diff --git a/binutils/ld/testsuite/ld-i386/load2.d b/binutils/ld/testsuite/ld-i386/load2.d index 87c2509..467fee0 100644 --- a/binutils/ld/testsuite/ld-i386/load2.d +++ b/binutils/ld/testsuite/ld-i386/load2.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -shared #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/load3.d b/binutils/ld/testsuite/ld-i386/load3.d index 87c2509..467fee0 100644 --- a/binutils/ld/testsuite/ld-i386/load3.d +++ b/binutils/ld/testsuite/ld-i386/load3.d @@ -1,3 +1,3 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 -shared #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/load4a.d b/binutils/ld/testsuite/ld-i386/load4a.d index 3aa56bd..f3f02ea 100644 --- a/binutils/ld/testsuite/ld-i386/load4a.d +++ b/binutils/ld/testsuite/ld-i386/load4a.d @@ -1,4 +1,4 @@ #source: load4.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -Bsymbolic -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/load5a.d b/binutils/ld/testsuite/ld-i386/load5a.d index 88c225a..9744316 100644 --- a/binutils/ld/testsuite/ld-i386/load5a.d +++ b/binutils/ld/testsuite/ld-i386/load5a.d @@ -1,4 +1,4 @@ #source: load5.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -Bsymbolic -shared -melf_i386 #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/mov2b.d b/binutils/ld/testsuite/ld-i386/mov2b.d index ea5dd9b..295a7c5 100644 --- a/binutils/ld/testsuite/ld-i386/mov2b.d +++ b/binutils/ld/testsuite/ld-i386/mov2b.d @@ -1,5 +1,5 @@ #source: mov2.s -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -pie -melf_i386 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/mov3.d b/binutils/ld/testsuite/ld-i386/mov3.d index 17da244..4ce5cd8 100644 --- a/binutils/ld/testsuite/ld-i386/mov3.d +++ b/binutils/ld/testsuite/ld-i386/mov3.d @@ -1,4 +1,4 @@ -#as: --32 +#as: --32 -mrelax-relocations=yes #ld: -melf_i386 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1a.dd b/binutils/ld/testsuite/ld-i386/no-plt-1a.dd new file mode 100644 index 0000000..4d5729f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1a.dd @@ -1,0 +1,43 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1a.rd b/binutils/ld/testsuite/ld-i386/no-plt-1a.rd new file mode 100644 index 0000000..4aad3c4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1a.rd @@ -1,0 +1,10 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1b.dd b/binutils/ld/testsuite/ld-i386/no-plt-1b.dd new file mode 100644 index 0000000..5af3471 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1b.dd @@ -1,0 +1,31 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1b.rd b/binutils/ld/testsuite/ld-i386/no-plt-1b.rd new file mode 100644 index 0000000..638dd6d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1b.rd @@ -1,0 +1,16 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1c.dd b/binutils/ld/testsuite/ld-i386/no-plt-1c.dd new file mode 100644 index 0000000..ebfc403 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1c.dd @@ -1,0 +1,31 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1c.rd b/binutils/ld/testsuite/ld-i386/no-plt-1c.rd new file mode 100644 index 0000000..bf8cd22 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1c.rd @@ -1,0 +1,14 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1d.dd b/binutils/ld/testsuite/ld-i386/no-plt-1d.dd new file mode 100644 index 0000000..f22a024 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1d.dd @@ -1,0 +1,43 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <.*puts.*> + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+,%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1d.rd b/binutils/ld/testsuite/ld-i386/no-plt-1d.rd new file mode 100644 index 0000000..b7f75a3 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1d.rd @@ -1,0 +1,7 @@ +#readelf: -Wr +#target: i?86-*-* + +#failif +#... +[0-9a-f ]+R_386_GLOB_DAT +.* +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1e.dd b/binutils/ld/testsuite/ld-i386/no-plt-1e.dd new file mode 100644 index 0000000..2787dae 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1e.dd @@ -1,0 +1,43 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: 8d 80 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%eax\),%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call +[a-f0-9]+ <__x86.get_pc_thunk.ax> + +[a-f0-9]+: 05 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%eax + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1e.rd b/binutils/ld/testsuite/ld-i386/no-plt-1e.rd new file mode 100644 index 0000000..4aad3c4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1e.rd @@ -1,0 +1,10 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1f.dd b/binutils/ld/testsuite/ld-i386/no-plt-1f.dd new file mode 100644 index 0000000..5af3471 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1f.dd @@ -1,0 +1,31 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1f.rd b/binutils/ld/testsuite/ld-i386/no-plt-1f.rd new file mode 100644 index 0000000..638dd6d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1f.rd @@ -1,0 +1,16 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1g.dd b/binutils/ld/testsuite/ld-i386/no-plt-1g.dd new file mode 100644 index 0000000..546c16d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1g.dd @@ -1,0 +1,31 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 53 push %ebx + +[a-f0-9]+: e8 ([0-9a-f]{2} ){4}[ ]+call [a-f0-9]+ <__x86.get_pc_thunk.bx> + +[a-f0-9]+: 81 c3 ([0-9a-f]{2} ){4}[ ]+add +\$0x[a-f0-9]+,%ebx + +[a-f0-9]+: 83 ec 08 sub \$0x8,%esp + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3b 83 ([0-9a-f]{2} ){4}[ ]+cmp +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 75 2f jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 22 jne +[0-9a-f]+ + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 15 jne +[0-9a-f]+ + +[a-f0-9]+: 8d 83 ([0-9a-f]{2} ){4}[ ]+lea +-0x[a-f0-9]+\(%ebx\),%eax + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 50 push %eax + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) + +[a-f0-9]+: 83 c4 18 add \$0x18,%esp + +[a-f0-9]+: 5b pop %ebx + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 93 ([0-9a-f]{2} ){4}[ ]+call +\*-0x[0-9a-f]+\(%ebx\) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1g.rd b/binutils/ld/testsuite/ld-i386/no-plt-1g.rd new file mode 100644 index 0000000..bf8cd22 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1g.rd @@ -1,0 +1,14 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1h.dd b/binutils/ld/testsuite/ld-i386/no-plt-1h.dd new file mode 100644 index 0000000..a287a9f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1h.dd @@ -1,0 +1,34 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2c jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1f jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 12 jne +[0-9a-f]+ + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+ + +[a-f0-9]+: 83 c4 1c add \$0x1c,%esp + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+ +#... +[0-9a-f]+ : + +[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1h.rd b/binutils/ld/testsuite/ld-i386/no-plt-1h.rd new file mode 100644 index 0000000..4aad3c4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1h.rd @@ -1,0 +1,10 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort|puts).* +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1i.dd b/binutils/ld/testsuite/ld-i386/no-plt-1i.dd new file mode 100644 index 0000000..d6f93b7 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1i.dd @@ -1,0 +1,33 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp +0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2c jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1f jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 12 jne +[0-9a-f]+ + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+ + +[a-f0-9]+: 83 c4 1c add \$0x1c,%esp + +[a-f0-9]+: c3 ret + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call +\*0x[0-9a-f]+ +#... +[0-9a-f]+ : + +[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4}[ ]+mov +0x[a-f0-9]+,%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp +\*0x[0-9a-f]+ +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1i.rd b/binutils/ld/testsuite/ld-i386/no-plt-1i.rd new file mode 100644 index 0000000..981f76e 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1i.rd @@ -1,0 +1,12 @@ +#readelf: -Wr +#target: i?86-*-* + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym. Value +Symbol's Name +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func) +#... +[0-9a-f ]+R_386_GLOB_DAT +0+ +(abort.*|puts.*|func) +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1j.dd b/binutils/ld/testsuite/ld-i386/no-plt-1j.dd new file mode 100644 index 0000000..80cb75a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1j.dd @@ -1,0 +1,34 @@ +#objdump: -dwrj.text +#target: i?86-*-* + +.*: +file format elf32-i386.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp +\$0x[0-9a-f]+,%eax + +[a-f0-9]+: 75 2c jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1f jne +[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 12 jne +[0-9a-f]+ + +[a-f0-9]+: 83 ec 0c sub \$0xc,%esp + +[a-f0-9]+: 68 ([0-9a-f]{2} ){4}[ ]+push +\$0x[0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ <.*puts.*> + +[a-f0-9]+: 83 c4 1c add \$0x1c,%esp + +[a-f0-9]+: c3 ret + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call [0-9a-f]+ +#... +[0-9a-f]+ : + +[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4}[ ]+lea +0x[a-f0-9]+,%eax + +[a-f0-9]+: c3 ret +#... +[0-9a-f]+ : + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp +[0-9a-f]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-1j.rd b/binutils/ld/testsuite/ld-i386/no-plt-1j.rd new file mode 100644 index 0000000..b7f75a3 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-1j.rd @@ -1,0 +1,7 @@ +#readelf: -Wr +#target: i?86-*-* + +#failif +#... +[0-9a-f ]+R_386_GLOB_DAT +.* +#pass diff --git a/binutils/ld/testsuite/ld-i386/no-plt-check1a.S b/binutils/ld/testsuite/ld-i386/no-plt-check1a.S new file mode 100644 index 0000000..1699dbe 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-check1a.S @@ -1,0 +1,39 @@ + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "PASS" + .text + .p2align 4,,15 + .globl check + .type check, @function +check: + pushl %ebx + call __x86.get_pc_thunk.bx + addl $_GLOBAL_OFFSET_TABLE_, %ebx + subl $8, %esp + call *get_func@GOT(%ebx) + cmpl func@GOT(%ebx), %eax + jne .L3 + call *func@GOT(%ebx) + cmpl $305419896, %eax + jne .L3 + call *call_func@GOT(%ebx) + cmpl $305419896, %eax + jne .L3 + leal .LC0@GOTOFF(%ebx), %eax + subl $12, %esp + pushl %eax + call *puts@GOT(%ebx) + addl $24, %esp + popl %ebx + ret +.L3: + call *abort@GOT(%ebx) + .size check, .-check + .section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat + .globl __x86.get_pc_thunk.bx + .hidden __x86.get_pc_thunk.bx + .type __x86.get_pc_thunk.bx, @function +__x86.get_pc_thunk.bx: + movl (%esp), %ebx + ret + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/no-plt-check1b.S b/binutils/ld/testsuite/ld-i386/no-plt-check1b.S new file mode 100644 index 0000000..d27ab83 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-check1b.S @@ -1,0 +1,28 @@ + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "PASS" + .text + .p2align 4,,15 + .globl check + .type check, @function +check: + subl $12, %esp + call *get_func@GOT + cmpl func@GOT, %eax + jne .L3 + call *func@GOT + cmpl $305419896, %eax + jne .L3 + call *call_func@GOT + cmpl $305419896, %eax + jne .L3 + subl $12, %esp + pushl $.LC0 + call *puts@GOT + addl $28, %esp + ret +.L3: + call *abort@GOT + .size check, .-check + .text + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/no-plt-extern1a.S b/binutils/ld/testsuite/ld-i386/no-plt-extern1a.S new file mode 100644 index 0000000..38d4dd0 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-extern1a.S @@ -1,0 +1,26 @@ + .text + .p2align 4,,15 + .globl get_func + .type get_func, @function +get_func: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + movl func@GOT(%eax), %eax + ret + .size get_func, .-get_func + .p2align 4,,15 + .globl call_func + .type call_func, @function +call_func: + call __x86.get_pc_thunk.ax + addl $_GLOBAL_OFFSET_TABLE_, %eax + jmp *func@GOT(%eax) + .size call_func, .-call_func + .section .text.__x86.get_pc_thunk.ax,"axG",@progbits,__x86.get_pc_thunk.ax,comdat + .globl __x86.get_pc_thunk.ax + .hidden __x86.get_pc_thunk.ax + .type __x86.get_pc_thunk.ax, @function +__x86.get_pc_thunk.ax: + movl (%esp), %eax + ret + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/no-plt-extern1b.S b/binutils/ld/testsuite/ld-i386/no-plt-extern1b.S new file mode 100644 index 0000000..ab35bbe 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-extern1b.S @@ -1,0 +1,16 @@ + .text + .p2align 4,,15 + .globl get_func + .type get_func, @function +get_func: + movl func@GOT, %eax + ret + .size get_func, .-get_func + .p2align 4,,15 + .globl call_func + .type call_func, @function +call_func: + jmp *func@GOT + .size call_func, .-call_func + .section .text.unlikely + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/no-plt-func1.c b/binutils/ld/testsuite/ld-i386/no-plt-func1.c new file mode 100644 index 0000000..ec4040c 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-func1.c @@ -1,0 +1,5 @@ +int +func (void) +{ + return 0x12345678; +} diff --git a/binutils/ld/testsuite/ld-i386/no-plt-main1.c b/binutils/ld/testsuite/ld-i386/no-plt-main1.c new file mode 100644 index 0000000..370275a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt-main1.c @@ -1,0 +1,8 @@ +extern void check (void); + +int +main () +{ + check (); + return 0; +} diff --git a/binutils/ld/testsuite/ld-i386/no-plt.exp b/binutils/ld/testsuite/ld-i386/no-plt.exp new file mode 100644 index 0000000..c4af0a9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/no-plt.exp @@ -1,0 +1,290 @@ +# Expect script for i386 no-PLT tests. +# Copyright (C) 2016 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +# The following tests require running the executable generated by ld, +# or enough of a build environment to create a fully linked executable. +# This is not commonly available when testing a cross-built linker. +if ![isnative] { + return +} + +if ![is_elf_format] { + return +} + +if ![istarget "i?86-*-*"] { + return +} + +# Check to see if the C compiler works +if { [which $CC] == 0 } { + return +} + +run_cc_link_tests [list \ + [list \ + "Build no-plt-func1.o no-plt-main1.o" \ + "" \ + "-fPIE" \ + {no-plt-func1.c no-plt-main1.c} \ + ] \ + [list \ + "Build no-plt-check1a.o no-plt-extern1a.o \ + no-plt-check1b.o no-plt-extern1b.o" \ + "" \ + "-Wa,-mrelax-relocations=yes" \ + {no-plt-check1a.S no-plt-extern1a.S \ + no-plt-check1b.S no-plt-extern1b.S } \ + ] \ + [list \ + "Build libno-plt-1a.so" \ + "-shared tmpdir/no-plt-func1.o" \ + "" \ + {dummy.s} \ + {} \ + "libno-plt-1a.so" \ + ] \ + [list \ + "Build libno-plt-1b.so" \ + "-shared tmpdir/no-plt-extern1a.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr libno-plt-1b.rd} \ + {objdump -dwrj.text libno-plt-1b.dd}} \ + "libno-plt-1b.so" \ + ] \ + [list \ + "No PLT (dynamic 1a)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1a.rd} {objdump -dwrj.text no-plt-1a.dd}} \ + "no-plt-1a" \ + ] \ + [list \ + "No PLT (dynamic 1b)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1b.rd} {objdump -dwrj.text no-plt-1b.dd}} \ + "no-plt-1b" \ + ] \ + [list \ + "No PLT (dynamic 1c)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1c.rd} {objdump -dwrj.text no-plt-1c.dd}} \ + "no-plt-1c" \ + ] \ + [list \ + "No PLT (static 1d)" \ + "-static tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1d.rd} {objdump -dwrj.text no-plt-1d.dd}} \ + "no-plt-1d" \ + ] \ + [list \ + "No PLT (PIE 1e)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1e.rd} {objdump -dwrj.text no-plt-1e.dd}} \ + "no-plt-1e" \ + ] \ + [list \ + "No PLT (PIE 1f)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + {{readelf -Wr no-plt-1f.rd} {objdump -dwrj.text no-plt-1f.dd}} \ + "no-plt-1f" \ + ] \ + [list \ + "No PLT (PIE 1g)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + {{readelf -Wr no-plt-1g.rd} {objdump -dwrj.text no-plt-1g.dd}} \ + "no-plt-1g" \ + ] \ + [list \ + "No PLT (dynamic 1h)" \ + "tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1h.rd} {objdump -dwrj.text no-plt-1h.dd}} \ + "no-plt-1h" \ + ] \ + [list \ + "No PLT (dynamic 1i)" \ + "tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-extern1b.o tmpdir/libno-plt-1a.so" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1i.rd} {objdump -dwrj.text no-plt-1i.dd}} \ + "no-plt-1i" \ + ] \ + [list \ + "No PLT (static 1j)" \ + "-static tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1j.rd} {objdump -dwrj.text no-plt-1j.dd}} \ + "no-plt-1j" \ + ] \ +] + +run_ld_link_exec_tests [] [list \ + [list \ + "No PLT (dynamic 1a)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + { dummy.s } \ + "no-plt-1a" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1b)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1b" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1c)" \ + "tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1c" \ + "pass.out" \ + ] \ + [list \ + "No PLT (static 1d)" \ + "-static tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + { dummy.s } \ + "no-plt-1d" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1e)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1a.o" \ + "" \ + { dummy.s } \ + "no-plt-1e" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1f)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1f" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1g)" \ + "-pie tmpdir/no-plt-check1a.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1g" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1h)" \ + "tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \ + "" \ + {dummy.s} \ + "no-plt-1h" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1i)" \ + "tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-extern1b.o tmpdir/libno-plt-1a.so" \ + "" \ + {dummy.s} \ + "no-plt-1i" \ + "pass.out" \ + ] \ + [list \ + "No PLT (static 1j)" \ + "-static tmpdir/no-plt-check1b.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1b.o" \ + "" \ + {dummy.s} \ + "no-plt-1j" \ + "pass.out" \ + ] \ +] + +# Run-time tests which require working IFUNC support. +if { [check_ifunc_available] } { + run_cc_link_tests [list \ + [list \ + "Build pr20244-3a.o pr20244-3b.o pr20244-3c.o pr20244-3d.o" \ + "" \ + "-fPIC -O2 -g" \ + { pr20244-3a.c pr20244-3b.S pr20244-3c.S pr20244-3d.S } \ + ] \ + ] + + run_ld_link_exec_tests [] [list \ + [list \ + "Run pr20244-3a" \ + "tmpdir/pr20244-3a.o tmpdir/pr20244-3b.o \ + tmpdir/pr20244-3c.o tmpdir/pr20244-3d.o" \ + "" \ + { dummy.c } \ + "pr20244-3a" \ + "pass.out" \ + ] \ + [list \ + "Run pr20244-3b" \ + "--static tmpdir/pr20244-3a.o tmpdir/pr20244-3b.o \ + tmpdir/pr20244-3c.o tmpdir/pr20244-3d.o" \ + "" \ + { dummy.c } \ + "pr20244-3b" \ + "pass.out" \ + ] \ + ] +} diff --git a/binutils/ld/testsuite/ld-i386/pass.out b/binutils/ld/testsuite/ld-i386/pass.out new file mode 100644 index 0000000..7ef22e9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pass.out @@ -1,0 +1,1 @@ +PASS diff --git a/binutils/ld/testsuite/ld-i386/pr19615.d b/binutils/ld/testsuite/ld-i386/pr19615.d new file mode 100644 index 0000000..86aebd1 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19615.d @@ -1,0 +1,13 @@ +#as: --32 +#ld: -pie -Bsymbolic -E -melf_i386 +#readelf: -r --wide --dyn-syms + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name +[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE + + +Symbol table '.dynsym' contains [0-9]+ entries: + Num: Value Size Type Bind Vis Ndx Name +#... +[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy +#... diff --git a/binutils/ld/testsuite/ld-i386/pr19615.s b/binutils/ld/testsuite/ld-i386/pr19615.s new file mode 100644 index 0000000..1d85926 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19615.s @@ -1,0 +1,13 @@ + .text + .globl _start + .type _start, @function +_start: + ret + + .globl xyzzy /* This symbol should be exported */ + .type xyzzy, @function +xyzzy: + ret + + .section ".xyzzy_ptr","aw",%progbits + .dc.a xyzzy diff --git a/binutils/ld/testsuite/ld-i386/pr19827-nacl.rd b/binutils/ld/testsuite/ld-i386/pr19827-nacl.rd new file mode 100644 index 0000000..5d2a885 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19827-nacl.rd @@ -1,0 +1,5 @@ +#readelf: -r --wide + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name +[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE + diff --git a/binutils/ld/testsuite/ld-i386/pr19827.rd b/binutils/ld/testsuite/ld-i386/pr19827.rd new file mode 100644 index 0000000..5d2a885 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19827.rd @@ -1,0 +1,5 @@ +#readelf: -r --wide + +Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Sym. Value Symbol's Name +[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE + diff --git a/binutils/ld/testsuite/ld-i386/pr19827a.S b/binutils/ld/testsuite/ld-i386/pr19827a.S new file mode 100644 index 0000000..cdf1d4b 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19827a.S @@ -1,0 +1,8 @@ + .text + .global _start +_start: + .dc.a foo + .data + .globl foo +foo: + .byte 0 diff --git a/binutils/ld/testsuite/ld-i386/pr19827b.S b/binutils/ld/testsuite/ld-i386/pr19827b.S new file mode 100644 index 0000000..bb46e1d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr19827b.S @@ -1,0 +1,2 @@ + .data + .dc.a foo diff --git a/binutils/ld/testsuite/ld-i386/pr20117.d b/binutils/ld/testsuite/ld-i386/pr20117.d new file mode 100644 index 0000000..59c77ee 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20117.d @@ -1,0 +1,12 @@ +#as: --32 +#ld: -melf_i386 +#objdump: -dw + +.*: +file format .* + + +Disassembly of section .text: + +[a-f0-9]+ <_start>: +[ ]*[a-f0-9]+: eb 8b jmp [a-f0-9]+ <_start\-0x[a-f0-9]+> +[ ]*[a-f0-9]+: bd ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+\,%ebp diff --git a/binutils/ld/testsuite/ld-i386/pr20117.s b/binutils/ld/testsuite/ld-i386/pr20117.s new file mode 100644 index 0000000..de2dd28 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20117.s @@ -1,0 +1,7 @@ + .comm DEBUGLEVEL,4,4 + .text + .globl _start + .type _start, @function +_start: + .byte 0xeb, 0x8b + movl $DEBUGLEVEL@GOT, %ebp diff --git a/binutils/ld/testsuite/ld-i386/pr20244-1.s b/binutils/ld/testsuite/ld-i386/pr20244-1.s new file mode 100644 index 0000000..f22ce62 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-1.s @@ -1,0 +1,17 @@ + .data + .type bar, @object +bar: + .byte 1 + .size bar, .-bar + .globl foo + .type foo, @object +foo: + .byte 1 + .size foo, .-foo + .text + .globl _start + .type _start, @function +_start: + movl $0, bar@GOT + cmpl $0, foo@GOT + movl $bar@GOT, %ecx diff --git a/binutils/ld/testsuite/ld-i386/pr20244-1a.d b/binutils/ld/testsuite/ld-i386/pr20244-1a.d new file mode 100644 index 0000000..46ae4be 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-1a.d @@ -1,0 +1,26 @@ +#source: pr20244-1.s +#as: --32 +#ld: -m elf_i386 +#objdump: --sym -dw +#notarget: i?86-*-nacl* x86_64-*-nacl* + +.*: +file format .* + +SYMBOL TABLE: +#... +0+80490a0 l O .data 00000001 bar +#... +0+8048074 g F .text 00000000 _start +#... +0+80490a1 g O .data 00000001 foo +#... + + + +Disassembly of section .text: + +0+8048074 <_start>: + +[a-f0-9]+: c7 05 8c 90 04 08 00 00 00 00 movl \$0x0,0x804908c + +[a-f0-9]+: 83 3d 90 90 04 08 00 cmpl \$0x0,0x8049090 + +[a-f0-9]+: b9 f8 ff ff ff mov \$0xfffffff8,%ecx +#pass diff --git a/binutils/ld/testsuite/ld-i386/pr20244-1b.d b/binutils/ld/testsuite/ld-i386/pr20244-1b.d new file mode 100644 index 0000000..d8ac4aa 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-1b.d @@ -1,0 +1,11 @@ +#source: pr20244-1.s +#as: --32 +#ld: -m elf_i386 +#objdump: -s -j .got +#notarget: i?86-*-nacl* x86_64-*-nacl* + +.*: +file format .* + +Contents of section .got: + 804908c a0900408 a1900408 +........ + +#pass diff --git a/binutils/ld/testsuite/ld-i386/pr20244-1c.d b/binutils/ld/testsuite/ld-i386/pr20244-1c.d new file mode 100644 index 0000000..c670507 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-1c.d @@ -1,0 +1,4 @@ +#source: pr20244-1.s +#as: --32 +#ld: -pie -m elf_i386 +#error: direct GOT relocation R_386_GOT32 against `bar' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/pr20244-2.s b/binutils/ld/testsuite/ld-i386/pr20244-2.s new file mode 100644 index 0000000..283815a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-2.s @@ -1,0 +1,17 @@ + .text + .globl foo + .type foo, @gnu_indirect_function +foo: + ret + .text + .type bar, @gnu_indirect_function +bar: + ret + .globl _start + .type _start, @function +_start: + call *foo@GOT + jmp *bar@GOT + movl $0, bar@GOT + cmpl $0, foo@GOT + movl $bar@GOT, %ecx diff --git a/binutils/ld/testsuite/ld-i386/pr20244-2a.d b/binutils/ld/testsuite/ld-i386/pr20244-2a.d new file mode 100644 index 0000000..a04902f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-2a.d @@ -1,0 +1,43 @@ +#source: pr20244-2.s +#as: --32 +#ld: -m elf_i386 +#objdump: --sym -dw +#notarget: i?86-*-nacl* x86_64-*-nacl* + +.*: +file format .* + +SYMBOL TABLE: +#... +0+80480b1 l i .text 00000000 bar +#... +0+80480b2 g F .text 00000000 _start +#... +0+80480b0 g i .text 00000000 foo +#... + + +Disassembly of section .plt: + +0+8048090 <.plt>: + +[a-f0-9]+: ff 25 e0 90 04 08 jmp \*0x80490e0 + +[a-f0-9]+: 68 00 00 00 00 push \$0x0 + +[a-f0-9]+: e9 00 00 00 00 jmp 80480a0 + +[a-f0-9]+: ff 25 e4 90 04 08 jmp \*0x80490e4 + +[a-f0-9]+: 68 00 00 00 00 push \$0x0 + +[a-f0-9]+: e9 00 00 00 00 jmp 80480b0 + +Disassembly of section .text: + +0+80480b0 : + +[a-f0-9]+: c3 ret + +0+80480b1 : + +[a-f0-9]+: c3 ret + +0+80480b2 <_start>: + +[a-f0-9]+: ff 15 e0 90 04 08 call \*0x80490e0 + +[a-f0-9]+: ff 25 e4 90 04 08 jmp \*0x80490e4 + +[a-f0-9]+: c7 05 e4 90 04 08 00 00 00 00 movl \$0x0,0x80490e4 + +[a-f0-9]+: 83 3d e0 90 04 08 00 cmpl \$0x0,0x80490e0 + +[a-f0-9]+: b9 10 00 00 00 mov \$0x10,%ecx +#pass diff --git a/binutils/ld/testsuite/ld-i386/pr20244-2b.d b/binutils/ld/testsuite/ld-i386/pr20244-2b.d new file mode 100644 index 0000000..fc0fa17 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-2b.d @@ -1,0 +1,11 @@ +#source: pr20244-2.s +#as: --32 +#ld: -m elf_i386 +#objdump: -s -j .got.plt +#notarget: i?86-*-nacl* x86_64-*-nacl* + +.*: +file format .* + +Contents of section .got.plt: + 80490d4 00000000 00000000 00000000 b0800408 ................ + 80490e4 b1800408 .... diff --git a/binutils/ld/testsuite/ld-i386/pr20244-2c.d b/binutils/ld/testsuite/ld-i386/pr20244-2c.d new file mode 100644 index 0000000..54eee9f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-2c.d @@ -1,0 +1,10 @@ +#source: pr20244-2.s +#as: --32 +#ld: -m elf_i386 +#readelf: -rW +#notarget: i?86-*-nacl* x86_64-*-nacl* + +Relocation section '.rel.plt' at offset 0x74 contains 2 entries: + Offset Info Type Sym. Value Symbol's Name +0+80490e4 0000002a R_386_IRELATIVE +0+80490e0 0000002a R_386_IRELATIVE diff --git a/binutils/ld/testsuite/ld-i386/pr20244-2d.d b/binutils/ld/testsuite/ld-i386/pr20244-2d.d new file mode 100644 index 0000000..c423bf7 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-2d.d @@ -1,0 +1,4 @@ +#source: pr20244-2.s +#as: --32 +#ld: -pie -m elf_i386 +#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object diff --git a/binutils/ld/testsuite/ld-i386/pr20244-3a.c b/binutils/ld/testsuite/ld-i386/pr20244-3a.c new file mode 100644 index 0000000..370275a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-3a.c @@ -1,0 +1,8 @@ +extern void check (void); + +int +main () +{ + check (); + return 0; +} diff --git a/binutils/ld/testsuite/ld-i386/pr20244-3b.S b/binutils/ld/testsuite/ld-i386/pr20244-3b.S new file mode 100644 index 0000000..83880da 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-3b.S @@ -1,0 +1,30 @@ + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "PASS" + .text + .p2align 4,,15 + .globl check + .type check, @function +check: + subl $12, %esp + call *get_func1@GOT + cmpl $func1, %eax + jne .L3 + call *func1@GOT + cmpl $1, %eax + jne .L3 + call *call_func1@GOT + cmpl $1, %eax + jne .L3 + call *call_func2@GOT + cmpl $2, %eax + jne .L3 + subl $12, %esp + pushl $.LC0 + call *puts@GOT + addl $28, %esp + ret +.L3: + call *abort@GOT + .size check, .-check + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/pr20244-3c.S b/binutils/ld/testsuite/ld-i386/pr20244-3c.S new file mode 100644 index 0000000..0b90013 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-3c.S @@ -1,0 +1,15 @@ + .text + .p2align 4,,15 + .globl get_func1 + .type get_func1, @function +get_func1: + movl func1@GOT, %eax + ret + .size get_func1, .-get_func1 + .p2align 4,,15 + .globl call_func1 + .type call_func1, @function +call_func1: + jmp *func1@GOT + .size call_func1, .-call_func1 + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-i386/pr20244-3d.S b/binutils/ld/testsuite/ld-i386/pr20244-3d.S new file mode 100644 index 0000000..a57f3fc 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-i386/pr20244-3d.S @@ -1,0 +1,44 @@ + .text + .p2align 4,,15 + .type implementation1, @function +implementation1: + movl $1, %eax + ret + .size implementation1, .-implementation1 + .p2align 4,,15 + .type implementation2, @function +implementation2: + movl $2, %eax + ret + .size implementation2, .-implementation2 + .p2align 4,,15 + .type resolver2, @function +resolver2: + movl implementation2@GOT, %eax + ret + .size resolver2, .-resolver2 + .type func2, @gnu_indirect_function + .set func2,resolver2 + .p2align 4,,15 + .type resolver1, @function +resolver1: + movl implementation1@GOT, %eax + ret + .size resolver1, .-resolver1 + .globl func1 + .type func1, @gnu_indirect_function + .set func1,resolver1 + .p2align 4,,15 + .globl get_func2 + .type get_func2, @function +get_func2: + movl func2@GOT, %eax + ret + .size get_func2, .-get_func2 + .p2align 4,,15 + .globl call_func2 + .type call_func2, @function +call_func2: + jmp *func2@GOT + .size call_func2, .-call_func2 + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d b/binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d index 53ccd5a..ae75487 100644 --- a/binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d +++ b/binutils/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d @@ -1,4 +1,4 @@ -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 #objdump: -dw #target: x86_64-*-* diff --git a/binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d b/binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d index 53ccd5a..ae75487 100644 --- a/binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d +++ b/binutils/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d @@ -1,4 +1,4 @@ -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 #objdump: -dw #target: x86_64-*-* diff --git a/binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d b/binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d index 18021e7..2ce53a9 100644 --- a/binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d +++ b/binutils/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d @@ -1,5 +1,5 @@ #source: ifunc-5-local-x86-64.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -r -melf_x86_64 #readelf: -r --wide #target: x86_64-*-* diff --git a/binutils/ld/testsuite/ld-plugin/lto.exp b/binutils/ld/testsuite/ld-plugin/lto.exp index 81e72b4..982ffee 100644 --- a/binutils/ld/testsuite/ld-plugin/lto.exp +++ b/binutils/ld/testsuite/ld-plugin/lto.exp @@ -400,9 +400,20 @@ || [istarget "x86_64-*-linux*"] || [istarget "amd64-*-linux*"]) } { set testname "PR ld/12365" - set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"] + set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin -o tmpdir/pr12365 tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"] if { [ regexp "undefined reference to `my_bcopy'" $exec_output ] } { + # Linker should catch the reference to undefined `my_bcopy' + # error caused by a GCC bug. pass $testname + } elseif { [ string match "" $exec_output ] } { + global READELF + set exec_output [run_host_cmd "$READELF" "-s -W tmpdir/pr12365"] + if { [ regexp "my_bcopy" $exec_output ] } { + # Verify that there is no `my_bcopy' symbol in executable. + fail $testname + } { + pass $testname + } } { fail $testname } diff --git a/binutils/ld/testsuite/ld-powerpc/powerpc.exp b/binutils/ld/testsuite/ld-powerpc/powerpc.exp index efb4026..6f9c8ed 100644 --- a/binutils/ld/testsuite/ld-powerpc/powerpc.exp +++ b/binutils/ld/testsuite/ld-powerpc/powerpc.exp @@ -138,6 +138,11 @@ {"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s} {{objdump -dr tlsopt4_32.d}} "tlsopt4_32"} + {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" "" "-a32" {tlsdll_32.s} + {} "tlsdll32.so"} + {"TLS32 opt 5" "-melf32ppc --gc-sections --secure-plt tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s} + {{objdump -dr tlsopt5_32.d}} + "tlsopt5_32"} {"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s} {} "sdalib.so"} {"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s} @@ -203,6 +208,11 @@ {"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s} {{objdump -dr tlsopt4.d}} "tlsopt4"} + {"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s} + {} "tlsdll.so"} + {"TLS opt 5" "-melf64ppc --gc-sections tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s} + {{objdump -dr tlsopt5.d}} + "tlsopt5"} {"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s} {{objdump -dj.data symtocbase.d}} "symtocbase.so"} {"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s} diff --git a/binutils/ld/testsuite/ld-powerpc/tlsdll.s b/binutils/ld/testsuite/ld-powerpc/tlsdll.s new file mode 100644 index 0000000..5620080 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsdll.s @@ -1,0 +1,19 @@ + .abiversion 2 + .global __tls_get_addr,__tls_get_addr_opt,gd,ld + .type __tls_get_addr,@function + .type __tls_get_addr_opt,@function + + .text +__tls_get_addr: +__tls_get_addr_opt: + blr + .size __tls_get_addr,. - __tls_get_addr + .size __tls_get_addr_opt,. - __tls_get_addr_opt + + .section ".tbss","awT",@nobits + .p2align 3 +gd: .space 8 + + .section ".tdata","awT",@progbits + .p2align 2 +ld: .long 0xc0ffee diff --git a/binutils/ld/testsuite/ld-powerpc/tlsdll.ver b/binutils/ld/testsuite/ld-powerpc/tlsdll.ver new file mode 100644 index 0000000..d9439f7 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsdll.ver @@ -1,0 +1,7 @@ +GLIBC_2.3 { + __tls_get_addr; +}; + +GLIBC_2.22 { + __tls_get_addr_opt; +} GLIBC_2.3; diff --git a/binutils/ld/testsuite/ld-powerpc/tlsdll_32.s b/binutils/ld/testsuite/ld-powerpc/tlsdll_32.s new file mode 100644 index 0000000..0f68c21 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsdll_32.s @@ -1,0 +1,18 @@ + .global __tls_get_addr,__tls_get_addr_opt,gd,ld + .type __tls_get_addr,@function + .type __tls_get_addr_opt,@function + + .text +__tls_get_addr: +__tls_get_addr_opt: + blr + .size __tls_get_addr,. - __tls_get_addr + .size __tls_get_addr_opt,. - __tls_get_addr_opt + + .section ".tbss","awT",@nobits + .p2align 2 +gd: .space 4 + + .section ".tdata","awT",@progbits + .p2align 2 +ld: .long 0xc0ffee diff --git a/binutils/ld/testsuite/ld-powerpc/tlsopt5.d b/binutils/ld/testsuite/ld-powerpc/tlsopt5.d new file mode 100644 index 0000000..7b17130 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsopt5.d @@ -1,0 +1,54 @@ +#source: tlsopt5.s +#as: -a64 +#ld: --gc-sections tlsdll.so +#objdump: -dr +#target: powerpc64*-*-* + +.* + +Disassembly of section \.text: + +0000000010000300 <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>: +.*: (00 00 63 e9|e9 63 00 00) ld r11,0\(r3\) +.*: (08 00 83 e9|e9 83 00 08) ld r12,8\(r3\) +.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3 +.*: (00 00 2b 2c|2c 2b 00 00) cmpdi r11,0 +.*: (14 6a 6c 7c|7c 6c 6a 14) add r3,r12,r13 +.*: (20 00 82 4d|4d 82 00 20) beqlr +.*: (78 03 03 7c|7c 03 03 78) mr r3,r0 +.*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +.*: (08 00 61 f9|f9 61 00 08) std r11,8\(r1\) +.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\) +.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +.*: (21 04 80 4e|4e 80 04 21) bctrl +.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\) +.*: (08 00 61 e9|e9 61 00 08) ld r11,8\(r1\) +.*: (a6 03 68 7d|7d 68 03 a6) mtlr r11 +.*: (20 00 80 4e|4e 80 00 20) blr + +0000000010000344 <_start>: +.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760 +.*: (b9 ff ff 4b|4b ff ff b9) bl .* +.*: (00 00 00 60|60 00 00 00) nop +.*: (b8 02 01 00|00 00 00 00) .* +.*: (00 00 00 00|00 01 02 b8) .* + +0000000010000358 <__glink_PLTresolve>: +.*: (a6 02 08 7c|7c 08 02 a6) mflr r0 +.*: (05 00 9f 42|42 9f 00 05) bcl .* +.*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\) +.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 +.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12 +.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11 +.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48 +.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\) +.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2 +.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\) +.*: (20 04 80 4e|4e 80 04 20) bctr +.*: (00 00 00 60|60 00 00 00) nop + +0000000010000390 <__tls_get_addr_opt@plt>: +.*: (c8 ff ff 4b|4b ff ff c8) b .* diff --git a/binutils/ld/testsuite/ld-powerpc/tlsopt5.s b/binutils/ld/testsuite/ld-powerpc/tlsopt5.s new file mode 100644 index 0000000..598bbd9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsopt5.s @@ -1,0 +1,5 @@ + .globl _start +_start: + addi 3,2,gd@got@tlsgd + bl __tls_get_addr(gd@tlsgd) + nop diff --git a/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.d b/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.d new file mode 100644 index 0000000..9749248 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.d @@ -1,0 +1,52 @@ +#source: tlsopt5_32.s +#as: -a32 +#ld: --gc-sections --secure-plt tlsdll32.so +#objdump: -dr +#target: powerpc*-*-* + +.* + +Disassembly of section \.text: + +01800230 <_start>: +.*: (f8 ff 6d 38|38 6d ff f8) addi r3,r13,-8 +.*: (0d 00 00 48|48 00 00 0d) bl 1800240 <__tls_get_addr_opt@plt> + \.\.\. + +01800240 <__tls_get_addr_opt@plt>: +.*: (00 00 63 81|81 63 00 00) lwz r11,0\(r3\) +.*: (04 00 83 81|81 83 00 04) lwz r12,4\(r3\) +.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3 +.*: (00 00 0b 2c|2c 0b 00 00) cmpwi r11,0 +.*: (14 12 6c 7c|7c 6c 12 14) add r3,r12,r2 +.*: (20 00 82 4d|4d 82 00 20) beqlr +.*: (78 03 03 7c|7c 03 03 78) mr r3,r0 +.*: (00 00 00 60|60 00 00 00) nop +.*: (81 01 60 3d|3d 60 01 81) lis r11,385 +.*: (9c 03 6b 81|81 6b 03 9c) lwz r11,924\(r11\) +.*: (a6 03 69 7d|7d 69 03 a6) mtctr r11 +.*: (20 04 80 4e|4e 80 04 20) bctr + +01800270 <__glink>: +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop + +01800280 <__glink_PLTresolve>: +.*: (81 01 80 3d|3d 80 01 81) lis r12,385 +.*: (80 fe 6b 3d|3d 6b fe 80) addis r11,r11,-384 +.*: (94 03 0c 80|80 0c 03 94) lwz r0,916\(r12\) +.*: (90 fd 6b 39|39 6b fd 90) addi r11,r11,-624 +.*: (a6 03 09 7c|7c 09 03 a6) mtctr r0 +.*: (14 5a 0b 7c|7c 0b 5a 14) add r0,r11,r11 +.*: (98 03 8c 81|81 8c 03 98) lwz r12,920\(r12\) +.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11 +.*: (20 04 80 4e|4e 80 04 20) bctr +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop +.*: (00 00 00 60|60 00 00 00) nop diff --git a/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.s b/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.s new file mode 100644 index 0000000..36b4858 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-powerpc/tlsopt5_32.s @@ -1,0 +1,4 @@ + .globl _start +_start: + addi 3,13,gd@got@tlsgd + bl __tls_get_addr(gd@tlsgd) diff --git a/binutils/ld/testsuite/ld-x86-64/call1a.d b/binutils/ld/testsuite/ld-x86-64/call1a.d index 2a63b1c..2b131ee 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1a.d +++ b/binutils/ld/testsuite/ld-x86-64/call1a.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1b.d b/binutils/ld/testsuite/ld-x86-64/call1b.d index e782fa2..e2fef07 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1b.d +++ b/binutils/ld/testsuite/ld-x86-64/call1b.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=prefix-addr #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1c.d b/binutils/ld/testsuite/ld-x86-64/call1c.d index d058fc7..7fe8056 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1c.d +++ b/binutils/ld/testsuite/ld-x86-64/call1c.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=prefix-nop #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1d.d b/binutils/ld/testsuite/ld-x86-64/call1d.d index 8871cc6..c93756b 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1d.d +++ b/binutils/ld/testsuite/ld-x86-64/call1d.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=suffix-nop #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1e.d b/binutils/ld/testsuite/ld-x86-64/call1e.d index 7127f1a..c7c467c 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1e.d +++ b/binutils/ld/testsuite/ld-x86-64/call1e.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=prefix-0x67 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1f.d b/binutils/ld/testsuite/ld-x86-64/call1f.d index 587bade..d0c3f11 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1f.d +++ b/binutils/ld/testsuite/ld-x86-64/call1f.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=prefix-0x90 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1g.d b/binutils/ld/testsuite/ld-x86-64/call1g.d index 3bb512e..6a8d790 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1g.d +++ b/binutils/ld/testsuite/ld-x86-64/call1g.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=suffix-0x90 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1h.d b/binutils/ld/testsuite/ld-x86-64/call1h.d index c7c8dde..f8e1d07 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1h.d +++ b/binutils/ld/testsuite/ld-x86-64/call1h.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 -z call-nop=suffix-144 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/call1i.d b/binutils/ld/testsuite/ld-x86-64/call1i.d index b3684ad..d5a157b 100644 --- a/binutils/ld/testsuite/ld-x86-64/call1i.d +++ b/binutils/ld/testsuite/ld-x86-64/call1i.d @@ -1,5 +1,5 @@ #source: call1.s -#as: --x32 +#as: --x32 -mrelax-relocations=yes #ld: -melf32_x86_64 -z call-nop=suffix-0x90 #objdump: -dw diff --git a/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.dd b/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.dd new file mode 100644 index 0000000..2892ce4 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.dd @@ -1,0 +1,15 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: c3 retq +#... +[0-9a-f]+ : + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.rd b/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.rd new file mode 100644 index 0000000..954e4a5 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/libno-plt-1b.rd @@ -1,0 +1,8 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +func \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/load1a.d b/binutils/ld/testsuite/ld-x86-64/load1a.d index 5c9349e..0eb4880 100644 --- a/binutils/ld/testsuite/ld-x86-64/load1a.d +++ b/binutils/ld/testsuite/ld-x86-64/load1a.d @@ -1,5 +1,5 @@ #source: load1.s -#as: --64 +#as: --64 -mrelax-relocations=yes #ld: -melf_x86_64 #objdump: -dw --sym #notarget: x86_64-*-nacl* diff --git a/binutils/ld/testsuite/ld-x86-64/load1b.d b/binutils/ld/testsuite/ld-x86-64/load1b.d index 70ef274..8827f38 100644 --- a/binutils/ld/testsuite/ld-x86-64/load1b.d +++ b/binutils/ld/testsuite/ld-x86-64/load1b.d @@ -1,5 +1,5 @@ #source: load1.s -#as: --x32 +#as: --x32 -mrelax-relocations=yes #ld: -melf32_x86_64 #objdump: -dw --sym #notarget: x86_64-*-nacl* diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1a.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1a.dd new file mode 100644 index 0000000..5c9a7cc 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1a.dd @@ -1,0 +1,32 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#... +[0-9a-f]+ : + +[a-f0-9]+: 4(0|8) 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[a-f0-9]+\(%rip\),%(e|r)ax +# [a-f0-9]+ + +[a-f0-9]+: c3 retq +#... +[0-9a-f]+ : + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1a.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1a.rd new file mode 100644 index 0000000..7336534 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1a.rd @@ -1,0 +1,10 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1b.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1b.dd new file mode 100644 index 0000000..ccdc489 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1b.dd @@ -1,0 +1,24 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1b.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1b.rd new file mode 100644 index 0000000..3e6ad0a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1b.rd @@ -1,0 +1,16 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1c.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1c.dd new file mode 100644 index 0000000..2e09a60 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1c.dd @@ -1,0 +1,24 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1c.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1c.rd new file mode 100644 index 0000000..2c9ef0c 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1c.rd @@ -1,0 +1,14 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1d.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1d.dd new file mode 100644 index 0000000..f4b2721 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1d.dd @@ -1,0 +1,33 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ <.*puts.*> + +[a-f0-9]+: 90 nop + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ +#... +[0-9a-f]+ : + +[a-f0-9]+: 4(0|8) 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[a-f0-9]+\(%rip\),%(e|r)ax +# [a-f0-9]+ + +[a-f0-9]+: c3 retq +#... +[0-9a-f]+ : + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1d.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1d.rd new file mode 100644 index 0000000..814d364 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1d.rd @@ -1,0 +1,7 @@ +#readelf: -Wr +#target: x86_64-*-* + +#failif +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +.* +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1e.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1e.dd new file mode 100644 index 0000000..b0342de 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1e.dd @@ -1,0 +1,32 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ + +[a-f0-9]+: c3 retq +#... +[0-9a-f]+ : + +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq [a-f0-9]+ + +[a-f0-9]+: 90 nop +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1e.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1e.rd new file mode 100644 index 0000000..7336534 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1e.rd @@ -1,0 +1,10 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort|puts).* \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1f.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1f.dd new file mode 100644 index 0000000..ccdc489 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1f.dd @@ -1,0 +1,24 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1f.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1f.rd new file mode 100644 index 0000000..3e6ad0a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1f.rd @@ -1,0 +1,16 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func|func) \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1g.dd b/binutils/ld/testsuite/ld-x86-64/no-plt-1g.dd new file mode 100644 index 0000000..0c97097 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1g.dd @@ -1,0 +1,24 @@ +#objdump: -dwrj.text +#target: x86_64-*-* + +.*: +file format elf.*-x86-64.* + +Disassembly of section .text: + +#... +[0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp + +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> + +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-1g.rd b/binutils/ld/testsuite/ld-x86-64/no-plt-1g.rd new file mode 100644 index 0000000..2c9ef0c 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-1g.rd @@ -1,0 +1,14 @@ +#readelf: -Wr +#target: x86_64-*-* + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + +Offset +Info +Type +Sym.* Value +Symbol's Name \+ Addend +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#... +[0-9a-f ]+R_X86_64_GLOB_DAT +0+ +(abort.*|puts.*|get_func|call_func).* \+ 0 +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-check1.S b/binutils/ld/testsuite/ld-x86-64/no-plt-check1.S new file mode 100644 index 0000000..5bacb3f 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-check1.S @@ -1,0 +1,25 @@ + .section .rodata.str1.1,"aMS",@progbits,1 +.LC0: + .string "PASS" + .text + .p2align 4,,15 + .globl check + .type check, @function +check: + subq $8, %rsp + call *get_func@GOTPCREL(%rip) + cmpq func@GOTPCREL(%rip), %rax + jne .L3 + call *func@GOTPCREL(%rip) + cmpl $305419896, %eax + jne .L3 + call *call_func@GOTPCREL(%rip) + cmpl $305419896, %eax + jne .L3 + leaq .LC0(%rip), %rdi + addq $8, %rsp + jmp *puts@GOTPCREL(%rip) +.L3: + call *abort@GOTPCREL(%rip) + .size check, .-check + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-extern1.S b/binutils/ld/testsuite/ld-x86-64/no-plt-extern1.S new file mode 100644 index 0000000..3957f39 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-extern1.S @@ -1,0 +1,15 @@ + .text + .p2align 4,,15 + .globl get_func + .type get_func, @function +get_func: + movq func@GOTPCREL(%rip), %rax + ret + .size get_func, .-get_func + .p2align 4,,15 + .globl call_func + .type call_func, @function +call_func: + jmp *func@GOTPCREL(%rip) + .size call_func, .-call_func + .section .note.GNU-stack,"",@progbits diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-func1.c b/binutils/ld/testsuite/ld-x86-64/no-plt-func1.c new file mode 100644 index 0000000..ec4040c 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-func1.c @@ -1,0 +1,5 @@ +int +func (void) +{ + return 0x12345678; +} diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt-main1.c b/binutils/ld/testsuite/ld-x86-64/no-plt-main1.c new file mode 100644 index 0000000..370275a 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt-main1.c @@ -1,0 +1,8 @@ +extern void check (void); + +int +main () +{ + check (); + return 0; +} diff --git a/binutils/ld/testsuite/ld-x86-64/no-plt.exp b/binutils/ld/testsuite/ld-x86-64/no-plt.exp new file mode 100644 index 0000000..d57ccb5 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/no-plt.exp @@ -1,0 +1,201 @@ +# Expect script for x86-64 no-PLT tests. +# Copyright (C) 2016 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +# The following tests require running the executable generated by ld, +# or enough of a build environment to create a fully linked executable. +# This is not commonly available when testing a cross-built linker. +if ![isnative] { + return +} + +if ![is_elf_format] { + return +} + +if ![istarget "x86_64-*-*"] { + return +} + +# Check to see if the C compiler works +if { [which $CC] == 0 } { + return +} + +run_cc_link_tests [list \ + [list \ + "Build no-plt-func1.o no-plt-main1.o" \ + "" \ + "-fPIE" \ + {no-plt-func1.c no-plt-main1.c} \ + ] \ + [list \ + "Build no-plt-check1.o no-plt-extern1.o" \ + "" \ + "-Wa,-mrelax-relocations=yes" \ + {no-plt-check1.S no-plt-extern1.S} \ + ] \ + [list \ + "Build libno-plt-1a.so" \ + "-shared tmpdir/no-plt-func1.o" \ + "" \ + {dummy.s} \ + {} \ + "libno-plt-1a.so" \ + ] \ + [list \ + "Build libno-plt-1b.so" \ + "-shared tmpdir/no-plt-extern1.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr libno-plt-1b.rd} \ + {objdump -dwrj.text libno-plt-1b.dd}} \ + "libno-plt-1b.so" \ + ] \ + [list \ + "No PLT (dynamic 1a)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1a.rd} {objdump -dwrj.text no-plt-1a.dd}} \ + "no-plt-1a" \ + ] \ + [list \ + "No PLT (dynamic 1b)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1b.rd} {objdump -dwrj.text no-plt-1b.dd}} \ + "no-plt-1b" \ + ] \ + [list \ + "No PLT (dynamic 1c)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1c.rd} {objdump -dwrj.text no-plt-1c.dd}} \ + "no-plt-1c" \ + ] \ + [list \ + "No PLT (static 1d)" \ + "-static tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1d.rd} {objdump -dwrj.text no-plt-1d.dd}} \ + "no-plt-1d" \ + ] \ + [list \ + "No PLT (PIE 1e)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + {dummy.s} \ + {{readelf -Wr no-plt-1e.rd} {objdump -dwrj.text no-plt-1e.dd}} \ + "no-plt-1e" \ + ] \ + [list \ + "No PLT (PIE 1f)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + {{readelf -Wr no-plt-1f.rd} {objdump -dwrj.text no-plt-1f.dd}} \ + "no-plt-1f" \ + ] \ + [list \ + "No PLT (PIE 1g)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + {{readelf -Wr no-plt-1g.rd} {objdump -dwrj.text no-plt-1g.dd}} \ + "no-plt-1g" \ + ] \ +] + +run_ld_link_exec_tests [] [list \ + [list \ + "No PLT (dynamic 1a)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + { dummy.s } \ + "no-plt-1a" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1b)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1b" \ + "pass.out" \ + ] \ + [list \ + "No PLT (dynamic 1c)" \ + "tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1c" \ + "pass.out" \ + ] \ + [list \ + "No PLT (static 1d)" \ + "-static tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + { dummy.s } \ + "no-plt-1d" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1e)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/no-plt-extern1.o" \ + "" \ + { dummy.s } \ + "no-plt-1e" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1f)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/libno-plt-1a.so tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1f" \ + "pass.out" \ + ] \ + [list \ + "No PLT (PIE 1g)" \ + "-pie tmpdir/no-plt-check1.o tmpdir/no-plt-main1.o \ + tmpdir/no-plt-func1.o tmpdir/libno-plt-1b.so" \ + "" \ + { dummy.s } \ + "no-plt-1g" \ + "pass.out" \ + ] \ +] diff --git a/binutils/ld/testsuite/ld-x86-64/pass.out b/binutils/ld/testsuite/ld-x86-64/pass.out new file mode 100644 index 0000000..7ef22e9 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pass.out @@ -1,0 +1,1 @@ +PASS diff --git a/binutils/ld/testsuite/ld-x86-64/pr18591.d b/binutils/ld/testsuite/ld-x86-64/pr18591.d new file mode 100644 index 0000000..9f60622 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr18591.d @@ -1,0 +1,12 @@ +#as: --64 +#ld: -melf_x86_64 -shared -z max-page-size=0x200000 +#objdump: -dw + +.*: +file format .* + + +Disassembly of section .text: + +[a-f0-9]+ : +[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +#pass diff --git a/binutils/ld/testsuite/ld-x86-64/pr18591.s b/binutils/ld/testsuite/ld-x86-64/pr18591.s new file mode 100644 index 0000000..d726f08 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr18591.s @@ -1,0 +1,8 @@ + .hidden foo + .comm pad,0x80000000,8 + .comm foo,8,8 + .text + .globl bar + .type bar, @function +bar: + movq foo@GOTPCREL(%rip), %rax diff --git a/binutils/ld/testsuite/ld-x86-64/pr19615.d b/binutils/ld/testsuite/ld-x86-64/pr19615.d new file mode 100644 index 0000000..f09bcf3 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19615.d @@ -1,0 +1,13 @@ +#as: --64 +#ld: -pie -Bsymbolic -E -melf_x86_64 +#readelf: -r --wide --dyn-syms + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Symbol's Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9]+ + +Symbol table '.dynsym' contains [0-9]+ entries: + Num: Value Size Type Bind Vis Ndx Name +#... +[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy +#... diff --git a/binutils/ld/testsuite/ld-x86-64/pr19615.s b/binutils/ld/testsuite/ld-x86-64/pr19615.s new file mode 100644 index 0000000..1d85926 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19615.s @@ -1,0 +1,13 @@ + .text + .globl _start + .type _start, @function +_start: + ret + + .globl xyzzy /* This symbol should be exported */ + .type xyzzy, @function +xyzzy: + ret + + .section ".xyzzy_ptr","aw",%progbits + .dc.a xyzzy diff --git a/binutils/ld/testsuite/ld-x86-64/pr19827-nacl.rd b/binutils/ld/testsuite/ld-x86-64/pr19827-nacl.rd new file mode 100644 index 0000000..67eaacc 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19827-nacl.rd @@ -1,0 +1,5 @@ +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Symbol's Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+ diff --git a/binutils/ld/testsuite/ld-x86-64/pr19827.rd b/binutils/ld/testsuite/ld-x86-64/pr19827.rd new file mode 100644 index 0000000..67eaacc 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19827.rd @@ -1,0 +1,5 @@ +#readelf: -r --wide + +Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: + Offset Info Type Symbol's Value Symbol's Name \+ Addend +[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+ diff --git a/binutils/ld/testsuite/ld-x86-64/pr19827a.S b/binutils/ld/testsuite/ld-x86-64/pr19827a.S new file mode 100644 index 0000000..cdf1d4b 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19827a.S @@ -1,0 +1,8 @@ + .text + .global _start +_start: + .dc.a foo + .data + .globl foo +foo: + .byte 0 diff --git a/binutils/ld/testsuite/ld-x86-64/pr19827b.S b/binutils/ld/testsuite/ld-x86-64/pr19827b.S new file mode 100644 index 0000000..bb46e1d 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr19827b.S @@ -1,0 +1,2 @@ + .data + .dc.a foo diff --git a/binutils/ld/testsuite/ld-x86-64/pr20093-1.d b/binutils/ld/testsuite/ld-x86-64/pr20093-1.d new file mode 100644 index 0000000..de81443 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr20093-1.d @@ -1,0 +1,11 @@ +#as: --64 +#ld: -pie -melf_x86_64 +#objdump: -dw + +.*: +file format .* + + +Disassembly of section .text: + +[a-f0-9]+ <_start>: +[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> diff --git a/binutils/ld/testsuite/ld-x86-64/pr20093-1.s b/binutils/ld/testsuite/ld-x86-64/pr20093-1.s new file mode 100644 index 0000000..c86a21e 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr20093-1.s @@ -1,0 +1,11 @@ + .section .lbss,"aw",@nobits +foo1: + .space 1073741824 + .space 1073741824 + .space 1073741824 + .text + .globl _start + .type _start, @function +_start: + movq foo1@GOTPCREL(%rip), %rax + .size _start, .-_start diff --git a/binutils/ld/testsuite/ld-x86-64/pr20093-2.d b/binutils/ld/testsuite/ld-x86-64/pr20093-2.d new file mode 100644 index 0000000..de81443 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr20093-2.d @@ -1,0 +1,11 @@ +#as: --64 +#ld: -pie -melf_x86_64 +#objdump: -dw + +.*: +file format .* + + +Disassembly of section .text: + +[a-f0-9]+ <_start>: +[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> diff --git a/binutils/ld/testsuite/ld-x86-64/pr20093-2.s b/binutils/ld/testsuite/ld-x86-64/pr20093-2.s new file mode 100644 index 0000000..cfbe9c2 100644 --- /dev/null +++ b/binutils/ld/testsuite/ld-x86-64/pr20093-2.s @@ -1,0 +1,9 @@ + .largecomm foo1,1073741824,32 + .largecomm foo2,1073741824,32 + .largecomm foo3,1073741824,32 + .text + .globl _start + .type _start, @function +_start: + movq foo1@GOTPCREL(%rip), %rax + .size _start, .-_start diff --git a/binutils/ld/testsuite/ld-x86-64/x86-64.exp b/binutils/ld/testsuite/ld-x86-64/x86-64.exp index 45b7f09..484d5e3 100644 --- a/binutils/ld/testsuite/ld-x86-64/x86-64.exp +++ b/binutils/ld/testsuite/ld-x86-64/x86-64.exp @@ -148,6 +148,14 @@ "--64" {pr17709a.s} {} "libpr17709.so"} {"PR ld/17709 (2)" "-melf_x86_64 tmpdir/libpr17709.so" "" "--64" {pr17709b.s} {{readelf -rW pr17709.rd}} "pr17709"} + {"Build pr19827a.o" "" "" + "--64" { pr19827a.S }} + {"Build pr19827b.so" "-melf_x86_64 -shared" "" + "--64" { pr19827b.S } {} "pr19827b.so"} + {"Build pr19827" "-melf_x86_64 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" "" + "--64" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"} + {"Build pr19827.so" "-melf_x86_64 -shared -Bsymbolic" "" + "--64" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"} } # So as to avoid rewriting every last test case here in a nacl variant, @@ -239,6 +247,8 @@ run_dump_test "pr14207" run_dump_test "gotplt1" run_dump_test "pie1" +run_dump_test "pr20093-1" +run_dump_test "pr20093-2" if { ![istarget "x86_64-*-linux*"] && ![istarget "x86_64-*-nacl*"]} { return @@ -353,6 +363,8 @@ run_dump_test "pr19013-nacl" run_dump_test "pr19162" run_dump_test "pr19175" +run_dump_test "pr18591" +run_dump_test "pr19615" # Add $PLT_CFLAGS if PLT is expected. global PLT_CFLAGS @@ -391,7 +403,7 @@ [list \ "Build libplt-main1.a" \ "" \ - "-fPIC" \ + "-fPIC -Wa,-mrelax-relocations=yes" \ { plt-main1.c } \ {{readelf {-Wr} plt-main1.rd}} \ "libplt-main1.a" \ @@ -399,7 +411,7 @@ [list \ "Build libplt-main2.a" \ "" \ - "-fPIC" \ + "-fPIC -Wa,-mrelax-relocations=yes" \ { plt-main2.c } \ {{readelf {-Wr} plt-main2.rd}} \ "libplt-main2.a" \ @@ -407,7 +419,7 @@ [list \ "Build libplt-main3.a" \ "" \ - "-fPIC $PLT_CFLAGS" \ + "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ { plt-main3.c } \ {{readelf {-Wr} plt-main3.rd}} \ "libplt-main3.a" \ @@ -415,7 +427,7 @@ [list \ "Build libplt-main4.a" \ "" \ - "-fPIC $PLT_CFLAGS" \ + "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ { plt-main4.c } \ {{readelf {-Wr} plt-main4.rd}} \ "libplt-main4.a" \ @@ -447,18 +459,26 @@ "copyreloc-lib.so" \ ] \ [list \ - "Build copyreloc-main with PIE without -fPIE (1)" \ - "tmpdir/copyreloc-lib.so -pie" \ + "Build libcopyreloc-main.a" \ + "" \ "" \ { copyreloc-main.S } \ + {} \ + "libcopyreloc-main.a" \ + ] \ + [list \ + "Build copyreloc-main with PIE without -fPIE (1)" \ + "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ + "" \ + { dummy.s } \ {{readelf {-Wr} copyreloc-main1.rd}} \ "copyreloc-main" \ ] \ [list \ "Build copyreloc-main with PIE without -fPIE (2)" \ - "tmpdir/copyreloc-lib.so -pie" \ + "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ "" \ - { copyreloc-main.S } \ + { dummy.s } \ {{readelf {-Wr} copyreloc-main2.rd}} \ "copyreloc-main" \ ] \ @@ -479,26 +499,33 @@ "pr17689now.so" \ ] \ [list \ - "Build pr17689 with PIE without -fPIE" \ - "tmpdir/pr17689.so -pie" \ + "Build pr17689b.o" \ "" \ + "" \ { pr17689b.S } \ + {} \ + ] \ + [list \ + "Build pr17689 with PIE without -fPIE" \ + "tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \ + "" \ + { dummy.s } \ {{readelf {-Wr} pr17689.rd}} \ "pr17689" \ ] \ [list \ "Build pr17689 with PIE -z now without -fPIE" \ - "tmpdir/pr17689.so -pie -Wl,-z,now" \ + "tmpdir/pr17689b.o tmpdir/pr17689.so -pie -Wl,-z,now" \ "" \ - { pr17689b.S } \ + { dummy.s } \ {{readelf {-Wr} pr17689now.rd}} \ "pr17689now" \ ] \ [list \ "Build pr17827 with PIE without -fPIE" \ - "tmpdir/pr17689.so -pie" \ + "-Wl,--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \ "" \ - { pr17689b.S } \ + { dummy.s } \ {{readelf {-Wr} pr17827.rd}} \ "pr17827" \ ] \ @@ -511,18 +538,26 @@ "pr18900.so" \ ] \ [list \ - "Build pr18900a" \ - "tmpdir/pr18900.so" \ + "Build pr18900.o" \ + "-r -nostdlib" \ "" \ { pr18900b.c pr18900c.c } \ + "" \ + "pr18900.o" \ + ] \ + [list \ + "Build pr18900a" \ + "tmpdir/pr18900.o tmpdir/pr18900.so" \ + "" \ + { dummy.s } \ {{readelf {-Wrd} pr18900a.rd}} \ "pr18900a" \ ] \ [list \ "Build pr18900b" \ - "tmpdir/pr18900.so" \ + "-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \ "" \ - { pr18900b.c pr18900c.c } \ + { dummy.s } \ {{readelf {-Wrd} pr18900b.rd}} \ "pr18900b" \ ] \ @@ -543,10 +578,18 @@ "gotpcrel1d.so" \ ] \ [list \ - "Build gotpcrel1" \ - "tmpdir/gotpcrel1d.so" \ + "Build libgotpcrel1.a" \ "" \ + "" \ { gotpcrel1a.S gotpcrel1b.c gotpcrel1c.c } \ + "" \ + "libgotpcrel1.a" \ + ] \ + [list \ + "Build gotpcrel1" \ + "-Wl,--as-needed tmpdir/gotpcrel1a.o tmpdir/gotpcrel1b.o tmpdir/gotpcrel1c.o tmpdir/gotpcrel1d.so" \ + "-Wa,-mrelax-relocations=yes" \ + { dummy.s } \ {{objdump {-dw} gotpcrel1.dd}} \ "gotpcrel1" \ ] \ @@ -590,33 +633,33 @@ ] \ [list \ "Run copyreloc-main with PIE without -fPIE" \ - "tmpdir/copyreloc-lib.so -pie" \ + "--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \ "" \ - { copyreloc-main.S } \ + { dummy.s } \ "copyreloc-main" \ "copyreloc-main.out" \ ] \ [list \ "Run pr17689 with PIE without -fPIE" \ - "tmpdir/pr17689.so -pie" \ + "tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \ "" \ - { pr17689b.S } \ + { dummy.s } \ "pr17689" \ "pr17689.out" \ ] \ [list \ "Run pr17689 with PIE -z now without -fPIE" \ - "tmpdir/pr17689.so -pie -z now" \ + "--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie -z now" \ "" \ - { pr17689b.S } \ + { dummy.s } \ "pr17689now" \ "pr17689.out" \ ] \ [list \ "Run pr18900" \ - "tmpdir/pr18900.so" \ + "tmpdir/pr18900.o tmpdir/pr18900.so" \ "" \ - { pr18900b.c pr18900c.c } \ + { dummy.s } \ "pr18900" \ "pr18900.out" \ ] \ diff --git a/binutils/gas/testsuite/gas/i386/disp32.d b/binutils/gas/testsuite/gas/i386/disp32.d index a3255fa..24ada81 100644 --- a/binutils/gas/testsuite/gas/i386/disp32.d +++ b/binutils/gas/testsuite/gas/i386/disp32.d @@ -15,11 +15,12 @@ [ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx [ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx [ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx -[ ]*[a-f0-9]+: eb 07 jmp 26 -[ ]*[a-f0-9]+: eb 05 jmp 26 -[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 +[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3 +[ ]*[a-f0-9]+: eb 07 jmp 30 +[ ]*[a-f0-9]+: eb 05 jmp 30 +[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 -0+26 : +0+30 : [ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\) [ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\) [ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\) @@ -27,4 +28,5 @@ [ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\) [ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\) [ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\) +[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3 #pass diff --git a/binutils/gas/testsuite/gas/i386/disp32.s b/binutils/gas/testsuite/gas/i386/disp32.s index c3bec3a..fa85ae5 100644 --- a/binutils/gas/testsuite/gas/i386/disp32.s +++ b/binutils/gas/testsuite/gas/i386/disp32.s @@ -9,6 +9,8 @@ mov.d32 (%eax),%ebx mov.d32 3(%eax),%ebx + vmovdqu64.d32 -0x40(%eax),%xmm3 + jmp foo jmp.d8 foo jmp.d32 foo @@ -24,3 +26,5 @@ mov.d32 DWORD PTR [eax], ebx mov.d32 DWORD PTR [eax+3], ebx + + vmovdqu64.d32 xmm3,XMMWORD PTR [eax-0x40] diff --git a/binutils/gas/testsuite/gas/i386/got-no-relax.d b/binutils/gas/testsuite/gas/i386/got-no-relax.d new file mode 100644 index 0000000..6bf138a 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/i386/got-no-relax.d @@ -1,0 +1,31 @@ +#source: got.s +#as: -mrelax-relocations=no +#objdump: -dwr + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 1: R_386_GOT32 foo +[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 7: R_386_GOT32X foo +[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax d: R_386_GOT32 foo +[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 12: R_386_GOT32 foo +[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 18: R_386_GOT32X foo +[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 1e: R_386_GOT32 foo +[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 24: R_386_GOT32X foo +[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 2a: R_386_GOT32 foo +[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 30: R_386_GOT32X foo +[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 36: R_386_GOT32 foo +[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 3b: R_386_GOT32 foo +[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 41: R_386_GOT32X foo +[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax 47: R_386_GOT32 foo +[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 4c: R_386_GOT32 foo +[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 52: R_386_GOT32X foo +[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 58: R_386_GOT32 foo +[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 5e: R_386_GOT32 foo +[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 64: R_386_GOT32X foo +[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 6a: R_386_GOT32 foo +[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 70: R_386_GOT32X foo +#pass diff --git a/binutils/gas/testsuite/gas/i386/got.d b/binutils/gas/testsuite/gas/i386/got.d index f76ca47..7621cdf 100644 --- a/binutils/gas/testsuite/gas/i386/got.d +++ b/binutils/gas/testsuite/gas/i386/got.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #objdump: -dwr .*: +file format .* diff --git a/binutils/gas/testsuite/gas/i386/i386.exp b/binutils/gas/testsuite/gas/i386/i386.exp index d881cd8..9ad7a9e 100644 --- a/binutils/gas/testsuite/gas/i386/i386.exp +++ b/binutils/gas/testsuite/gas/i386/i386.exp @@ -406,6 +406,7 @@ run_dump_test "relax-4" run_dump_test "got" + run_dump_test "got-no-relax" if {![istarget "*-*-nacl*"]} then { run_dump_test "iamcu-1" @@ -784,6 +785,7 @@ run_list_test "x86-64-branch-3" "-al -mintel64" run_dump_test "x86-64-gotpcrel" + run_dump_test "x86-64-gotpcrel-no-relax" } set ASFLAGS "$old_ASFLAGS" diff --git a/binutils/gas/testsuite/gas/i386/localpic.d b/binutils/gas/testsuite/gas/i386/localpic.d index 04fb5ce..0a5eec5 100644 --- a/binutils/gas/testsuite/gas/i386/localpic.d +++ b/binutils/gas/testsuite/gas/i386/localpic.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #readelf: -rs #name: i386 local PIC diff --git a/binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d b/binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d index 9affc36..a2ef6a0 100644 --- a/binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d +++ b/binutils/gas/testsuite/gas/i386/mixed-mode-reloc32.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #objdump: -r #source: mixed-mode-reloc.s #name: x86 mixed mode relocs (32-bit object) diff --git a/binutils/gas/testsuite/gas/i386/reloc32.d b/binutils/gas/testsuite/gas/i386/reloc32.d index 45c9cd2..b6e1bbd 100644 --- a/binutils/gas/testsuite/gas/i386/reloc32.d +++ b/binutils/gas/testsuite/gas/i386/reloc32.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #objdump: -Drw #name: i386 relocs diff --git a/binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d b/binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d index c6bdbc5..ff2a3d1 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d +++ b/binutils/gas/testsuite/gas/i386/x86-64-avx512f-intel.d @@ -3666,6 +3666,7 @@ [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\] [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\] [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\] +[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\] @@ -10686,6 +10687,7 @@ [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8-0x7b\] [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\] [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\] +[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\] [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\] diff --git a/binutils/gas/testsuite/gas/i386/x86-64-avx512f.d b/binutils/gas/testsuite/gas/i386/x86-64-avx512f.d index d672fa5..2db0b3e 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-avx512f.d +++ b/binutils/gas/testsuite/gas/i386/x86-64-avx512f.d @@ -3665,6 +3665,7 @@ [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\} [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\} [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\} +[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\} @@ -10685,6 +10686,7 @@ [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd -0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\} [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\} [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\} +[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\} diff --git a/binutils/gas/testsuite/gas/i386/x86-64-avx512f.s b/binutils/gas/testsuite/gas/i386/x86-64-avx512f.s index fa42326..e2cbb12 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-avx512f.s +++ b/binutils/gas/testsuite/gas/i386/x86-64-avx512f.s @@ -3973,6 +3973,7 @@ vgatherqpd 123(%r14,%zmm31,8), %zmm30{%k1} # AVX512F vgatherqpd 256(%r9,%zmm31), %zmm30{%k1} # AVX512F vgatherqpd 1024(%rcx,%zmm31,4), %zmm30{%k1} # AVX512F + vgatherqpd 123(%r14,%zmm19,8), %zmm3{%k1} # AVX512F vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F @@ -11630,6 +11631,7 @@ vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F vgatherqpd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F vgatherqpd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F + vgatherqpd zmm3{k1}, ZMMWORD PTR [r14+zmm19*8+123] # AVX512F vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F diff --git a/binutils/gas/testsuite/gas/i386/x86-64-disp32.d b/binutils/gas/testsuite/gas/i386/x86-64-disp32.d index 8e307ee..da5dcb0 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-disp32.d +++ b/binutils/gas/testsuite/gas/i386/x86-64-disp32.d @@ -15,11 +15,12 @@ [ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx [ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx [ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx -[ ]*[a-f0-9]+: eb 07 jmp 26 -[ ]*[a-f0-9]+: eb 05 jmp 26 -[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 +[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3 +[ ]*[a-f0-9]+: eb 07 jmp 30 +[ ]*[a-f0-9]+: eb 05 jmp 30 +[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 -0+26 : +0+30 : [ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\) [ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\) [ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\) @@ -27,4 +28,5 @@ [ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\) [ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\) [ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\) +[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3 #pass diff --git a/binutils/gas/testsuite/gas/i386/x86-64-disp32.s b/binutils/gas/testsuite/gas/i386/x86-64-disp32.s index 0856339..e00aa02 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-disp32.s +++ b/binutils/gas/testsuite/gas/i386/x86-64-disp32.s @@ -8,6 +8,7 @@ mov.d32 (%rax),%ebx mov.d32 3(%rax),%ebx + vmovdqu64.d32 -0x40(%rax),%xmm3 jmp foo jmp.d8 foo @@ -24,3 +25,5 @@ mov.d32 DWORD PTR [rax], ebx mov.d32 DWORD PTR [rax+3], ebx + + vmovdqu64.d32 xmm3,XMMWORD PTR [rax-0x40] diff --git a/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d b/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d new file mode 100644 index 0000000..a3f8943 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d @@ -1,0 +1,27 @@ +#source: x86-64-gotpcrel.s +#as: -mrelax-relocations=no +#objdump: -dwr + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 3: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo +[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4 +[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo +#pass diff --git a/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d b/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d index 6ca3fc7..fbe5e47 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d +++ b/binutils/gas/testsuite/gas/i386/x86-64-gotpcrel.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #objdump: -dwr .*: +file format .* diff --git a/binutils/gas/testsuite/gas/i386/x86-64-localpic.d b/binutils/gas/testsuite/gas/i386/x86-64-localpic.d index 0a07149..bafaa9c 100644 --- a/binutils/gas/testsuite/gas/i386/x86-64-localpic.d +++ b/binutils/gas/testsuite/gas/i386/x86-64-localpic.d @@ -1,3 +1,4 @@ +#as: -mrelax-relocations=yes #readelf: -rsW #name: x86-64 local PIC diff --git a/binutils/gas/testsuite/gas/mips/isa-override-1.d b/binutils/gas/testsuite/gas/mips/isa-override-1.d new file mode 100644 index 0000000..70f34e2 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/isa-override-1.d @@ -1,0 +1,49 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/isa-override-1.s b/binutils/gas/testsuite/gas/mips/isa-override-1.s new file mode 100644 index 0000000..9a38981 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/isa-override-1.s @@ -1,0 +1,31 @@ + .text + .globl foo + .ent foo +foo: + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set push + .set mips3 + ld $2, 0($4) + or $2, 0x89ab0000 + dli $2, 0x9000000080000000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set mips0 + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .set mips3 + .set pop + ld $2, 0($4) + or $2, 0x89ab0000 + l.d $f2, 0($4) + li.d $f2, 1.0000005128531484 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/isa-override-2.l b/binutils/gas/testsuite/gas/mips/isa-override-2.l new file mode 100644 index 0000000..cd215bc 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: number \(0x9000000080000000\) larger than 32 bits +.*:10: Error: number \(0x9000000080000000\) larger than 32 bits +.*:13: Error: number \(0x9000000080000000\) larger than 32 bits diff --git a/binutils/gas/testsuite/gas/mips/isa-override-2.s b/binutils/gas/testsuite/gas/mips/isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/micromips@isa-override-1.d b/binutils/gas/testsuite/gas/mips/micromips@isa-override-1.d new file mode 100644 index 0000000..e600ff8 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/micromips@isa-override-1.d @@ -1,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc44 0000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 5020 89ab li at,0x89ab +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> 41a2 9000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 5042 8000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 5842 8000 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 5021 89ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 5821 8000 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 5422 2c3b dmtc1 at,\$2 +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> fc44 0000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> fc64 0004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 0022 1290 or v0,v0,at +[0-9a-f]+ <[^>]*> bc44 0000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 41a1 3ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 5422 383b mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 41a1 89ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 5422 283b mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/mips.exp b/binutils/gas/testsuite/gas/mips/mips.exp index 74e0a79..20997f7 100644 --- a/binutils/gas/testsuite/gas/mips/mips.exp +++ b/binutils/gas/testsuite/gas/mips/mips.exp @@ -1468,6 +1468,9 @@ run_dump_test "li-d" + run_dump_test_arches "isa-override-1" "" [mips_arch_list_matching mips1] + run_list_test_arches "isa-override-2" "-32" [mips_arch_list_matching mips1] + run_dump_test_arches "r6" [mips_arch_list_matching mips32r6] if $has_newabi { run_dump_test_arches "r6-n32" [mips_arch_list_matching mips64r6] diff --git a/binutils/gas/testsuite/gas/mips/mips1@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips1@isa-override-1.d new file mode 100644 index 0000000..80371b8 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips1@isa-override-1.d @@ -1,0 +1,53 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 0xdc820000 +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 0xd4820000 +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> c48[32]0000 lwc1 \$f[32],0\(a0\) +[0-9a-f]+ <[^>]*> c48[23]0004 lwc1 \$f[23],4\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.l new file mode 100644 index 0000000..2ec6684 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips1@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips2@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips2@isa-override-1.d new file mode 100644 index 0000000..5341e0d 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips2@isa-override-1.d @@ -1,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44811800 mtc1 at,\$f3 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.l new file mode 100644 index 0000000..19ad921 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips2@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips32@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips32@isa-override-1.d new file mode 100644 index 0000000..75a8f0a 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.l new file mode 100644 index 0000000..2f693d6 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-1.d new file mode 100644 index 0000000..0ab21b9 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-1.d @@ -1,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ldc3 \$2,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 0x21438 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 0x10c38 +[0-9a-f]+ <[^>]*> 44a11000 0x44a11000 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.l new file mode 100644 index 0000000..d4d4aea 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r2@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-1.d new file mode 100644 index 0000000..5aa2f5b 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.l new file mode 100644 index 0000000..a32137d 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r3@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-1.d new file mode 100644 index 0000000..5aa2f5b 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.l new file mode 100644 index 0000000..dedc04f 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r5@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-1.d new file mode 100644 index 0000000..5aa2f5b 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips32r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.l b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.l new file mode 100644 index 0000000..dda7cdf 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.s b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips32r6@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/mips64r2@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips64r2@isa-override-1.d new file mode 100644 index 0000000..d53fb2c 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips64r2@isa-override-1.d @@ -1,0 +1,50 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 342189ab ori at,at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 44a11000 dmtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> d4820000 ldc1 \$f2,0\(a0\) +[0-9a-f]+ <[^>]*> 3c013ff0 lui at,0x3ff0 +[0-9a-f]+ <[^>]*> 44e11000 mthc1 at,\$f2 +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 44811000 mtc1 at,\$f2 + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/mips64r3@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips64r3@isa-override-1.d new file mode 100644 index 0000000..79873cc 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips64r3@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips64r5@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips64r5@isa-override-1.d new file mode 100644 index 0000000..79873cc 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips64r5@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/mips64r6@isa-override-1.d b/binutils/gas/testsuite/gas/mips/mips64r6@isa-override-1.d new file mode 100644 index 0000000..79873cc 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/mips64r6@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.d b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.d new file mode 100644 index 0000000..dc3e9c5 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.d @@ -1,0 +1,6 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#stderr: octeon3@isa-override-1.l +#dump: mips64r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.l b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.l new file mode 100644 index 0000000..3774f17 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-1.l @@ -1,0 +1,2 @@ +.*: Assembler messages: +.*:10: Warning: the `virt' extension requires MIPS64 revision 2 or greater diff --git a/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.l b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.l new file mode 100644 index 0000000..6ca0d8d 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.l @@ -1,0 +1,5 @@ +.*: Assembler messages: +.*:5: Error: number \(0x9000000080000000\) larger than 32 bits +.*:7: Warning: the `virt' extension requires MIPS64 revision 2 or greater +.*:10: Error: number \(0x9000000080000000\) larger than 32 bits +.*:13: Error: number \(0x9000000080000000\) larger than 32 bits diff --git a/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.s b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/octeon3@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/octeon@isa-override-1.d b/binutils/gas/testsuite/gas/mips/octeon@isa-override-1.d new file mode 100644 index 0000000..79873cc 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/octeon@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips64r2@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/r3000@isa-override-1.d b/binutils/gas/testsuite/gas/mips/r3000@isa-override-1.d new file mode 100644 index 0000000..8e090ef 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3000@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips1@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.l b/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.l new file mode 100644 index 0000000..2ec6684 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.s b/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3000@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/r3900@isa-override-1.d b/binutils/gas/testsuite/gas/mips/r3900@isa-override-1.d new file mode 100644 index 0000000..8e090ef 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3900@isa-override-1.d @@ -1,0 +1,5 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 +#source: isa-override-1.s +#dump: mips1@isa-override-1.d diff --git a/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.l b/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.l new file mode 100644 index 0000000..18c982a 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.l @@ -1,0 +1,4 @@ +.*: Assembler messages: +.*:5: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' +.*:10: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' +.*:13: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000' diff --git a/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.s b/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.s new file mode 100644 index 0000000..402c118 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r3900@isa-override-2.s @@ -1,0 +1,18 @@ + .text + .globl foo + .ent foo +foo: + dli $2, 0x9000000080000000 + .set push + .set mips3 + dli $2, 0x9000000080000000 + .set mips0 + dli $2, 0x9000000080000000 + .set mips3 + .set pop + dli $2, 0x9000000080000000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.d b/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.d new file mode 100644 index 0000000..7e9c0e2 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.d @@ -1,0 +1,28 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ISA override code generation +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> dc820000 ld v0,0\(a0\) +[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab +[0-9a-f]+ <[^>]*> 00010c38 dsll at,at,0x10 +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000 +[0-9a-f]+ <[^>]*> 00021438 dsll v0,v0,0x10 +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at +[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\) +[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\) +[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab +[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at + \.\.\. diff --git a/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.s b/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.s new file mode 100644 index 0000000..02352f8 100644 --- /dev/null +++ b/binutils/gas/testsuite/gas/mips/r5900@isa-override-1.s @@ -1,0 +1,23 @@ + .text + .globl foo + .ent foo +foo: + ld $2, 0($4) + or $2, 0x89ab0000 + .set push + .set mips3 + ld $2, 0($4) + or $2, 0x89ab0000 + dli $2, 0x9000000080000000 + .set mips0 + ld $2, 0($4) + or $2, 0x89ab0000 + .set mips3 + .set pop + ld $2, 0($4) + or $2, 0x89ab0000 + .end foo + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/gas/testsuite/gas/ppc/altivec3.d b/binutils/gas/testsuite/gas/ppc/altivec3.d index 1d05a8f..7b7ae0b 100644 --- a/binutils/gas/testsuite/gas/ppc/altivec3.d +++ b/binutils/gas/testsuite/gas/ppc/altivec3.d @@ -76,4 +76,5 @@ .*: (12 b5 17 44|44 17 b5 12) vslv v21,v21,v2 .*: (11 e9 0f 4d|4d 0f e9 11) vextuhrx r15,r9,v1 .*: (12 b1 87 8d|8d 87 b1 12) vextuwrx r21,r17,v16 +.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23 #pass diff --git a/binutils/gas/testsuite/gas/ppc/altivec3.s b/binutils/gas/testsuite/gas/ppc/altivec3.s index 6217da5..7fa28b3 100644 --- a/binutils/gas/testsuite/gas/ppc/altivec3.s +++ b/binutils/gas/testsuite/gas/ppc/altivec3.s @@ -67,3 +67,4 @@ vslv 21,21,2 vextuhrx 15,9,1 vextuwrx 21,17,16 + vmsumudm 20,21,22,23 diff --git a/binutils/gas/testsuite/gas/ppc/e6500.d b/binutils/gas/testsuite/gas/ppc/e6500.d index c8d8f57..3ed94dc 100644 --- a/binutils/gas/testsuite/gas/ppc/e6500.d +++ b/binutils/gas/testsuite/gas/ppc/e6500.d @@ -73,3 +73,20 @@ fc: (7c 43 09 8d|8d 09 43 7c) icblq. 2,r3,r1 100: (7c 10 02 dc|dc 02 10 7c) mftmr r0,16 104: (7c 10 03 dc|dc 03 10 7c) mttmr 16,r0 +.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7 +.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7 +.*: (7e a0 40 e8|e8 40 a0 7e) lharx r21,0,r8 +.*: (7e a1 40 e8|e8 40 a1 7e) lharx r21,r1,r8 +.*: (7e c0 48 28|28 48 c0 7e) lwarx r22,0,r9 +.*: (7e c1 48 28|28 48 c1 7e) lwarx r22,r1,r9 +.*: (7e e0 50 a8|a8 50 e0 7e) ldarx r23,0,r10 +.*: (7e e1 50 a8|a8 50 e1 7e) ldarx r23,r1,r10 +.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7 +.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7 +.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8 +.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8 +.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9 +.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9 +.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10 +.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10 +#pass diff --git a/binutils/gas/testsuite/gas/ppc/e6500.s b/binutils/gas/testsuite/gas/ppc/e6500.s index 2167cc6..d4b7f84 100644 --- a/binutils/gas/testsuite/gas/ppc/e6500.s +++ b/binutils/gas/testsuite/gas/ppc/e6500.s @@ -67,3 +67,19 @@ icblq. 2,3,1 mftmr 0,16 mttmr 16,0 + lbarx 20,0,7 + lbarx 20,1,7 + lharx 21,0,8 + lharx 21,1,8 + lwarx 22,0,9 + lwarx 22,1,9 + ldarx 23,0,10 + ldarx 23,1,10 + stbcx. 10,0,7 + stbcx. 10,1,7 + sthcx. 11,0,8 + sthcx. 11,1,8 + stwcx. 12,0,9 + stwcx. 12,1,9 + stdcx. 13,0,10 + stdcx. 13,1,10 diff --git a/binutils/gas/testsuite/gas/ppc/power4.d b/binutils/gas/testsuite/gas/ppc/power4.d index 8a09c05..cb487a7 100644 --- a/binutils/gas/testsuite/gas/ppc/power4.d +++ b/binutils/gas/testsuite/gas/ppc/power4.d @@ -10,7 +10,7 @@ Sections: Idx Name +Size +VMA +LMA +File off +Algn - +0 \.text +0+e8 +0+ +0+ +.* + +0 \.text +0+108 +0+ +0+ +.* +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE +1 \.data +0+20 +0+ +0+ +.* +CONTENTS, ALLOC, LOAD, DATA @@ -106,3 +106,12 @@ .*: (7c 20 04 ac|ac 04 20 7c) lwsync .*: (7c 40 04 ac|ac 04 40 7c) ptesync .*: (7c 40 04 ac|ac 04 40 7c) ptesync +.*: (7e 80 30 28|28 30 80 7e) lwarx r20,0,r6 +.*: (7e 81 30 28|28 30 81 7e) lwarx r20,r1,r6 +.*: (7e a0 38 a8|a8 38 a0 7e) ldarx r21,0,r7 +.*: (7e a1 38 a8|a8 38 a1 7e) ldarx r21,r1,r7 +.*: (7e c0 41 2d|2d 41 c0 7e) stwcx\. r22,0,r8 +.*: (7e c1 41 2d|2d 41 c1 7e) stwcx\. r22,r1,r8 +.*: (7e e0 49 ad|ad 49 e0 7e) stdcx\. r23,0,r9 +.*: (7e e1 49 ad|ad 49 e1 7e) stdcx\. r23,r1,r9 +#pass diff --git a/binutils/gas/testsuite/gas/ppc/power4.s b/binutils/gas/testsuite/gas/ppc/power4.s index 583284c..b2ede93 100644 --- a/binutils/gas/testsuite/gas/ppc/power4.s +++ b/binutils/gas/testsuite/gas/ppc/power4.s @@ -79,6 +79,14 @@ sync 1 ptesync sync 2 + lwarx 20,0,6 + lwarx 20,1,6 + ldarx 21,0,7 + ldarx 21,1,7 + stwcx. 22,0,8 + stwcx. 22,1,8 + stdcx. 23,0,9 + stdcx. 23,1,9 .section ".data" usym0: .llong 0xcafebabe diff --git a/binutils/gas/testsuite/gas/ppc/power8.d b/binutils/gas/testsuite/gas/ppc/power8.d index aaa64c8..5c97ab9 100644 --- a/binutils/gas/testsuite/gas/ppc/power8.d +++ b/binutils/gas/testsuite/gas/ppc/power8.d @@ -160,4 +160,36 @@ .*: (7d 20 3f 99|99 3f 20 7d) stxvd2x vs41,0,r7 .*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8 .*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8 +.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7 +.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7 +.*: (7e 80 38 69|69 38 80 7e) lbarx r20,0,r7,1 +.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7 +.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7 +.*: (7e 81 38 69|69 38 81 7e) lbarx r20,r1,r7,1 +.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8 +.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8 +.*: (7e a0 40 a9|a9 40 a0 7e) ldarx r21,0,r8,1 +.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8 +.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8 +.*: (7e a1 40 a9|a9 40 a1 7e) ldarx r21,r1,r8,1 +.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9 +.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9 +.*: (7e c0 48 e9|e9 48 c0 7e) lharx r22,0,r9,1 +.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9 +.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9 +.*: (7e c1 48 e9|e9 48 c1 7e) lharx r22,r1,r9,1 +.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10 +.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10 +.*: (7e e0 50 29|29 50 e0 7e) lwarx r23,0,r10,1 +.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10 +.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10 +.*: (7e e1 50 29|29 50 e1 7e) lwarx r23,r1,r10,1 +.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7 +.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7 +.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8 +.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8 +.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9 +.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9 +.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10 +.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10 #pass diff --git a/binutils/gas/testsuite/gas/ppc/power8.s b/binutils/gas/testsuite/gas/ppc/power8.s index 0b350eb..728caae 100644 --- a/binutils/gas/testsuite/gas/ppc/power8.s +++ b/binutils/gas/testsuite/gas/ppc/power8.s @@ -152,3 +152,35 @@ stxvd2x 41,0,7 stxvx 11,21,8 stxvd2x 11,21,8 + lbarx 20,0,7 + lbarx 20,0,7,0 + lbarx 20,0,7,1 + lbarx 20,1,7 + lbarx 20,1,7,0 + lbarx 20,1,7,1 + ldarx 21,0,8 + ldarx 21,0,8,0 + ldarx 21,0,8,1 + ldarx 21,1,8 + ldarx 21,1,8,0 + ldarx 21,1,8,1 + lharx 22,0,9 + lharx 22,0,9,0 + lharx 22,0,9,1 + lharx 22,1,9 + lharx 22,1,9,0 + lharx 22,1,9,1 + lwarx 23,0,10 + lwarx 23,0,10,0 + lwarx 23,0,10,1 + lwarx 23,1,10 + lwarx 23,1,10,0 + lwarx 23,1,10,1 + stbcx. 10,0,7 + stbcx. 10,1,7 + sthcx. 11,0,8 + sthcx. 11,1,8 + stwcx. 12,0,9 + stwcx. 12,1,9 + stdcx. 13,0,10 + stdcx. 13,1,10 diff --git a/binutils/gas/testsuite/gas/ppc/power9.d b/binutils/gas/testsuite/gas/ppc/power9.d index 2e5593d..5004e11 100644 --- a/binutils/gas/testsuite/gas/ppc/power9.d +++ b/binutils/gas/testsuite/gas/ppc/power9.d @@ -278,6 +278,14 @@ .*: (7f a8 49 80|80 49 a8 7f) cmprb cr7,1,r8,r9 .*: (7d e0 01 00|00 01 e0 7d) setb r15,cr0 .*: (7d fc 01 00|00 01 fc 7d) setb r15,cr7 +.*: (7e 00 01 01|01 01 00 7e) setbool r16,lt +.*: (7e 01 01 01|01 01 01 7e) setbool r16,gt +.*: (7e 02 01 01|01 01 02 7e) setbool r16,eq +.*: (7e 03 01 01|01 01 03 7e) setbool r16,so +.*: (7e 1c 01 01|01 01 1c 7e) setbool r16,4\*cr7\+lt +.*: (7e 1d 01 01|01 01 1d 7e) setbool r16,4\*cr7\+gt +.*: (7e 1e 01 01|01 01 1e 7e) setbool r16,4\*cr7\+eq +.*: (7e 1f 01 01|01 01 1f 7e) setbool r16,4\*cr7\+so .*: (7f 40 52 1a|1a 52 40 7f) lxvl vs26,0,r10 .*: (7f 14 52 1b|1b 52 14 7f) lxvl vs56,r20,r10 .*: (7f 60 5b 1a|1a 5b 60 7f) stxvl vs27,0,r11 @@ -363,6 +371,8 @@ .*: (7c 00 f6 e4|e4 f6 00 7c) rmieg r30 .*: (7d 40 7a 6a|6a 7a 40 7d) ldmx r10,0,r15 .*: (7d 43 7a 6a|6a 7a 43 7d) ldmx r10,r3,r15 +.*: (7d 60 83 6a|6a 83 60 7d) lwzmx r11,0,r16 +.*: (7d 63 83 6a|6a 83 63 7d) lwzmx r11,r3,r16 .*: (4c 00 02 e4|e4 02 00 4c) stop .*: (7c 00 00 3c|3c 00 00 7c) wait .*: (7c 00 00 3c|3c 00 00 7c) wait @@ -381,4 +391,29 @@ .*: (f0 6d bc 07|07 bc 6d f0) xsmaxcdp vs35,vs45,vs55 .*: (f0 8e c4 c7|c7 c4 8e f0) xsminjdp vs36,vs46,vs56 .*: (f0 af cc 87|87 cc af f0) xsmaxjdp vs37,vs47,vs57 +.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23 +.*: (7d 6c 69 54|54 69 6c 7d) addex r11,r12,r13,0 +.*: (7d 6c 6b 54|54 6b 6c 7d) addex r11,r12,r13,1 +.*: (7d 6c 6d 54|54 6d 6c 7d) addex r11,r12,r13,2 +.*: (7e b6 b9 55|55 b9 b6 7e) addex\. r21,r22,r23,0 +.*: (7e b6 bb 55|55 bb b6 7e) addex\. r21,r22,r23,1 +.*: (7e b6 bd 55|55 bd b6 7e) addex\. r21,r22,r23,2 +.*: (ff 20 04 8e|8e 04 20 ff) mffs f25 +.*: (ff 20 04 8f|8f 04 20 ff) mffs\. f25 +.*: (ff 41 04 8e|8e 04 41 ff) mffsce f26 +.*: (ff 74 a4 8e|8e a4 74 ff) mffscdrn f27,f20 +.*: (ff 95 04 8e|8e 04 95 ff) mffscdrni f28,0 +.*: (ff 95 3c 8e|8e 3c 95 ff) mffscdrni f28,7 +.*: (ff b6 ac 8e|8e ac b6 ff) mffscrn f29,f21 +.*: (ff d7 04 8e|8e 04 d7 ff) mffscrni f30,0 +.*: (ff d7 1c 8e|8e 1c d7 ff) mffscrni f30,3 +.*: (ff f8 04 8e|8e 04 f8 ff) mffsl f31 +.*: (7e 8a 01 76|76 01 8a 7e) brd r10,r20 +.*: (7e ab 01 b6|b6 01 ab 7e) brh r11,r21 +.*: (7e cc 01 36|36 01 cc 7e) brw r12,r22 +.*: (11 6a 63 77|77 63 6a 11) nandxor r10,r11,r12,r13 +.*: (12 b4 b5 f6|f6 b5 b4 12) xor3 r20,r21,r22,r23 +.*: (11 6a 60 34|34 60 6a 11) rldixor r10,r11,0,r12 +.*: (11 6a 66 f4|f4 66 6a 11) rldixor r10,r11,27,r12 +.*: (11 6a 67 f5|f5 67 6a 11) rldixor r10,r11,63,r12 #pass diff --git a/binutils/gas/testsuite/gas/ppc/power9.s b/binutils/gas/testsuite/gas/ppc/power9.s index 6ee49d4..851c146 100644 --- a/binutils/gas/testsuite/gas/ppc/power9.s +++ b/binutils/gas/testsuite/gas/ppc/power9.s @@ -269,6 +269,14 @@ cmprb 7,1,8,9 setb 15,0 setb 15,7 + setbool 16,0 + setbool 16,1 + setbool 16,2 + setbool 16,3 + setbool 16,28 + setbool 16,29 + setbool 16,30 + setbool 16,31 lxvl 26,0,10 lxvl 56,20,10 stxvl 27,0,11 @@ -354,6 +362,8 @@ rmieg 30 ldmx 10,0,15 ldmx 10,3,15 + lwzmx 11,0,16 + lwzmx 11,3,16 stop wait wait 0 @@ -372,3 +382,28 @@ xsmaxcdp 35,45,55 xsminjdp 36,46,56 xsmaxjdp 37,47,57 + vmsumudm 20,21,22,23 + addex 11,12,13,0 + addex 11,12,13,1 + addex 11,12,13,2 + addex. 21,22,23,0 + addex. 21,22,23,1 + addex. 21,22,23,2 + mffs 25 + mffs. 25 + mffsce 26 + mffscdrn 27,20 + mffscdrni 28,0 + mffscdrni 28,7 + mffscrn 29,21 + mffscrni 30,0 + mffscrni 30,3 + mffsl 31 + brd 10,20 + brh 11,21 + brw 12,22 + nandxor 10,11,12,13 + xor3 20,21,22,23 + rldixor 10,11,0,12 + rldixor 10,11,27,12 + rldixor 10,11,63,12 diff --git a/binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d b/binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d index e5a3b1c..1314e5b 100644 --- a/binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d +++ b/binutils/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d @@ -1,4 +1,5 @@ #source: ../x86-64-gotpcrel.s +#as: --x32 -mrelax-relocations=yes #objdump: -dwr #name: x86-64 (ILP32) gotpcrel diff --git a/binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d b/binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d index 0ca69c7..a9528a2 100644 --- a/binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d +++ b/binutils/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d @@ -1,4 +1,5 @@ #source: ../x86-64-localpic.s +#as: --x32 -mrelax-relocations=yes #readelf: -rsW #name: x86-64 (ILP32) local PIC -- gitore 0.2.2